goldfish: 64-bit pipe driver for goldfish platform

Support 64-bit channel and address for the goldfish pipe driver.

Signed-off-by: Jun Tian <jun.j.tian@intel.com>
Signed-off-by: Octavian Purdila <octavian.purdila@intel.com>
Signed-off-by: Brian Wood <brian.j.wood@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

1 files changed, 29 insertions, 6 deletions

diff --git a/drivers/platform/goldfish/goldfish_pipe.c b/drivers/platform/goldfish/goldfish_pipe.c
index 4f5aa831f549..f33c6e0e7fb0 100644
--- a/drivers/platform/goldfish/goldfish_pipe.c
+++ b/drivers/platform/goldfish/goldfish_pipe.c
@@ -66,8 +66,14 @@
 #define PIPE_REG_COMMAND                0x00  /* write: value = command */
 #define PIPE_REG_STATUS                 0x04  /* read */
 #define PIPE_REG_CHANNEL                0x08  /* read/write: channel id */
+#ifdef CONFIG_64BIT
+#define PIPE_REG_CHANNEL_HIGH           0x30  /* read/write: channel id */
+#endif
 #define PIPE_REG_SIZE                   0x0c  /* read/write: buffer size */
 #define PIPE_REG_ADDRESS                0x10  /* write: physical address */
+#ifdef CONFIG_64BIT
+#define PIPE_REG_ADDRESS_HIGH           0x34  /* write: physical address */
+#endif
 #define PIPE_REG_WAKES                  0x14  /* read: wake flags */
 #define PIPE_REG_PARAMS_ADDR_LOW        0x18  /* read/write: batch data address */
 #define PIPE_REG_PARAMS_ADDR_HIGH       0x1c  /* read/write: batch data address */
@@ -109,9 +115,9 @@
 #define PIPE_WAKE_WRITE        (1 << 2)  /* pipe can now be written to */
 
 struct access_params {
-        u32 channel;
+        unsigned long channel;
         u32 size;
-        u32 address;
+        unsigned long address;
         u32 cmd;
         u32 result;
         /* reserved for future extension */
@@ -155,7 +161,10 @@ static u32 goldfish_cmd_status(struct goldfish_pipe *pipe, u32 cmd)
         struct goldfish_pipe_dev *dev = pipe->dev;
 
         spin_lock_irqsave(&dev->lock, flags);
-        writel((u32)pipe, dev->base + PIPE_REG_CHANNEL);
+        writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL);
+#ifdef CONFIG_64BIT
+        writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH);
+#endif
         writel(cmd, dev->base + PIPE_REG_COMMAND);
         status = readl(dev->base + PIPE_REG_STATUS);
         spin_unlock_irqrestore(&dev->lock, flags);
@@ -168,7 +177,10 @@ static void goldfish_cmd(struct goldfish_pipe *pipe, u32 cmd)
         struct goldfish_pipe_dev *dev = pipe->dev;
 
         spin_lock_irqsave(&dev->lock, flags);
-        writel((u32)pipe, dev->base + PIPE_REG_CHANNEL);
+        writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL);
+#ifdef CONFIG_64BIT
+        writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH);
+#endif
         writel(cmd, dev->base + PIPE_REG_COMMAND);
         spin_unlock_irqrestore(&dev->lock, flags);
 }
@@ -322,9 +334,15 @@ static ssize_t goldfish_pipe_read_write(struct file *filp, char __user *buffer,
                 spin_lock_irqsave(&dev->lock, irq_flags);
                 if (access_with_param(dev, CMD_WRITE_BUFFER + cmd_offset,
                                 address, avail, pipe, &status)) {
-                        writel((u32)pipe, dev->base + PIPE_REG_CHANNEL);
+                        writel((u32)(u64)pipe, dev->base + PIPE_REG_CHANNEL);
+#ifdef CONFIG_64BIT
+                        writel((u32)((u64)pipe >> 32), dev->base + PIPE_REG_CHANNEL_HIGH);
+#endif
                         writel(avail, dev->base + PIPE_REG_SIZE);
                         writel(address, dev->base + PIPE_REG_ADDRESS);
+#ifdef CONFIG_64BIT
+                        writel((u32)((u64)address >> 32), dev->base + PIPE_REG_ADDRESS_HIGH);
+#endif
                         writel(CMD_WRITE_BUFFER + cmd_offset,
                                         dev->base + PIPE_REG_COMMAND);
                         status = readl(dev->base + PIPE_REG_STATUS);
@@ -447,7 +465,12 @@ static irqreturn_t goldfish_pipe_interrupt(int irq, void *dev_id)
                 /* First read the channel, 0 means the end of the list */
                 struct goldfish_pipe *pipe;
                 unsigned long wakes;
-                unsigned long channel = readl(dev->base + PIPE_REG_CHANNEL);
+                unsigned long channel = 0;
+
+#ifdef CONFIG_64BIT
+                channel = (u64)readl(dev->base + PIPE_REG_CHANNEL_HIGH) << 32;
+#endif
+                channel |= readl(dev->base + PIPE_REG_CHANNEL);
 
                 if (channel == 0)
                         break;