diff options
author | Valentine Barshak <valentine.barshak@cogentembedded.com> | 2013-12-27 06:27:37 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-01-07 10:48:54 -0500 |
commit | a5ffaf644550d8120399abd62c543afe61ca628f (patch) | |
tree | 99d98d583909325bbe1bda0d96fdc9f058e76ce9 /drivers/pinctrl | |
parent | 8e32c9671f84acd89d868659b86834e2f1b29f25 (diff) |
pinctrl: sh-pfc: r8a7791: Add I2C pins
This adds I2C[0-4] pinmux support to R8A7791 SoC.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 196 |
1 files changed, 196 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index c3a336a9157d..77d103fe39d9 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c | |||
@@ -1805,6 +1805,144 @@ static const unsigned int eth_rmii_mux[] = { | |||
1805 | ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK, | 1805 | ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK, |
1806 | ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK, | 1806 | ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK, |
1807 | }; | 1807 | }; |
1808 | /* - I2C0 ------------------------------------------------------------------- */ | ||
1809 | static const unsigned int i2c0_pins[] = { | ||
1810 | /* SCL, SDA */ | ||
1811 | RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25), | ||
1812 | }; | ||
1813 | static const unsigned int i2c0_mux[] = { | ||
1814 | SCL0_MARK, SDA0_MARK, | ||
1815 | }; | ||
1816 | static const unsigned int i2c0_b_pins[] = { | ||
1817 | /* SCL, SDA */ | ||
1818 | RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), | ||
1819 | }; | ||
1820 | static const unsigned int i2c0_b_mux[] = { | ||
1821 | SCL0_B_MARK, SDA0_B_MARK, | ||
1822 | }; | ||
1823 | static const unsigned int i2c0_c_pins[] = { | ||
1824 | /* SCL, SDA */ | ||
1825 | RCAR_GP_PIN(0, 16), RCAR_GP_PIN(1, 1), | ||
1826 | }; | ||
1827 | static const unsigned int i2c0_c_mux[] = { | ||
1828 | SCL0_C_MARK, SDA0_C_MARK, | ||
1829 | }; | ||
1830 | /* - I2C1 ------------------------------------------------------------------- */ | ||
1831 | static const unsigned int i2c1_pins[] = { | ||
1832 | /* SCL, SDA */ | ||
1833 | RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11), | ||
1834 | }; | ||
1835 | static const unsigned int i2c1_mux[] = { | ||
1836 | SCL1_MARK, SDA1_MARK, | ||
1837 | }; | ||
1838 | static const unsigned int i2c1_b_pins[] = { | ||
1839 | /* SCL, SDA */ | ||
1840 | RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), | ||
1841 | }; | ||
1842 | static const unsigned int i2c1_b_mux[] = { | ||
1843 | SCL1_B_MARK, SDA1_B_MARK, | ||
1844 | }; | ||
1845 | static const unsigned int i2c1_c_pins[] = { | ||
1846 | /* SCL, SDA */ | ||
1847 | RCAR_GP_PIN(6, 14), RCAR_GP_PIN(6, 15), | ||
1848 | }; | ||
1849 | static const unsigned int i2c1_c_mux[] = { | ||
1850 | SCL1_C_MARK, SDA1_C_MARK, | ||
1851 | }; | ||
1852 | static const unsigned int i2c1_d_pins[] = { | ||
1853 | /* SCL, SDA */ | ||
1854 | RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 26), | ||
1855 | }; | ||
1856 | static const unsigned int i2c1_d_mux[] = { | ||
1857 | SCL1_D_MARK, SDA1_D_MARK, | ||
1858 | }; | ||
1859 | static const unsigned int i2c1_e_pins[] = { | ||
1860 | /* SCL, SDA */ | ||
1861 | RCAR_GP_PIN(7, 15), RCAR_GP_PIN(7, 16), | ||
1862 | }; | ||
1863 | static const unsigned int i2c1_e_mux[] = { | ||
1864 | SCL1_E_MARK, SDA1_E_MARK, | ||
1865 | }; | ||
1866 | /* - I2C2 ------------------------------------------------------------------- */ | ||
1867 | static const unsigned int i2c2_pins[] = { | ||
1868 | /* SCL, SDA */ | ||
1869 | RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 7), | ||
1870 | }; | ||
1871 | static const unsigned int i2c2_mux[] = { | ||
1872 | SCL2_MARK, SDA2_MARK, | ||
1873 | }; | ||
1874 | static const unsigned int i2c2_b_pins[] = { | ||
1875 | /* SCL, SDA */ | ||
1876 | RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 29), | ||
1877 | }; | ||
1878 | static const unsigned int i2c2_b_mux[] = { | ||
1879 | SCL2_B_MARK, SDA2_B_MARK, | ||
1880 | }; | ||
1881 | static const unsigned int i2c2_c_pins[] = { | ||
1882 | /* SCL, SDA */ | ||
1883 | RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), | ||
1884 | }; | ||
1885 | static const unsigned int i2c2_c_mux[] = { | ||
1886 | SCL2_C_MARK, SDA2_C_MARK, | ||
1887 | }; | ||
1888 | static const unsigned int i2c2_d_pins[] = { | ||
1889 | /* SCL, SDA */ | ||
1890 | RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 18), | ||
1891 | }; | ||
1892 | static const unsigned int i2c2_d_mux[] = { | ||
1893 | SCL2_D_MARK, SDA2_D_MARK, | ||
1894 | }; | ||
1895 | /* - I2C3 ------------------------------------------------------------------- */ | ||
1896 | static const unsigned int i2c3_pins[] = { | ||
1897 | /* SCL, SDA */ | ||
1898 | RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 16), | ||
1899 | }; | ||
1900 | static const unsigned int i2c3_mux[] = { | ||
1901 | SCL3_MARK, SDA3_MARK, | ||
1902 | }; | ||
1903 | static const unsigned int i2c3_b_pins[] = { | ||
1904 | /* SCL, SDA */ | ||
1905 | RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), | ||
1906 | }; | ||
1907 | static const unsigned int i2c3_b_mux[] = { | ||
1908 | SCL3_B_MARK, SDA3_B_MARK, | ||
1909 | }; | ||
1910 | static const unsigned int i2c3_c_pins[] = { | ||
1911 | /* SCL, SDA */ | ||
1912 | RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23), | ||
1913 | }; | ||
1914 | static const unsigned int i2c3_c_mux[] = { | ||
1915 | SCL3_C_MARK, SDA3_C_MARK, | ||
1916 | }; | ||
1917 | static const unsigned int i2c3_d_pins[] = { | ||
1918 | /* SCL, SDA */ | ||
1919 | RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), | ||
1920 | }; | ||
1921 | static const unsigned int i2c3_d_mux[] = { | ||
1922 | SCL3_D_MARK, SDA3_D_MARK, | ||
1923 | }; | ||
1924 | /* - I2C4 ------------------------------------------------------------------- */ | ||
1925 | static const unsigned int i2c4_pins[] = { | ||
1926 | /* SCL, SDA */ | ||
1927 | RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), | ||
1928 | }; | ||
1929 | static const unsigned int i2c4_mux[] = { | ||
1930 | SCL4_MARK, SDA4_MARK, | ||
1931 | }; | ||
1932 | static const unsigned int i2c4_b_pins[] = { | ||
1933 | /* SCL, SDA */ | ||
1934 | RCAR_GP_PIN(4, 27), RCAR_GP_PIN(4, 28), | ||
1935 | }; | ||
1936 | static const unsigned int i2c4_b_mux[] = { | ||
1937 | SCL4_B_MARK, SDA4_B_MARK, | ||
1938 | }; | ||
1939 | static const unsigned int i2c4_c_pins[] = { | ||
1940 | /* SCL, SDA */ | ||
1941 | RCAR_GP_PIN(7, 13), RCAR_GP_PIN(7, 14), | ||
1942 | }; | ||
1943 | static const unsigned int i2c4_c_mux[] = { | ||
1944 | SCL4_C_MARK, SDA4_C_MARK, | ||
1945 | }; | ||
1808 | /* - INTC ------------------------------------------------------------------- */ | 1946 | /* - INTC ------------------------------------------------------------------- */ |
1809 | static const unsigned int intc_irq0_pins[] = { | 1947 | static const unsigned int intc_irq0_pins[] = { |
1810 | /* IRQ */ | 1948 | /* IRQ */ |
@@ -2966,6 +3104,25 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { | |||
2966 | SH_PFC_PIN_GROUP(eth_magic), | 3104 | SH_PFC_PIN_GROUP(eth_magic), |
2967 | SH_PFC_PIN_GROUP(eth_mdio), | 3105 | SH_PFC_PIN_GROUP(eth_mdio), |
2968 | SH_PFC_PIN_GROUP(eth_rmii), | 3106 | SH_PFC_PIN_GROUP(eth_rmii), |
3107 | SH_PFC_PIN_GROUP(i2c0), | ||
3108 | SH_PFC_PIN_GROUP(i2c0_b), | ||
3109 | SH_PFC_PIN_GROUP(i2c0_c), | ||
3110 | SH_PFC_PIN_GROUP(i2c1), | ||
3111 | SH_PFC_PIN_GROUP(i2c1_b), | ||
3112 | SH_PFC_PIN_GROUP(i2c1_c), | ||
3113 | SH_PFC_PIN_GROUP(i2c1_d), | ||
3114 | SH_PFC_PIN_GROUP(i2c1_e), | ||
3115 | SH_PFC_PIN_GROUP(i2c2), | ||
3116 | SH_PFC_PIN_GROUP(i2c2_b), | ||
3117 | SH_PFC_PIN_GROUP(i2c2_c), | ||
3118 | SH_PFC_PIN_GROUP(i2c2_d), | ||
3119 | SH_PFC_PIN_GROUP(i2c3), | ||
3120 | SH_PFC_PIN_GROUP(i2c3_b), | ||
3121 | SH_PFC_PIN_GROUP(i2c3_c), | ||
3122 | SH_PFC_PIN_GROUP(i2c3_d), | ||
3123 | SH_PFC_PIN_GROUP(i2c4), | ||
3124 | SH_PFC_PIN_GROUP(i2c4_b), | ||
3125 | SH_PFC_PIN_GROUP(i2c4_c), | ||
2969 | SH_PFC_PIN_GROUP(intc_irq0), | 3126 | SH_PFC_PIN_GROUP(intc_irq0), |
2970 | SH_PFC_PIN_GROUP(intc_irq1), | 3127 | SH_PFC_PIN_GROUP(intc_irq1), |
2971 | SH_PFC_PIN_GROUP(intc_irq2), | 3128 | SH_PFC_PIN_GROUP(intc_irq2), |
@@ -3144,6 +3301,40 @@ static const char * const eth_groups[] = { | |||
3144 | "eth_rmii", | 3301 | "eth_rmii", |
3145 | }; | 3302 | }; |
3146 | 3303 | ||
3304 | static const char * const i2c0_groups[] = { | ||
3305 | "i2c0", | ||
3306 | "i2c0_b", | ||
3307 | "i2c0_c", | ||
3308 | }; | ||
3309 | |||
3310 | static const char * const i2c1_groups[] = { | ||
3311 | "i2c1", | ||
3312 | "i2c1_b", | ||
3313 | "i2c1_c", | ||
3314 | "i2c1_d", | ||
3315 | "i2c1_e", | ||
3316 | }; | ||
3317 | |||
3318 | static const char * const i2c2_groups[] = { | ||
3319 | "i2c2", | ||
3320 | "i2c2_b", | ||
3321 | "i2c2_c", | ||
3322 | "i2c2_d", | ||
3323 | }; | ||
3324 | |||
3325 | static const char * const i2c3_groups[] = { | ||
3326 | "i2c3", | ||
3327 | "i2c3_b", | ||
3328 | "i2c3_c", | ||
3329 | "i2c3_d", | ||
3330 | }; | ||
3331 | |||
3332 | static const char * const i2c4_groups[] = { | ||
3333 | "i2c4", | ||
3334 | "i2c4_b", | ||
3335 | "i2c4_c", | ||
3336 | }; | ||
3337 | |||
3147 | static const char * const intc_groups[] = { | 3338 | static const char * const intc_groups[] = { |
3148 | "intc_irq0", | 3339 | "intc_irq0", |
3149 | "intc_irq1", | 3340 | "intc_irq1", |
@@ -3370,6 +3561,11 @@ static const struct sh_pfc_function pinmux_functions[] = { | |||
3370 | SH_PFC_FUNCTION(du0), | 3561 | SH_PFC_FUNCTION(du0), |
3371 | SH_PFC_FUNCTION(du1), | 3562 | SH_PFC_FUNCTION(du1), |
3372 | SH_PFC_FUNCTION(eth), | 3563 | SH_PFC_FUNCTION(eth), |
3564 | SH_PFC_FUNCTION(i2c0), | ||
3565 | SH_PFC_FUNCTION(i2c1), | ||
3566 | SH_PFC_FUNCTION(i2c2), | ||
3567 | SH_PFC_FUNCTION(i2c3), | ||
3568 | SH_PFC_FUNCTION(i2c4), | ||
3373 | SH_PFC_FUNCTION(intc), | 3569 | SH_PFC_FUNCTION(intc), |
3374 | SH_PFC_FUNCTION(mmc), | 3570 | SH_PFC_FUNCTION(mmc), |
3375 | SH_PFC_FUNCTION(msiof0), | 3571 | SH_PFC_FUNCTION(msiof0), |