diff options
author | Valentine Barshak <valentine.barshak@cogentembedded.com> | 2013-12-25 14:36:01 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-01-07 10:48:50 -0500 |
commit | 8e32c9671f84acd89d868659b86834e2f1b29f25 (patch) | |
tree | 2be3d026a625b1947ab7410ac8e425b4a61cb768 /drivers/pinctrl | |
parent | 5e5a298cdb7c7e2eeb3d5d74e1b0a638d14cdd14 (diff) |
pinctrl: sh-pfc: r8a7791: Add VIN pins
This adds VIN[0-2] pinmux support to r8a7791 SoC.
VIN1 B mirror is also added along with the primary
configuration since it's the only one that provides
access to all 24 data bits on VIN1.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 360 |
1 files changed, 360 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c index 70a74da35379..c3a336a9157d 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c | |||
@@ -2667,6 +2667,290 @@ static const unsigned int usb1_mux[] = { | |||
2667 | USB1_OVC_MARK, | 2667 | USB1_OVC_MARK, |
2668 | }; | 2668 | }; |
2669 | 2669 | ||
2670 | union vin_data { | ||
2671 | unsigned int data24[24]; | ||
2672 | unsigned int data20[20]; | ||
2673 | unsigned int data16[16]; | ||
2674 | unsigned int data12[12]; | ||
2675 | unsigned int data10[10]; | ||
2676 | unsigned int data8[8]; | ||
2677 | }; | ||
2678 | |||
2679 | #define VIN_DATA_PIN_GROUP(n, s) \ | ||
2680 | { \ | ||
2681 | .name = #n#s, \ | ||
2682 | .pins = n##_pins.data##s, \ | ||
2683 | .mux = n##_mux.data##s, \ | ||
2684 | .nr_pins = ARRAY_SIZE(n##_pins.data##s), \ | ||
2685 | } | ||
2686 | |||
2687 | /* - VIN0 ------------------------------------------------------------------- */ | ||
2688 | static const union vin_data vin0_data_pins = { | ||
2689 | .data24 = { | ||
2690 | /* B */ | ||
2691 | RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 6), | ||
2692 | RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), | ||
2693 | RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), | ||
2694 | RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), | ||
2695 | /* G */ | ||
2696 | RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), | ||
2697 | RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), | ||
2698 | RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18), | ||
2699 | RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 20), | ||
2700 | /* R */ | ||
2701 | RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 22), | ||
2702 | RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 24), | ||
2703 | RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 26), | ||
2704 | RCAR_GP_PIN(4, 27), RCAR_GP_PIN(4, 28), | ||
2705 | }, | ||
2706 | }; | ||
2707 | static const union vin_data vin0_data_mux = { | ||
2708 | .data24 = { | ||
2709 | /* B */ | ||
2710 | VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, | ||
2711 | VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, | ||
2712 | VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, | ||
2713 | VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, | ||
2714 | /* G */ | ||
2715 | VI0_G0_MARK, VI0_G1_MARK, | ||
2716 | VI0_G2_MARK, VI0_G3_MARK, | ||
2717 | VI0_G4_MARK, VI0_G5_MARK, | ||
2718 | VI0_G6_MARK, VI0_G7_MARK, | ||
2719 | /* R */ | ||
2720 | VI0_R0_MARK, VI0_R1_MARK, | ||
2721 | VI0_R2_MARK, VI0_R3_MARK, | ||
2722 | VI0_R4_MARK, VI0_R5_MARK, | ||
2723 | VI0_R6_MARK, VI0_R7_MARK, | ||
2724 | }, | ||
2725 | }; | ||
2726 | static const unsigned int vin0_data18_pins[] = { | ||
2727 | /* B */ | ||
2728 | RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8), | ||
2729 | RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10), | ||
2730 | RCAR_GP_PIN(4, 11), RCAR_GP_PIN(4, 12), | ||
2731 | /* G */ | ||
2732 | RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16), | ||
2733 | RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18), | ||
2734 | RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 20), | ||
2735 | /* R */ | ||
2736 | RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 24), | ||
2737 | RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 26), | ||
2738 | RCAR_GP_PIN(4, 27), RCAR_GP_PIN(4, 28), | ||
2739 | }; | ||
2740 | static const unsigned int vin0_data18_mux[] = { | ||
2741 | /* B */ | ||
2742 | VI0_DATA2_VI0_B2_MARK, VI0_DATA3_VI0_B3_MARK, | ||
2743 | VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, | ||
2744 | VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, | ||
2745 | /* G */ | ||
2746 | VI0_G2_MARK, VI0_G3_MARK, | ||
2747 | VI0_G4_MARK, VI0_G5_MARK, | ||
2748 | VI0_G6_MARK, VI0_G7_MARK, | ||
2749 | /* R */ | ||
2750 | VI0_R2_MARK, VI0_R3_MARK, | ||
2751 | VI0_R4_MARK, VI0_R5_MARK, | ||
2752 | VI0_R6_MARK, VI0_R7_MARK, | ||
2753 | }; | ||
2754 | static const unsigned int vin0_sync_pins[] = { | ||
2755 | RCAR_GP_PIN(4, 3), /* HSYNC */ | ||
2756 | RCAR_GP_PIN(4, 4), /* VSYNC */ | ||
2757 | }; | ||
2758 | static const unsigned int vin0_sync_mux[] = { | ||
2759 | VI0_HSYNC_N_MARK, | ||
2760 | VI0_VSYNC_N_MARK, | ||
2761 | }; | ||
2762 | static const unsigned int vin0_field_pins[] = { | ||
2763 | RCAR_GP_PIN(4, 2), | ||
2764 | }; | ||
2765 | static const unsigned int vin0_field_mux[] = { | ||
2766 | VI0_FIELD_MARK, | ||
2767 | }; | ||
2768 | static const unsigned int vin0_clkenb_pins[] = { | ||
2769 | RCAR_GP_PIN(4, 1), | ||
2770 | }; | ||
2771 | static const unsigned int vin0_clkenb_mux[] = { | ||
2772 | VI0_CLKENB_MARK, | ||
2773 | }; | ||
2774 | static const unsigned int vin0_clk_pins[] = { | ||
2775 | RCAR_GP_PIN(4, 0), | ||
2776 | }; | ||
2777 | static const unsigned int vin0_clk_mux[] = { | ||
2778 | VI0_CLK_MARK, | ||
2779 | }; | ||
2780 | /* - VIN1 ----------------------------------------------------------------- */ | ||
2781 | static const unsigned int vin1_data8_pins[] = { | ||
2782 | RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), | ||
2783 | RCAR_GP_PIN(5, 7), RCAR_GP_PIN(5, 8), | ||
2784 | RCAR_GP_PIN(5, 9), RCAR_GP_PIN(5, 10), | ||
2785 | RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 12), | ||
2786 | }; | ||
2787 | static const unsigned int vin1_data8_mux[] = { | ||
2788 | VI1_DATA0_MARK, VI1_DATA1_MARK, | ||
2789 | VI1_DATA2_MARK, VI1_DATA3_MARK, | ||
2790 | VI1_DATA4_MARK, VI1_DATA5_MARK, | ||
2791 | VI1_DATA6_MARK, VI1_DATA7_MARK, | ||
2792 | }; | ||
2793 | static const unsigned int vin1_sync_pins[] = { | ||
2794 | RCAR_GP_PIN(5, 0), /* HSYNC */ | ||
2795 | RCAR_GP_PIN(5, 1), /* VSYNC */ | ||
2796 | }; | ||
2797 | static const unsigned int vin1_sync_mux[] = { | ||
2798 | VI1_HSYNC_N_MARK, | ||
2799 | VI1_VSYNC_N_MARK, | ||
2800 | }; | ||
2801 | static const unsigned int vin1_field_pins[] = { | ||
2802 | RCAR_GP_PIN(5, 3), | ||
2803 | }; | ||
2804 | static const unsigned int vin1_field_mux[] = { | ||
2805 | VI1_FIELD_MARK, | ||
2806 | }; | ||
2807 | static const unsigned int vin1_clkenb_pins[] = { | ||
2808 | RCAR_GP_PIN(5, 2), | ||
2809 | }; | ||
2810 | static const unsigned int vin1_clkenb_mux[] = { | ||
2811 | VI1_CLKENB_MARK, | ||
2812 | }; | ||
2813 | static const unsigned int vin1_clk_pins[] = { | ||
2814 | RCAR_GP_PIN(5, 4), | ||
2815 | }; | ||
2816 | static const unsigned int vin1_clk_mux[] = { | ||
2817 | VI1_CLK_MARK, | ||
2818 | }; | ||
2819 | static const union vin_data vin1_b_data_pins = { | ||
2820 | .data24 = { | ||
2821 | /* B */ | ||
2822 | RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1), | ||
2823 | RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), | ||
2824 | RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), | ||
2825 | RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), | ||
2826 | /* G */ | ||
2827 | RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25), | ||
2828 | RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), | ||
2829 | RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), | ||
2830 | RCAR_GP_PIN(7, 21), RCAR_GP_PIN(7, 22), | ||
2831 | /* R */ | ||
2832 | RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 6), | ||
2833 | RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), | ||
2834 | RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 18), | ||
2835 | RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 20), | ||
2836 | }, | ||
2837 | }; | ||
2838 | static const union vin_data vin1_b_data_mux = { | ||
2839 | .data24 = { | ||
2840 | /* B */ | ||
2841 | VI1_DATA0_B_MARK, VI1_DATA1_B_MARK, | ||
2842 | VI1_DATA2_B_MARK, VI1_DATA3_B_MARK, | ||
2843 | VI1_DATA4_B_MARK, VI1_DATA5_B_MARK, | ||
2844 | VI1_DATA6_B_MARK, VI1_DATA7_B_MARK, | ||
2845 | /* G */ | ||
2846 | VI1_G0_B_MARK, VI1_G1_B_MARK, | ||
2847 | VI1_G2_B_MARK, VI1_G3_B_MARK, | ||
2848 | VI1_G4_B_MARK, VI1_G5_B_MARK, | ||
2849 | VI1_G6_B_MARK, VI1_G7_B_MARK, | ||
2850 | /* R */ | ||
2851 | VI1_R0_B_MARK, VI1_R1_B_MARK, | ||
2852 | VI1_R2_B_MARK, VI1_R3_B_MARK, | ||
2853 | VI1_R4_B_MARK, VI1_R5_B_MARK, | ||
2854 | VI1_R6_B_MARK, VI1_R7_B_MARK, | ||
2855 | }, | ||
2856 | }; | ||
2857 | static const unsigned int vin1_b_data18_pins[] = { | ||
2858 | /* B */ | ||
2859 | RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), | ||
2860 | RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), | ||
2861 | RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), | ||
2862 | /* G */ | ||
2863 | RCAR_GP_PIN(6, 26), RCAR_GP_PIN(6, 27), | ||
2864 | RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29), | ||
2865 | RCAR_GP_PIN(7, 21), RCAR_GP_PIN(7, 22), | ||
2866 | /* R */ | ||
2867 | RCAR_GP_PIN(2, 15), RCAR_GP_PIN(2, 16), | ||
2868 | RCAR_GP_PIN(2, 17), RCAR_GP_PIN(2, 18), | ||
2869 | RCAR_GP_PIN(2, 19), RCAR_GP_PIN(2, 20), | ||
2870 | }; | ||
2871 | static const unsigned int vin1_b_data18_mux[] = { | ||
2872 | /* B */ | ||
2873 | VI1_DATA0_B_MARK, VI1_DATA1_B_MARK, | ||
2874 | VI1_DATA2_B_MARK, VI1_DATA3_B_MARK, | ||
2875 | VI1_DATA4_B_MARK, VI1_DATA5_B_MARK, | ||
2876 | VI1_DATA6_B_MARK, VI1_DATA7_B_MARK, | ||
2877 | /* G */ | ||
2878 | VI1_G0_B_MARK, VI1_G1_B_MARK, | ||
2879 | VI1_G2_B_MARK, VI1_G3_B_MARK, | ||
2880 | VI1_G4_B_MARK, VI1_G5_B_MARK, | ||
2881 | VI1_G6_B_MARK, VI1_G7_B_MARK, | ||
2882 | /* R */ | ||
2883 | VI1_R0_B_MARK, VI1_R1_B_MARK, | ||
2884 | VI1_R2_B_MARK, VI1_R3_B_MARK, | ||
2885 | VI1_R4_B_MARK, VI1_R5_B_MARK, | ||
2886 | VI1_R6_B_MARK, VI1_R7_B_MARK, | ||
2887 | }; | ||
2888 | static const unsigned int vin1_b_sync_pins[] = { | ||
2889 | RCAR_GP_PIN(3, 17), /* HSYNC */ | ||
2890 | RCAR_GP_PIN(3, 18), /* VSYNC */ | ||
2891 | }; | ||
2892 | static const unsigned int vin1_b_sync_mux[] = { | ||
2893 | VI1_HSYNC_N_B_MARK, | ||
2894 | VI1_VSYNC_N_B_MARK, | ||
2895 | }; | ||
2896 | static const unsigned int vin1_b_field_pins[] = { | ||
2897 | RCAR_GP_PIN(3, 20), | ||
2898 | }; | ||
2899 | static const unsigned int vin1_b_field_mux[] = { | ||
2900 | VI1_FIELD_B_MARK, | ||
2901 | }; | ||
2902 | static const unsigned int vin1_b_clkenb_pins[] = { | ||
2903 | RCAR_GP_PIN(3, 19), | ||
2904 | }; | ||
2905 | static const unsigned int vin1_b_clkenb_mux[] = { | ||
2906 | VI1_CLKENB_B_MARK, | ||
2907 | }; | ||
2908 | static const unsigned int vin1_b_clk_pins[] = { | ||
2909 | RCAR_GP_PIN(3, 16), | ||
2910 | }; | ||
2911 | static const unsigned int vin1_b_clk_mux[] = { | ||
2912 | VI1_CLK_B_MARK, | ||
2913 | }; | ||
2914 | /* - VIN2 ----------------------------------------------------------------- */ | ||
2915 | static const unsigned int vin2_data8_pins[] = { | ||
2916 | RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 21), | ||
2917 | RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23), | ||
2918 | RCAR_GP_PIN(4, 24), RCAR_GP_PIN(4, 25), | ||
2919 | RCAR_GP_PIN(4, 26), RCAR_GP_PIN(4, 27), | ||
2920 | }; | ||
2921 | static const unsigned int vin2_data8_mux[] = { | ||
2922 | VI2_DATA0_MARK, VI2_DATA1_MARK, | ||
2923 | VI2_DATA2_MARK, VI2_DATA3_MARK, | ||
2924 | VI2_DATA4_MARK, VI2_DATA5_MARK, | ||
2925 | VI2_DATA6_MARK, VI2_DATA7_MARK, | ||
2926 | }; | ||
2927 | static const unsigned int vin2_sync_pins[] = { | ||
2928 | RCAR_GP_PIN(4, 15), /* HSYNC */ | ||
2929 | RCAR_GP_PIN(4, 16), /* VSYNC */ | ||
2930 | }; | ||
2931 | static const unsigned int vin2_sync_mux[] = { | ||
2932 | VI2_HSYNC_N_MARK, | ||
2933 | VI2_VSYNC_N_MARK, | ||
2934 | }; | ||
2935 | static const unsigned int vin2_field_pins[] = { | ||
2936 | RCAR_GP_PIN(4, 18), | ||
2937 | }; | ||
2938 | static const unsigned int vin2_field_mux[] = { | ||
2939 | VI2_FIELD_MARK, | ||
2940 | }; | ||
2941 | static const unsigned int vin2_clkenb_pins[] = { | ||
2942 | RCAR_GP_PIN(4, 17), | ||
2943 | }; | ||
2944 | static const unsigned int vin2_clkenb_mux[] = { | ||
2945 | VI2_CLKENB_MARK, | ||
2946 | }; | ||
2947 | static const unsigned int vin2_clk_pins[] = { | ||
2948 | RCAR_GP_PIN(4, 19), | ||
2949 | }; | ||
2950 | static const unsigned int vin2_clk_mux[] = { | ||
2951 | VI2_CLK_MARK, | ||
2952 | }; | ||
2953 | |||
2670 | static const struct sh_pfc_pin_group pinmux_groups[] = { | 2954 | static const struct sh_pfc_pin_group pinmux_groups[] = { |
2671 | SH_PFC_PIN_GROUP(du_rgb666), | 2955 | SH_PFC_PIN_GROUP(du_rgb666), |
2672 | SH_PFC_PIN_GROUP(du_rgb888), | 2956 | SH_PFC_PIN_GROUP(du_rgb888), |
@@ -2800,6 +3084,38 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { | |||
2800 | SH_PFC_PIN_GROUP(sdhi2_wp), | 3084 | SH_PFC_PIN_GROUP(sdhi2_wp), |
2801 | SH_PFC_PIN_GROUP(usb0), | 3085 | SH_PFC_PIN_GROUP(usb0), |
2802 | SH_PFC_PIN_GROUP(usb1), | 3086 | SH_PFC_PIN_GROUP(usb1), |
3087 | VIN_DATA_PIN_GROUP(vin0_data, 24), | ||
3088 | VIN_DATA_PIN_GROUP(vin0_data, 20), | ||
3089 | SH_PFC_PIN_GROUP(vin0_data18), | ||
3090 | VIN_DATA_PIN_GROUP(vin0_data, 16), | ||
3091 | VIN_DATA_PIN_GROUP(vin0_data, 12), | ||
3092 | VIN_DATA_PIN_GROUP(vin0_data, 10), | ||
3093 | VIN_DATA_PIN_GROUP(vin0_data, 8), | ||
3094 | SH_PFC_PIN_GROUP(vin0_sync), | ||
3095 | SH_PFC_PIN_GROUP(vin0_field), | ||
3096 | SH_PFC_PIN_GROUP(vin0_clkenb), | ||
3097 | SH_PFC_PIN_GROUP(vin0_clk), | ||
3098 | SH_PFC_PIN_GROUP(vin1_data8), | ||
3099 | SH_PFC_PIN_GROUP(vin1_sync), | ||
3100 | SH_PFC_PIN_GROUP(vin1_field), | ||
3101 | SH_PFC_PIN_GROUP(vin1_clkenb), | ||
3102 | SH_PFC_PIN_GROUP(vin1_clk), | ||
3103 | VIN_DATA_PIN_GROUP(vin1_b_data, 24), | ||
3104 | VIN_DATA_PIN_GROUP(vin1_b_data, 20), | ||
3105 | SH_PFC_PIN_GROUP(vin1_b_data18), | ||
3106 | VIN_DATA_PIN_GROUP(vin1_b_data, 16), | ||
3107 | VIN_DATA_PIN_GROUP(vin1_b_data, 12), | ||
3108 | VIN_DATA_PIN_GROUP(vin1_b_data, 10), | ||
3109 | VIN_DATA_PIN_GROUP(vin1_b_data, 8), | ||
3110 | SH_PFC_PIN_GROUP(vin1_b_sync), | ||
3111 | SH_PFC_PIN_GROUP(vin1_b_field), | ||
3112 | SH_PFC_PIN_GROUP(vin1_b_clkenb), | ||
3113 | SH_PFC_PIN_GROUP(vin1_b_clk), | ||
3114 | SH_PFC_PIN_GROUP(vin2_data8), | ||
3115 | SH_PFC_PIN_GROUP(vin2_sync), | ||
3116 | SH_PFC_PIN_GROUP(vin2_field), | ||
3117 | SH_PFC_PIN_GROUP(vin2_clkenb), | ||
3118 | SH_PFC_PIN_GROUP(vin2_clk), | ||
2803 | }; | 3119 | }; |
2804 | 3120 | ||
2805 | static const char * const du_groups[] = { | 3121 | static const char * const du_groups[] = { |
@@ -3008,6 +3324,47 @@ static const char * const usb1_groups[] = { | |||
3008 | "usb1", | 3324 | "usb1", |
3009 | }; | 3325 | }; |
3010 | 3326 | ||
3327 | static const char * const vin0_groups[] = { | ||
3328 | "vin0_data24", | ||
3329 | "vin0_data20", | ||
3330 | "vin0_data18", | ||
3331 | "vin0_data16", | ||
3332 | "vin0_data12", | ||
3333 | "vin0_data10", | ||
3334 | "vin0_data8", | ||
3335 | "vin0_sync", | ||
3336 | "vin0_field", | ||
3337 | "vin0_clkenb", | ||
3338 | "vin0_clk", | ||
3339 | }; | ||
3340 | |||
3341 | static const char * const vin1_groups[] = { | ||
3342 | "vin1_data8", | ||
3343 | "vin1_sync", | ||
3344 | "vin1_field", | ||
3345 | "vin1_clkenb", | ||
3346 | "vin1_clk", | ||
3347 | "vin1_b_data24", | ||
3348 | "vin1_b_data20", | ||
3349 | "vin1_b_data18", | ||
3350 | "vin1_b_data16", | ||
3351 | "vin1_b_data12", | ||
3352 | "vin1_b_data10", | ||
3353 | "vin1_b_data8", | ||
3354 | "vin1_b_sync", | ||
3355 | "vin1_b_field", | ||
3356 | "vin1_b_clkenb", | ||
3357 | "vin1_b_clk", | ||
3358 | }; | ||
3359 | |||
3360 | static const char * const vin2_groups[] = { | ||
3361 | "vin2_data8", | ||
3362 | "vin2_sync", | ||
3363 | "vin2_field", | ||
3364 | "vin2_clkenb", | ||
3365 | "vin2_clk", | ||
3366 | }; | ||
3367 | |||
3011 | static const struct sh_pfc_function pinmux_functions[] = { | 3368 | static const struct sh_pfc_function pinmux_functions[] = { |
3012 | SH_PFC_FUNCTION(du), | 3369 | SH_PFC_FUNCTION(du), |
3013 | SH_PFC_FUNCTION(du0), | 3370 | SH_PFC_FUNCTION(du0), |
@@ -3038,6 +3395,9 @@ static const struct sh_pfc_function pinmux_functions[] = { | |||
3038 | SH_PFC_FUNCTION(sdhi2), | 3395 | SH_PFC_FUNCTION(sdhi2), |
3039 | SH_PFC_FUNCTION(usb0), | 3396 | SH_PFC_FUNCTION(usb0), |
3040 | SH_PFC_FUNCTION(usb1), | 3397 | SH_PFC_FUNCTION(usb1), |
3398 | SH_PFC_FUNCTION(vin0), | ||
3399 | SH_PFC_FUNCTION(vin1), | ||
3400 | SH_PFC_FUNCTION(vin2), | ||
3041 | }; | 3401 | }; |
3042 | 3402 | ||
3043 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { | 3403 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { |