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authorTomasz Figa <tomasz.figa@gmail.com>2014-09-23 15:05:39 -0400
committerTomasz Figa <tomasz.figa@gmail.com>2014-11-09 07:10:28 -0500
commit94ce944bed8a849a9b83b4e66f0e6e4abc16c457 (patch)
tree0cdde9576b2e8553207277fa7f6562caf176396d /drivers/pinctrl
parente06deff967d29beffceeaffc4cdc90aacbd34898 (diff)
pinctrl: samsung: Constify samsung_pin_bank_type struct
This structure is not intended to be modified at runtime and functions as constant data shared between multiple pin banks. This patch makes all instances of it constant across the driver. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/samsung/pinctrl-exynos.c8
-rw-r--r--drivers/pinctrl/samsung/pinctrl-s3c24xx.c6
-rw-r--r--drivers/pinctrl/samsung/pinctrl-s3c64xx.c14
-rw-r--r--drivers/pinctrl/samsung/pinctrl-samsung.c20
-rw-r--r--drivers/pinctrl/samsung/pinctrl-samsung.h2
5 files changed, 24 insertions, 26 deletions
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index 7e6463f970ff..0202e0016233 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -46,12 +46,12 @@ static inline struct exynos_irq_chip *to_exynos_irq_chip(struct irq_chip *chip)
46 return container_of(chip, struct exynos_irq_chip, chip); 46 return container_of(chip, struct exynos_irq_chip, chip);
47} 47}
48 48
49static struct samsung_pin_bank_type bank_type_off = { 49static const struct samsung_pin_bank_type bank_type_off = {
50 .fld_width = { 4, 1, 2, 2, 2, 2, }, 50 .fld_width = { 4, 1, 2, 2, 2, 2, },
51 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, }, 51 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, },
52}; 52};
53 53
54static struct samsung_pin_bank_type bank_type_alive = { 54static const struct samsung_pin_bank_type bank_type_alive = {
55 .fld_width = { 4, 1, 2, 2, }, 55 .fld_width = { 4, 1, 2, 2, },
56 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, }, 56 .reg_offset = { 0x00, 0x04, 0x08, 0x0c, },
57}; 57};
@@ -171,7 +171,7 @@ static int exynos_irq_request_resources(struct irq_data *irqd)
171 struct irq_chip *chip = irq_data_get_irq_chip(irqd); 171 struct irq_chip *chip = irq_data_get_irq_chip(irqd);
172 struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip); 172 struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
173 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); 173 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
174 struct samsung_pin_bank_type *bank_type = bank->type; 174 const struct samsung_pin_bank_type *bank_type = bank->type;
175 struct samsung_pinctrl_drv_data *d = bank->drvdata; 175 struct samsung_pinctrl_drv_data *d = bank->drvdata;
176 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq; 176 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
177 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; 177 unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
@@ -210,7 +210,7 @@ static void exynos_irq_release_resources(struct irq_data *irqd)
210 struct irq_chip *chip = irq_data_get_irq_chip(irqd); 210 struct irq_chip *chip = irq_data_get_irq_chip(irqd);
211 struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip); 211 struct exynos_irq_chip *our_chip = to_exynos_irq_chip(chip);
212 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); 212 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd);
213 struct samsung_pin_bank_type *bank_type = bank->type; 213 const struct samsung_pin_bank_type *bank_type = bank->type;
214 struct samsung_pinctrl_drv_data *d = bank->drvdata; 214 struct samsung_pinctrl_drv_data *d = bank->drvdata;
215 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq; 215 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq;
216 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; 216 unsigned long reg_con = our_chip->eint_con + bank->eint_offset;
diff --git a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c b/drivers/pinctrl/samsung/pinctrl-s3c24xx.c
index e38925906bd3..9db6cf5c8823 100644
--- a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c
+++ b/drivers/pinctrl/samsung/pinctrl-s3c24xx.c
@@ -44,12 +44,12 @@
44#define EINT_EDGE_BOTH 6 44#define EINT_EDGE_BOTH 6
45#define EINT_MASK 0xf 45#define EINT_MASK 0xf
46 46
47static struct samsung_pin_bank_type bank_type_1bit = { 47static const struct samsung_pin_bank_type bank_type_1bit = {
48 .fld_width = { 1, 1, }, 48 .fld_width = { 1, 1, },
49 .reg_offset = { 0x00, 0x04, }, 49 .reg_offset = { 0x00, 0x04, },
50}; 50};
51 51
52static struct samsung_pin_bank_type bank_type_2bit = { 52static const struct samsung_pin_bank_type bank_type_2bit = {
53 .fld_width = { 2, 1, 2, }, 53 .fld_width = { 2, 1, 2, },
54 .reg_offset = { 0x00, 0x04, 0x08, }, 54 .reg_offset = { 0x00, 0x04, 0x08, },
55}; 55};
@@ -143,7 +143,7 @@ static void s3c24xx_eint_set_handler(unsigned int irq, unsigned int type)
143static void s3c24xx_eint_set_function(struct samsung_pinctrl_drv_data *d, 143static void s3c24xx_eint_set_function(struct samsung_pinctrl_drv_data *d,
144 struct samsung_pin_bank *bank, int pin) 144 struct samsung_pin_bank *bank, int pin)
145{ 145{
146 struct samsung_pin_bank_type *bank_type = bank->type; 146 const struct samsung_pin_bank_type *bank_type = bank->type;
147 unsigned long flags; 147 unsigned long flags;
148 void __iomem *reg; 148 void __iomem *reg;
149 u8 shift; 149 u8 shift;
diff --git a/drivers/pinctrl/samsung/pinctrl-s3c64xx.c b/drivers/pinctrl/samsung/pinctrl-s3c64xx.c
index fcf8c36e727e..2a14db2826d8 100644
--- a/drivers/pinctrl/samsung/pinctrl-s3c64xx.c
+++ b/drivers/pinctrl/samsung/pinctrl-s3c64xx.c
@@ -68,32 +68,32 @@
68#define EINT_CON_MASK 0xF 68#define EINT_CON_MASK 0xF
69#define EINT_CON_LEN 4 69#define EINT_CON_LEN 4
70 70
71static struct samsung_pin_bank_type bank_type_4bit_off = { 71static const struct samsung_pin_bank_type bank_type_4bit_off = {
72 .fld_width = { 4, 1, 2, 0, 2, 2, }, 72 .fld_width = { 4, 1, 2, 0, 2, 2, },
73 .reg_offset = { 0x00, 0x04, 0x08, 0, 0x0c, 0x10, }, 73 .reg_offset = { 0x00, 0x04, 0x08, 0, 0x0c, 0x10, },
74}; 74};
75 75
76static struct samsung_pin_bank_type bank_type_4bit_alive = { 76static const struct samsung_pin_bank_type bank_type_4bit_alive = {
77 .fld_width = { 4, 1, 2, }, 77 .fld_width = { 4, 1, 2, },
78 .reg_offset = { 0x00, 0x04, 0x08, }, 78 .reg_offset = { 0x00, 0x04, 0x08, },
79}; 79};
80 80
81static struct samsung_pin_bank_type bank_type_4bit2_off = { 81static const struct samsung_pin_bank_type bank_type_4bit2_off = {
82 .fld_width = { 4, 1, 2, 0, 2, 2, }, 82 .fld_width = { 4, 1, 2, 0, 2, 2, },
83 .reg_offset = { 0x00, 0x08, 0x0c, 0, 0x10, 0x14, }, 83 .reg_offset = { 0x00, 0x08, 0x0c, 0, 0x10, 0x14, },
84}; 84};
85 85
86static struct samsung_pin_bank_type bank_type_4bit2_alive = { 86static const struct samsung_pin_bank_type bank_type_4bit2_alive = {
87 .fld_width = { 4, 1, 2, }, 87 .fld_width = { 4, 1, 2, },
88 .reg_offset = { 0x00, 0x08, 0x0c, }, 88 .reg_offset = { 0x00, 0x08, 0x0c, },
89}; 89};
90 90
91static struct samsung_pin_bank_type bank_type_2bit_off = { 91static const struct samsung_pin_bank_type bank_type_2bit_off = {
92 .fld_width = { 2, 1, 2, 0, 2, 2, }, 92 .fld_width = { 2, 1, 2, 0, 2, 2, },
93 .reg_offset = { 0x00, 0x04, 0x08, 0, 0x0c, 0x10, }, 93 .reg_offset = { 0x00, 0x04, 0x08, 0, 0x0c, 0x10, },
94}; 94};
95 95
96static struct samsung_pin_bank_type bank_type_2bit_alive = { 96static const struct samsung_pin_bank_type bank_type_2bit_alive = {
97 .fld_width = { 2, 1, 2, }, 97 .fld_width = { 2, 1, 2, },
98 .reg_offset = { 0x00, 0x04, 0x08, }, 98 .reg_offset = { 0x00, 0x04, 0x08, },
99}; 99};
@@ -272,7 +272,7 @@ static void s3c64xx_irq_set_handler(unsigned int irq, unsigned int type)
272static void s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d, 272static void s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d,
273 struct samsung_pin_bank *bank, int pin) 273 struct samsung_pin_bank *bank, int pin)
274{ 274{
275 struct samsung_pin_bank_type *bank_type = bank->type; 275 const struct samsung_pin_bank_type *bank_type = bank->type;
276 unsigned long flags; 276 unsigned long flags;
277 void __iomem *reg; 277 void __iomem *reg;
278 u8 shift; 278 u8 shift;
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c
index 8ac750329f58..63a97f1d8a21 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.c
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.c
@@ -366,7 +366,7 @@ static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
366 unsigned group, bool enable) 366 unsigned group, bool enable)
367{ 367{
368 struct samsung_pinctrl_drv_data *drvdata; 368 struct samsung_pinctrl_drv_data *drvdata;
369 struct samsung_pin_bank_type *type; 369 const struct samsung_pin_bank_type *type;
370 struct samsung_pin_bank *bank; 370 struct samsung_pin_bank *bank;
371 void __iomem *reg; 371 void __iomem *reg;
372 u32 mask, shift, data, pin_offset; 372 u32 mask, shift, data, pin_offset;
@@ -422,7 +422,7 @@ static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
422 unsigned long *config, bool set) 422 unsigned long *config, bool set)
423{ 423{
424 struct samsung_pinctrl_drv_data *drvdata; 424 struct samsung_pinctrl_drv_data *drvdata;
425 struct samsung_pin_bank_type *type; 425 const struct samsung_pin_bank_type *type;
426 struct samsung_pin_bank *bank; 426 struct samsung_pin_bank *bank;
427 void __iomem *reg_base; 427 void __iomem *reg_base;
428 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); 428 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
@@ -528,7 +528,7 @@ static const struct pinconf_ops samsung_pinconf_ops = {
528static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) 528static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
529{ 529{
530 struct samsung_pin_bank *bank = gc_to_pin_bank(gc); 530 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
531 struct samsung_pin_bank_type *type = bank->type; 531 const struct samsung_pin_bank_type *type = bank->type;
532 unsigned long flags; 532 unsigned long flags;
533 void __iomem *reg; 533 void __iomem *reg;
534 u32 data; 534 u32 data;
@@ -552,7 +552,7 @@ static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
552 void __iomem *reg; 552 void __iomem *reg;
553 u32 data; 553 u32 data;
554 struct samsung_pin_bank *bank = gc_to_pin_bank(gc); 554 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
555 struct samsung_pin_bank_type *type = bank->type; 555 const struct samsung_pin_bank_type *type = bank->type;
556 556
557 reg = bank->drvdata->virt_base + bank->pctl_offset; 557 reg = bank->drvdata->virt_base + bank->pctl_offset;
558 558
@@ -569,7 +569,7 @@ static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
569static int samsung_gpio_set_direction(struct gpio_chip *gc, 569static int samsung_gpio_set_direction(struct gpio_chip *gc,
570 unsigned offset, bool input) 570 unsigned offset, bool input)
571{ 571{
572 struct samsung_pin_bank_type *type; 572 const struct samsung_pin_bank_type *type;
573 struct samsung_pin_bank *bank; 573 struct samsung_pin_bank *bank;
574 struct samsung_pinctrl_drv_data *drvdata; 574 struct samsung_pinctrl_drv_data *drvdata;
575 void __iomem *reg; 575 void __iomem *reg;
@@ -1089,9 +1089,8 @@ static void samsung_pinctrl_suspend_dev(
1089 for (i = 0; i < ctrl->nr_banks; i++) { 1089 for (i = 0; i < ctrl->nr_banks; i++) {
1090 struct samsung_pin_bank *bank = &ctrl->pin_banks[i]; 1090 struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
1091 void __iomem *reg = virt_base + bank->pctl_offset; 1091 void __iomem *reg = virt_base + bank->pctl_offset;
1092 1092 const u8 *offs = bank->type->reg_offset;
1093 u8 *offs = bank->type->reg_offset; 1093 const u8 *widths = bank->type->fld_width;
1094 u8 *widths = bank->type->fld_width;
1095 enum pincfg_type type; 1094 enum pincfg_type type;
1096 1095
1097 /* Registers without a powerdown config aren't lost */ 1096 /* Registers without a powerdown config aren't lost */
@@ -1140,9 +1139,8 @@ static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
1140 for (i = 0; i < ctrl->nr_banks; i++) { 1139 for (i = 0; i < ctrl->nr_banks; i++) {
1141 struct samsung_pin_bank *bank = &ctrl->pin_banks[i]; 1140 struct samsung_pin_bank *bank = &ctrl->pin_banks[i];
1142 void __iomem *reg = virt_base + bank->pctl_offset; 1141 void __iomem *reg = virt_base + bank->pctl_offset;
1143 1142 const u8 *offs = bank->type->reg_offset;
1144 u8 *offs = bank->type->reg_offset; 1143 const u8 *widths = bank->type->fld_width;
1145 u8 *widths = bank->type->fld_width;
1146 enum pincfg_type type; 1144 enum pincfg_type type;
1147 1145
1148 /* Registers without a powerdown config aren't lost */ 1146 /* Registers without a powerdown config aren't lost */
diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
index da527b390513..c67738597d2a 100644
--- a/drivers/pinctrl/samsung/pinctrl-samsung.h
+++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
@@ -131,7 +131,7 @@ struct samsung_pin_bank_type {
131 * @pm_save: saved register values during suspend 131 * @pm_save: saved register values during suspend
132 */ 132 */
133struct samsung_pin_bank { 133struct samsung_pin_bank {
134 struct samsung_pin_bank_type *type; 134 const struct samsung_pin_bank_type *type;
135 u32 pctl_offset; 135 u32 pctl_offset;
136 u32 pin_base; 136 u32 pin_base;
137 u8 nr_pins; 137 u8 nr_pins;