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authorHeiko Stübner <heiko@sntech.de>2013-10-15 19:07:49 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-10-16 09:33:53 -0400
commit65fca613b00aa2aaa008d40304e00b76f4693f60 (patch)
tree9b70a67ff0599436098038138de4bab374afe3d6 /drivers/pinctrl
parenta282926d658209ed1acee51a1ccc897ac169fb41 (diff)
pinctrl: rockchip: add support for multiple bank types
There are Rockchip SoCs, namely the rk3188, that combine a set of regular banks with banks that need special handling for some settings. Therefore add the possibility for the driver to handle more than one bank type. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl-rockchip.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index df155f9b2432..efca1165e955 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -62,6 +62,10 @@ enum rockchip_pinctrl_type {
62 RK3188, 62 RK3188,
63}; 63};
64 64
65enum rockchip_pin_bank_type {
66 COMMON_BANK,
67};
68
65/** 69/**
66 * @reg_base: register base of the gpio bank 70 * @reg_base: register base of the gpio bank
67 * @clk: clock of the gpio bank 71 * @clk: clock of the gpio bank
@@ -86,6 +90,7 @@ struct rockchip_pin_bank {
86 u8 nr_pins; 90 u8 nr_pins;
87 char *name; 91 char *name;
88 u8 bank_num; 92 u8 bank_num;
93 enum rockchip_pin_bank_type bank_type;
89 bool valid; 94 bool valid;
90 struct device_node *of_node; 95 struct device_node *of_node;
91 struct rockchip_pinctrl *drvdata; 96 struct rockchip_pinctrl *drvdata;
@@ -668,7 +673,10 @@ static const struct pinconf_ops rockchip_pinconf_ops = {
668 .pin_config_set = rockchip_pinconf_set, 673 .pin_config_set = rockchip_pinconf_set,
669}; 674};
670 675
671static const char *gpio_compat = "rockchip,gpio-bank"; 676static const struct of_device_id rockchip_bank_match[] = {
677 { .compatible = "rockchip,gpio-bank" },
678 {},
679};
672 680
673static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info, 681static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info,
674 struct device_node *np) 682 struct device_node *np)
@@ -676,7 +684,7 @@ static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info,
676 struct device_node *child; 684 struct device_node *child;
677 685
678 for_each_child_of_node(np, child) { 686 for_each_child_of_node(np, child) {
679 if (of_device_is_compatible(child, gpio_compat)) 687 if (of_match_node(rockchip_bank_match, child))
680 continue; 688 continue;
681 689
682 info->nfunctions++; 690 info->nfunctions++;
@@ -819,8 +827,9 @@ static int rockchip_pinctrl_parse_dt(struct platform_device *pdev,
819 i = 0; 827 i = 0;
820 828
821 for_each_child_of_node(np, child) { 829 for_each_child_of_node(np, child) {
822 if (of_device_is_compatible(child, gpio_compat)) 830 if (of_match_node(rockchip_bank_match, child))
823 continue; 831 continue;
832
824 ret = rockchip_pinctrl_parse_functions(child, info, i++); 833 ret = rockchip_pinctrl_parse_functions(child, info, i++);
825 if (ret) { 834 if (ret) {
826 dev_err(&pdev->dev, "failed to parse function\n"); 835 dev_err(&pdev->dev, "failed to parse function\n");
@@ -1217,6 +1226,8 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank,
1217 if (IS_ERR(bank->reg_base)) 1226 if (IS_ERR(bank->reg_base))
1218 return PTR_ERR(bank->reg_base); 1227 return PTR_ERR(bank->reg_base);
1219 1228
1229 bank->bank_type = COMMON_BANK;
1230
1220 bank->irq = irq_of_parse_and_map(bank->of_node, 0); 1231 bank->irq = irq_of_parse_and_map(bank->of_node, 0);
1221 1232
1222 bank->clk = of_clk_get(bank->of_node, 0); 1233 bank->clk = of_clk_get(bank->of_node, 0);