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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-01-18 16:30:35 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-01-22 07:51:35 -0500
commiteaa3d8489dcdab6facd5b0312af075e543a007dd (patch)
tree1895562983f55ef655d5358c0733c315de81c368 /drivers/pinctrl
parent0e37f88d9ad800f5dd94c9fc9dc304b4e9cb7d2c (diff)
ARM: pinctrl: sunxi: Add the pinctrl pin set for sun5i
Since the Allwinner SoCs variants don't have the same set of pins to handle, we need to declare the pin ranges available. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl-sunxi.c253
1 files changed, 253 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c
index 1a81613e8f77..6f02e3422af9 100644
--- a/drivers/pinctrl/pinctrl-sunxi.c
+++ b/drivers/pinctrl/pinctrl-sunxi.c
@@ -26,6 +26,258 @@
26#include "core.h" 26#include "core.h"
27#include "pinctrl-sunxi.h" 27#include "pinctrl-sunxi.h"
28 28
29static const struct sunxi_desc_pin sun5i_a13_pins[] = {
30 /* Hole */
31 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0,
32 SUNXI_FUNCTION(0x0, "gpio_in"),
33 SUNXI_FUNCTION(0x1, "gpio_out")),
34 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB1,
35 SUNXI_FUNCTION(0x0, "gpio_in"),
36 SUNXI_FUNCTION(0x1, "gpio_out")),
37 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB2,
38 SUNXI_FUNCTION(0x0, "gpio_in"),
39 SUNXI_FUNCTION(0x1, "gpio_out")),
40 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB3,
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out")),
43 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB4,
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out")),
46 /* Hole */
47 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB10,
48 SUNXI_FUNCTION(0x0, "gpio_in"),
49 SUNXI_FUNCTION(0x1, "gpio_out")),
50 /* Hole */
51 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB15,
52 SUNXI_FUNCTION(0x0, "gpio_in"),
53 SUNXI_FUNCTION(0x1, "gpio_out")),
54 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB16,
55 SUNXI_FUNCTION(0x0, "gpio_in"),
56 SUNXI_FUNCTION(0x1, "gpio_out")),
57 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB17,
58 SUNXI_FUNCTION(0x0, "gpio_in"),
59 SUNXI_FUNCTION(0x1, "gpio_out")),
60 SUNXI_PIN(SUNXI_PINCTRL_PIN_PB18,
61 SUNXI_FUNCTION(0x0, "gpio_in"),
62 SUNXI_FUNCTION(0x1, "gpio_out")),
63 /* Hole */
64 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC0,
65 SUNXI_FUNCTION(0x0, "gpio_in"),
66 SUNXI_FUNCTION(0x1, "gpio_out")),
67 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC1,
68 SUNXI_FUNCTION(0x0, "gpio_in"),
69 SUNXI_FUNCTION(0x1, "gpio_out")),
70 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC2,
71 SUNXI_FUNCTION(0x0, "gpio_in"),
72 SUNXI_FUNCTION(0x1, "gpio_out")),
73 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC3,
74 SUNXI_FUNCTION(0x0, "gpio_in"),
75 SUNXI_FUNCTION(0x1, "gpio_out")),
76 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC4,
77 SUNXI_FUNCTION(0x0, "gpio_in"),
78 SUNXI_FUNCTION(0x1, "gpio_out")),
79 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC5,
80 SUNXI_FUNCTION(0x0, "gpio_in"),
81 SUNXI_FUNCTION(0x1, "gpio_out")),
82 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC6,
83 SUNXI_FUNCTION(0x0, "gpio_in"),
84 SUNXI_FUNCTION(0x1, "gpio_out")),
85 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC7,
86 SUNXI_FUNCTION(0x0, "gpio_in"),
87 SUNXI_FUNCTION(0x1, "gpio_out")),
88 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC8,
89 SUNXI_FUNCTION(0x0, "gpio_in"),
90 SUNXI_FUNCTION(0x1, "gpio_out")),
91 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC9,
92 SUNXI_FUNCTION(0x0, "gpio_in"),
93 SUNXI_FUNCTION(0x1, "gpio_out")),
94 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC10,
95 SUNXI_FUNCTION(0x0, "gpio_in"),
96 SUNXI_FUNCTION(0x1, "gpio_out")),
97 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC11,
98 SUNXI_FUNCTION(0x0, "gpio_in"),
99 SUNXI_FUNCTION(0x1, "gpio_out")),
100 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC12,
101 SUNXI_FUNCTION(0x0, "gpio_in"),
102 SUNXI_FUNCTION(0x1, "gpio_out")),
103 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC13,
104 SUNXI_FUNCTION(0x0, "gpio_in"),
105 SUNXI_FUNCTION(0x1, "gpio_out")),
106 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC14,
107 SUNXI_FUNCTION(0x0, "gpio_in"),
108 SUNXI_FUNCTION(0x1, "gpio_out")),
109 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC15,
110 SUNXI_FUNCTION(0x0, "gpio_in"),
111 SUNXI_FUNCTION(0x1, "gpio_out")),
112 /* Hole */
113 SUNXI_PIN(SUNXI_PINCTRL_PIN_PC19,
114 SUNXI_FUNCTION(0x0, "gpio_in"),
115 SUNXI_FUNCTION(0x1, "gpio_out")),
116 /* Hole */
117 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD2,
118 SUNXI_FUNCTION(0x0, "gpio_in"),
119 SUNXI_FUNCTION(0x1, "gpio_out")),
120 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD3,
121 SUNXI_FUNCTION(0x0, "gpio_in"),
122 SUNXI_FUNCTION(0x1, "gpio_out")),
123 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD4,
124 SUNXI_FUNCTION(0x0, "gpio_in"),
125 SUNXI_FUNCTION(0x1, "gpio_out")),
126 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD5,
127 SUNXI_FUNCTION(0x0, "gpio_in"),
128 SUNXI_FUNCTION(0x1, "gpio_out")),
129 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD6,
130 SUNXI_FUNCTION(0x0, "gpio_in"),
131 SUNXI_FUNCTION(0x1, "gpio_out")),
132 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD7,
133 SUNXI_FUNCTION(0x0, "gpio_in"),
134 SUNXI_FUNCTION(0x1, "gpio_out")),
135 /* Hole */
136 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD10,
137 SUNXI_FUNCTION(0x0, "gpio_in"),
138 SUNXI_FUNCTION(0x1, "gpio_out")),
139 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD11,
140 SUNXI_FUNCTION(0x0, "gpio_in"),
141 SUNXI_FUNCTION(0x1, "gpio_out")),
142 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD12,
143 SUNXI_FUNCTION(0x0, "gpio_in"),
144 SUNXI_FUNCTION(0x1, "gpio_out")),
145 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD13,
146 SUNXI_FUNCTION(0x0, "gpio_in"),
147 SUNXI_FUNCTION(0x1, "gpio_out")),
148 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD14,
149 SUNXI_FUNCTION(0x0, "gpio_in"),
150 SUNXI_FUNCTION(0x1, "gpio_out")),
151 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD15,
152 SUNXI_FUNCTION(0x0, "gpio_in"),
153 SUNXI_FUNCTION(0x1, "gpio_out")),
154 /* Hole */
155 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD18,
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out")),
158 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD19,
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out")),
161 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD20,
162 SUNXI_FUNCTION(0x0, "gpio_in"),
163 SUNXI_FUNCTION(0x1, "gpio_out")),
164 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD21,
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out")),
167 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD22,
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out")),
170 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD23,
171 SUNXI_FUNCTION(0x0, "gpio_in"),
172 SUNXI_FUNCTION(0x1, "gpio_out")),
173 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD24,
174 SUNXI_FUNCTION(0x0, "gpio_in"),
175 SUNXI_FUNCTION(0x1, "gpio_out")),
176 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD25,
177 SUNXI_FUNCTION(0x0, "gpio_in"),
178 SUNXI_FUNCTION(0x1, "gpio_out")),
179 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD26,
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out")),
182 SUNXI_PIN(SUNXI_PINCTRL_PIN_PD27,
183 SUNXI_FUNCTION(0x0, "gpio_in"),
184 SUNXI_FUNCTION(0x1, "gpio_out")),
185 /* Hole */
186 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE0,
187 SUNXI_FUNCTION(0x0, "gpio_in"),
188 SUNXI_FUNCTION(0x1, "gpio_out")),
189 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE1,
190 SUNXI_FUNCTION(0x0, "gpio_in"),
191 SUNXI_FUNCTION(0x1, "gpio_out")),
192 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE2,
193 SUNXI_FUNCTION(0x0, "gpio_in"),
194 SUNXI_FUNCTION(0x1, "gpio_out")),
195 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE3,
196 SUNXI_FUNCTION(0x0, "gpio_in"),
197 SUNXI_FUNCTION(0x1, "gpio_out")),
198 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE4,
199 SUNXI_FUNCTION(0x0, "gpio_in"),
200 SUNXI_FUNCTION(0x1, "gpio_out")),
201 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE5,
202 SUNXI_FUNCTION(0x0, "gpio_in"),
203 SUNXI_FUNCTION(0x1, "gpio_out")),
204 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE6,
205 SUNXI_FUNCTION(0x0, "gpio_in"),
206 SUNXI_FUNCTION(0x1, "gpio_out")),
207 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE7,
208 SUNXI_FUNCTION(0x0, "gpio_in"),
209 SUNXI_FUNCTION(0x1, "gpio_out")),
210 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE8,
211 SUNXI_FUNCTION(0x0, "gpio_in"),
212 SUNXI_FUNCTION(0x1, "gpio_out")),
213 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE9,
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out")),
216 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE10,
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x4, "uart1")),
220 SUNXI_PIN(SUNXI_PINCTRL_PIN_PE11,
221 SUNXI_FUNCTION(0x0, "gpio_in"),
222 SUNXI_FUNCTION(0x1, "gpio_out"),
223 SUNXI_FUNCTION(0x4, "uart1")),
224 /* Hole */
225 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,
226 SUNXI_FUNCTION(0x0, "gpio_in"),
227 SUNXI_FUNCTION(0x1, "gpio_out")),
228 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out")),
231 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,
232 SUNXI_FUNCTION(0x0, "gpio_in"),
233 SUNXI_FUNCTION(0x1, "gpio_out")),
234 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,
235 SUNXI_FUNCTION(0x0, "gpio_in"),
236 SUNXI_FUNCTION(0x1, "gpio_out")),
237 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,
238 SUNXI_FUNCTION(0x0, "gpio_in"),
239 SUNXI_FUNCTION(0x1, "gpio_out")),
240 SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,
241 SUNXI_FUNCTION(0x0, "gpio_in"),
242 SUNXI_FUNCTION(0x1, "gpio_out")),
243 /* Hole */
244 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,
245 SUNXI_FUNCTION(0x0, "gpio_in"),
246 SUNXI_FUNCTION(0x1, "gpio_out")),
247 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG1,
248 SUNXI_FUNCTION(0x0, "gpio_in"),
249 SUNXI_FUNCTION(0x1, "gpio_out")),
250 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG2,
251 SUNXI_FUNCTION(0x0, "gpio_in"),
252 SUNXI_FUNCTION(0x1, "gpio_out")),
253 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG3,
254 SUNXI_FUNCTION(0x0, "gpio_in"),
255 SUNXI_FUNCTION(0x1, "gpio_out"),
256 SUNXI_FUNCTION(0x4, "uart1")),
257 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG4,
258 SUNXI_FUNCTION(0x0, "gpio_in"),
259 SUNXI_FUNCTION(0x1, "gpio_out"),
260 SUNXI_FUNCTION(0x4, "uart1")),
261 /* Hole */
262 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG9,
263 SUNXI_FUNCTION(0x0, "gpio_in"),
264 SUNXI_FUNCTION(0x1, "gpio_out")),
265 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG10,
266 SUNXI_FUNCTION(0x0, "gpio_in"),
267 SUNXI_FUNCTION(0x1, "gpio_out")),
268 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG11,
269 SUNXI_FUNCTION(0x0, "gpio_in"),
270 SUNXI_FUNCTION(0x1, "gpio_out")),
271 SUNXI_PIN(SUNXI_PINCTRL_PIN_PG12,
272 SUNXI_FUNCTION(0x0, "gpio_in"),
273 SUNXI_FUNCTION(0x1, "gpio_out")),
274};
275
276static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_data = {
277 .pins = sun5i_a13_pins,
278 .npins = ARRAY_SIZE(sun5i_a13_pins),
279};
280
29static struct sunxi_pinctrl_group * 281static struct sunxi_pinctrl_group *
30sunxi_pinctrl_find_group_by_name(struct sunxi_pinctrl *pctl, const char *group) 282sunxi_pinctrl_find_group_by_name(struct sunxi_pinctrl *pctl, const char *group)
31{ 283{
@@ -371,6 +623,7 @@ static struct pinctrl_desc sunxi_pctrl_desc = {
371}; 623};
372 624
373static struct of_device_id sunxi_pinctrl_match[] = { 625static struct of_device_id sunxi_pinctrl_match[] = {
626 { .compatible = "allwinner,sun5i-a13-pinctrl", .data = (void *)&sun5i_a13_pinctrl_data },
374 {} 627 {}
375}; 628};
376MODULE_DEVICE_TABLE(of, sunxi_pinctrl_match); 629MODULE_DEVICE_TABLE(of, sunxi_pinctrl_match);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-13 21:49:43 -0500