diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2014-03-21 05:24:42 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-03-25 04:57:01 -0400 |
commit | 194e15ba00d90a6e8779b9cd87f1feec0d55427f (patch) | |
tree | 896fbfeed4b9f51dede88b8fba11fe10b1a91b56 /drivers/pinctrl | |
parent | 6a8a0c1d87377c6ce97de2fedc0762c2fa8233ac (diff) |
pinctrl: nomadik: rename secondary to latent
The "secondary irq" in the nomadik pin control driver is actually
not secondary (as in: can occur any time alongside the ordinary
irq), it is a latent IRQ. It is an IRQ that has occurred when
the system was in sleep state and has been cached in a special
register flagged from the low power management unit (PRCM).
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/pinctrl-nomadik.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c index 2ea3f3738eab..41e808d9edb3 100644 --- a/drivers/pinctrl/pinctrl-nomadik.c +++ b/drivers/pinctrl/pinctrl-nomadik.c | |||
@@ -254,7 +254,7 @@ struct nmk_gpio_platform_data { | |||
254 | int first_gpio; | 254 | int first_gpio; |
255 | int first_irq; | 255 | int first_irq; |
256 | int num_gpio; | 256 | int num_gpio; |
257 | u32 (*get_secondary_status)(unsigned int bank); | 257 | u32 (*get_latent_status)(unsigned int bank); |
258 | void (*set_ioforce)(bool enable); | 258 | void (*set_ioforce)(bool enable); |
259 | bool supports_sleepmode; | 259 | bool supports_sleepmode; |
260 | }; | 260 | }; |
@@ -266,8 +266,8 @@ struct nmk_gpio_chip { | |||
266 | struct clk *clk; | 266 | struct clk *clk; |
267 | unsigned int bank; | 267 | unsigned int bank; |
268 | unsigned int parent_irq; | 268 | unsigned int parent_irq; |
269 | int secondary_parent_irq; | 269 | int latent_parent_irq; |
270 | u32 (*get_secondary_status)(unsigned int bank); | 270 | u32 (*get_latent_status)(unsigned int bank); |
271 | void (*set_ioforce)(bool enable); | 271 | void (*set_ioforce)(bool enable); |
272 | spinlock_t lock; | 272 | spinlock_t lock; |
273 | bool sleepmode; | 273 | bool sleepmode; |
@@ -926,11 +926,11 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
926 | __nmk_gpio_irq_handler(irq, desc, status); | 926 | __nmk_gpio_irq_handler(irq, desc, status); |
927 | } | 927 | } |
928 | 928 | ||
929 | static void nmk_gpio_secondary_irq_handler(unsigned int irq, | 929 | static void nmk_gpio_latent_irq_handler(unsigned int irq, |
930 | struct irq_desc *desc) | 930 | struct irq_desc *desc) |
931 | { | 931 | { |
932 | struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq); | 932 | struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq); |
933 | u32 status = nmk_chip->get_secondary_status(nmk_chip->bank); | 933 | u32 status = nmk_chip->get_latent_status(nmk_chip->bank); |
934 | 934 | ||
935 | __nmk_gpio_irq_handler(irq, desc, status); | 935 | __nmk_gpio_irq_handler(irq, desc, status); |
936 | } | 936 | } |
@@ -940,10 +940,10 @@ static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) | |||
940 | irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); | 940 | irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); |
941 | irq_set_handler_data(nmk_chip->parent_irq, nmk_chip); | 941 | irq_set_handler_data(nmk_chip->parent_irq, nmk_chip); |
942 | 942 | ||
943 | if (nmk_chip->secondary_parent_irq >= 0) { | 943 | if (nmk_chip->latent_parent_irq >= 0) { |
944 | irq_set_chained_handler(nmk_chip->secondary_parent_irq, | 944 | irq_set_chained_handler(nmk_chip->latent_parent_irq, |
945 | nmk_gpio_secondary_irq_handler); | 945 | nmk_gpio_latent_irq_handler); |
946 | irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip); | 946 | irq_set_handler_data(nmk_chip->latent_parent_irq, nmk_chip); |
947 | } | 947 | } |
948 | 948 | ||
949 | return 0; | 949 | return 0; |
@@ -1263,7 +1263,7 @@ static int nmk_gpio_probe(struct platform_device *dev) | |||
1263 | struct gpio_chip *chip; | 1263 | struct gpio_chip *chip; |
1264 | struct resource *res; | 1264 | struct resource *res; |
1265 | struct clk *clk; | 1265 | struct clk *clk; |
1266 | int secondary_irq; | 1266 | int latent_irq; |
1267 | void __iomem *base; | 1267 | void __iomem *base; |
1268 | int irq; | 1268 | int irq; |
1269 | int ret; | 1269 | int ret; |
@@ -1287,8 +1287,8 @@ static int nmk_gpio_probe(struct platform_device *dev) | |||
1287 | if (irq < 0) | 1287 | if (irq < 0) |
1288 | return irq; | 1288 | return irq; |
1289 | 1289 | ||
1290 | secondary_irq = platform_get_irq(dev, 1); | 1290 | latent_irq = platform_get_irq(dev, 1); |
1291 | if (secondary_irq >= 0 && !pdata->get_secondary_status) | 1291 | if (latent_irq >= 0 && !pdata->get_latent_status) |
1292 | return -EINVAL; | 1292 | return -EINVAL; |
1293 | 1293 | ||
1294 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | 1294 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
@@ -1314,8 +1314,8 @@ static int nmk_gpio_probe(struct platform_device *dev) | |||
1314 | nmk_chip->addr = base; | 1314 | nmk_chip->addr = base; |
1315 | nmk_chip->chip = nmk_gpio_template; | 1315 | nmk_chip->chip = nmk_gpio_template; |
1316 | nmk_chip->parent_irq = irq; | 1316 | nmk_chip->parent_irq = irq; |
1317 | nmk_chip->secondary_parent_irq = secondary_irq; | 1317 | nmk_chip->latent_parent_irq = latent_irq; |
1318 | nmk_chip->get_secondary_status = pdata->get_secondary_status; | 1318 | nmk_chip->get_latent_status = pdata->get_latent_status; |
1319 | nmk_chip->set_ioforce = pdata->set_ioforce; | 1319 | nmk_chip->set_ioforce = pdata->set_ioforce; |
1320 | nmk_chip->sleepmode = pdata->supports_sleepmode; | 1320 | nmk_chip->sleepmode = pdata->supports_sleepmode; |
1321 | spin_lock_init(&nmk_chip->lock); | 1321 | spin_lock_init(&nmk_chip->lock); |