diff options
author | Vipul Kumar Samar <vipulkumar.samar@st.com> | 2012-10-27 05:17:54 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2012-11-05 06:34:32 -0500 |
commit | 0504271c8dfe2247401de4f153e9224535e622c2 (patch) | |
tree | bee69a0b31fce45ddc65e70089cc1353db78b168 /drivers/pinctrl | |
parent | 35d14806948f0e97e86c3199489ff6a826df1a3c (diff) |
pinctrl: SPEAr1340: Add clcd sleep mode pin configuration
CLCD pads must be configured differently for sleep mode. This patch adds support
for clcd_sleep_pingroup.
Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear1340.c | 39 |
1 files changed, 38 insertions, 1 deletions
diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c index 3963675d514f..0606b8cf3f2c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1340.c +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c | |||
@@ -1692,7 +1692,43 @@ static struct spear_pingroup clcd_pingroup = { | |||
1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), | 1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), |
1693 | }; | 1693 | }; |
1694 | 1694 | ||
1695 | static const char *const clcd_grps[] = { "clcd_grp" }; | 1695 | /* Disable cld runtime to save panel damage */ |
1696 | static struct spear_muxreg clcd_sleep_muxreg[] = { | ||
1697 | { | ||
1698 | .reg = PAD_SHARED_IP_EN_1, | ||
1699 | .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK, | ||
1700 | .val = 0, | ||
1701 | }, { | ||
1702 | .reg = PAD_FUNCTION_EN_5, | ||
1703 | .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, | ||
1704 | .val = 0x0, | ||
1705 | }, { | ||
1706 | .reg = PAD_FUNCTION_EN_6, | ||
1707 | .mask = CLCD_AND_ARM_TRACE_REG5_MASK, | ||
1708 | .val = 0x0, | ||
1709 | }, { | ||
1710 | .reg = PAD_FUNCTION_EN_7, | ||
1711 | .mask = CLCD_AND_ARM_TRACE_REG6_MASK, | ||
1712 | .val = 0x0, | ||
1713 | }, | ||
1714 | }; | ||
1715 | |||
1716 | static struct spear_modemux clcd_sleep_modemux[] = { | ||
1717 | { | ||
1718 | .muxregs = clcd_sleep_muxreg, | ||
1719 | .nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg), | ||
1720 | }, | ||
1721 | }; | ||
1722 | |||
1723 | static struct spear_pingroup clcd_sleep_pingroup = { | ||
1724 | .name = "clcd_sleep_grp", | ||
1725 | .pins = clcd_pins, | ||
1726 | .npins = ARRAY_SIZE(clcd_pins), | ||
1727 | .modemuxs = clcd_sleep_modemux, | ||
1728 | .nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux), | ||
1729 | }; | ||
1730 | |||
1731 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" }; | ||
1696 | static struct spear_function clcd_function = { | 1732 | static struct spear_function clcd_function = { |
1697 | .name = "clcd", | 1733 | .name = "clcd", |
1698 | .groups = clcd_grps, | 1734 | .groups = clcd_grps, |
@@ -1893,6 +1929,7 @@ static struct spear_pingroup *spear1340_pingroups[] = { | |||
1893 | &sdhci_pingroup, | 1929 | &sdhci_pingroup, |
1894 | &cf_pingroup, | 1930 | &cf_pingroup, |
1895 | &xd_pingroup, | 1931 | &xd_pingroup, |
1932 | &clcd_sleep_pingroup, | ||
1896 | &clcd_pingroup, | 1933 | &clcd_pingroup, |
1897 | &arm_trace_pingroup, | 1934 | &arm_trace_pingroup, |
1898 | &miphy_dbg_pingroup, | 1935 | &miphy_dbg_pingroup, |