diff options
author | Bjorn Andersson <bjorn.andersson@sonymobile.com> | 2013-12-15 02:01:52 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-12-16 04:31:37 -0500 |
commit | f393e489c79d55dcc8e72eed0fabcb061e6b0090 (patch) | |
tree | 0957f8c9306e7e7a6886e7a216decf0642c84ecb /drivers/pinctrl | |
parent | 1f2b239815996a93bd54561bb1b9d8460e114ff1 (diff) |
pinctrl-msm: Tidy up error handling
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/pinctrl-msm.c | 76 |
1 files changed, 26 insertions, 50 deletions
diff --git a/drivers/pinctrl/pinctrl-msm.c b/drivers/pinctrl/pinctrl-msm.c index 322bc0a26040..c1a3053ff4c7 100644 --- a/drivers/pinctrl/pinctrl-msm.c +++ b/drivers/pinctrl/pinctrl-msm.c | |||
@@ -57,7 +57,7 @@ struct msm_pinctrl { | |||
57 | struct pinctrl_dev *pctrl; | 57 | struct pinctrl_dev *pctrl; |
58 | struct irq_domain *domain; | 58 | struct irq_domain *domain; |
59 | struct gpio_chip chip; | 59 | struct gpio_chip chip; |
60 | unsigned irq; | 60 | int irq; |
61 | 61 | ||
62 | spinlock_t lock; | 62 | spinlock_t lock; |
63 | 63 | ||
@@ -201,7 +201,7 @@ static const struct pinmux_ops msm_pinmux_ops = { | |||
201 | static int msm_config_reg(struct msm_pinctrl *pctrl, | 201 | static int msm_config_reg(struct msm_pinctrl *pctrl, |
202 | const struct msm_pingroup *g, | 202 | const struct msm_pingroup *g, |
203 | unsigned param, | 203 | unsigned param, |
204 | unsigned *reg, | 204 | s16 *reg, |
205 | unsigned *mask, | 205 | unsigned *mask, |
206 | unsigned *bit) | 206 | unsigned *bit) |
207 | { | 207 | { |
@@ -272,7 +272,7 @@ static int msm_config_group_get(struct pinctrl_dev *pctldev, | |||
272 | unsigned mask; | 272 | unsigned mask; |
273 | unsigned arg; | 273 | unsigned arg; |
274 | unsigned bit; | 274 | unsigned bit; |
275 | unsigned reg; | 275 | s16 reg; |
276 | int ret; | 276 | int ret; |
277 | u32 val; | 277 | u32 val; |
278 | 278 | ||
@@ -322,7 +322,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev, | |||
322 | unsigned mask; | 322 | unsigned mask; |
323 | unsigned arg; | 323 | unsigned arg; |
324 | unsigned bit; | 324 | unsigned bit; |
325 | unsigned reg; | 325 | s16 reg; |
326 | int ret; | 326 | int ret; |
327 | u32 val; | 327 | u32 val; |
328 | int i; | 328 | int i; |
@@ -350,7 +350,7 @@ static int msm_config_group_set(struct pinctrl_dev *pctldev, | |||
350 | break; | 350 | break; |
351 | case PIN_CONFIG_DRIVE_STRENGTH: | 351 | case PIN_CONFIG_DRIVE_STRENGTH: |
352 | /* Check for invalid values */ | 352 | /* Check for invalid values */ |
353 | if (arg > ARRAY_SIZE(msm_drive_to_regval)) | 353 | if (arg >= ARRAY_SIZE(msm_drive_to_regval)) |
354 | arg = -1; | 354 | arg = -1; |
355 | else | 355 | else |
356 | arg = msm_drive_to_regval[arg]; | 356 | arg = msm_drive_to_regval[arg]; |
@@ -399,12 +399,8 @@ static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
399 | unsigned long flags; | 399 | unsigned long flags; |
400 | u32 val; | 400 | u32 val; |
401 | 401 | ||
402 | if (WARN_ON(offset >= pctrl->soc->ngroups)) | ||
403 | return -EINVAL; | ||
404 | |||
405 | g = &pctrl->soc->groups[offset]; | 402 | g = &pctrl->soc->groups[offset]; |
406 | 403 | if (WARN_ON(g->io_reg < 0)) | |
407 | if (WARN_ON(g->oe_bit < 0)) | ||
408 | return -EINVAL; | 404 | return -EINVAL; |
409 | 405 | ||
410 | spin_lock_irqsave(&pctrl->lock, flags); | 406 | spin_lock_irqsave(&pctrl->lock, flags); |
@@ -425,12 +421,8 @@ static int msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, in | |||
425 | unsigned long flags; | 421 | unsigned long flags; |
426 | u32 val; | 422 | u32 val; |
427 | 423 | ||
428 | if (WARN_ON(offset >= pctrl->soc->ngroups)) | ||
429 | return -EINVAL; | ||
430 | |||
431 | g = &pctrl->soc->groups[offset]; | 424 | g = &pctrl->soc->groups[offset]; |
432 | 425 | if (WARN_ON(g->io_reg < 0)) | |
433 | if (WARN_ON(g->oe_bit < 0)) | ||
434 | return -EINVAL; | 426 | return -EINVAL; |
435 | 427 | ||
436 | spin_lock_irqsave(&pctrl->lock, flags); | 428 | spin_lock_irqsave(&pctrl->lock, flags); |
@@ -452,10 +444,9 @@ static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) | |||
452 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); | 444 | struct msm_pinctrl *pctrl = container_of(chip, struct msm_pinctrl, chip); |
453 | u32 val; | 445 | u32 val; |
454 | 446 | ||
455 | if (WARN_ON(offset >= pctrl->soc->ngroups)) | ||
456 | return -EINVAL; | ||
457 | |||
458 | g = &pctrl->soc->groups[offset]; | 447 | g = &pctrl->soc->groups[offset]; |
448 | if (WARN_ON(g->io_reg < 0)) | ||
449 | return -EINVAL; | ||
459 | 450 | ||
460 | val = readl(pctrl->regs + g->io_reg); | 451 | val = readl(pctrl->regs + g->io_reg); |
461 | return !!(val & BIT(g->in_bit)); | 452 | return !!(val & BIT(g->in_bit)); |
@@ -468,10 +459,9 @@ static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
468 | unsigned long flags; | 459 | unsigned long flags; |
469 | u32 val; | 460 | u32 val; |
470 | 461 | ||
471 | if (WARN_ON(offset >= pctrl->soc->ngroups)) | ||
472 | return; | ||
473 | |||
474 | g = &pctrl->soc->groups[offset]; | 462 | g = &pctrl->soc->groups[offset]; |
463 | if (WARN_ON(g->io_reg < 0)) | ||
464 | return; | ||
475 | 465 | ||
476 | spin_lock_irqsave(&pctrl->lock, flags); | 466 | spin_lock_irqsave(&pctrl->lock, flags); |
477 | 467 | ||
@@ -616,13 +606,9 @@ static void msm_gpio_irq_mask(struct irq_data *d) | |||
616 | u32 val; | 606 | u32 val; |
617 | 607 | ||
618 | pctrl = irq_data_get_irq_chip_data(d); | 608 | pctrl = irq_data_get_irq_chip_data(d); |
619 | if (!pctrl) | ||
620 | return; | ||
621 | |||
622 | if (WARN_ON(d->hwirq >= pctrl->soc->ngroups)) | ||
623 | return; | ||
624 | |||
625 | g = &pctrl->soc->groups[d->hwirq]; | 609 | g = &pctrl->soc->groups[d->hwirq]; |
610 | if (WARN_ON(g->intr_cfg_reg < 0)) | ||
611 | return; | ||
626 | 612 | ||
627 | spin_lock_irqsave(&pctrl->lock, flags); | 613 | spin_lock_irqsave(&pctrl->lock, flags); |
628 | 614 | ||
@@ -643,13 +629,9 @@ static void msm_gpio_irq_unmask(struct irq_data *d) | |||
643 | u32 val; | 629 | u32 val; |
644 | 630 | ||
645 | pctrl = irq_data_get_irq_chip_data(d); | 631 | pctrl = irq_data_get_irq_chip_data(d); |
646 | if (!pctrl) | ||
647 | return; | ||
648 | |||
649 | if (WARN_ON(d->hwirq >= pctrl->soc->ngroups)) | ||
650 | return; | ||
651 | |||
652 | g = &pctrl->soc->groups[d->hwirq]; | 632 | g = &pctrl->soc->groups[d->hwirq]; |
633 | if (WARN_ON(g->intr_status_reg < 0)) | ||
634 | return; | ||
653 | 635 | ||
654 | spin_lock_irqsave(&pctrl->lock, flags); | 636 | spin_lock_irqsave(&pctrl->lock, flags); |
655 | 637 | ||
@@ -674,13 +656,9 @@ static void msm_gpio_irq_ack(struct irq_data *d) | |||
674 | u32 val; | 656 | u32 val; |
675 | 657 | ||
676 | pctrl = irq_data_get_irq_chip_data(d); | 658 | pctrl = irq_data_get_irq_chip_data(d); |
677 | if (!pctrl) | ||
678 | return; | ||
679 | |||
680 | if (WARN_ON(d->hwirq >= pctrl->soc->ngroups)) | ||
681 | return; | ||
682 | |||
683 | g = &pctrl->soc->groups[d->hwirq]; | 659 | g = &pctrl->soc->groups[d->hwirq]; |
660 | if (WARN_ON(g->intr_status_reg < 0)) | ||
661 | return; | ||
684 | 662 | ||
685 | spin_lock_irqsave(&pctrl->lock, flags); | 663 | spin_lock_irqsave(&pctrl->lock, flags); |
686 | 664 | ||
@@ -704,13 +682,9 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
704 | u32 val; | 682 | u32 val; |
705 | 683 | ||
706 | pctrl = irq_data_get_irq_chip_data(d); | 684 | pctrl = irq_data_get_irq_chip_data(d); |
707 | if (!pctrl) | ||
708 | return -EINVAL; | ||
709 | |||
710 | if (WARN_ON(d->hwirq >= pctrl->soc->ngroups)) | ||
711 | return -EINVAL; | ||
712 | |||
713 | g = &pctrl->soc->groups[d->hwirq]; | 685 | g = &pctrl->soc->groups[d->hwirq]; |
686 | if (WARN_ON(g->intr_cfg_reg < 0)) | ||
687 | return -EINVAL; | ||
714 | 688 | ||
715 | spin_lock_irqsave(&pctrl->lock, flags); | 689 | spin_lock_irqsave(&pctrl->lock, flags); |
716 | 690 | ||
@@ -802,9 +776,6 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) | |||
802 | unsigned ngpio; | 776 | unsigned ngpio; |
803 | 777 | ||
804 | pctrl = irq_data_get_irq_chip_data(d); | 778 | pctrl = irq_data_get_irq_chip_data(d); |
805 | if (!pctrl) | ||
806 | return -EINVAL; | ||
807 | |||
808 | ngpio = pctrl->chip.ngpio; | 779 | ngpio = pctrl->chip.ngpio; |
809 | 780 | ||
810 | spin_lock_irqsave(&pctrl->lock, flags); | 781 | spin_lock_irqsave(&pctrl->lock, flags); |
@@ -983,7 +954,7 @@ int msm_pinctrl_probe(struct platform_device *pdev, | |||
983 | if (IS_ERR(pctrl->regs)) | 954 | if (IS_ERR(pctrl->regs)) |
984 | return PTR_ERR(pctrl->regs); | 955 | return PTR_ERR(pctrl->regs); |
985 | 956 | ||
986 | pctrl->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); | 957 | pctrl->irq = platform_get_irq(pdev, 0); |
987 | if (pctrl->irq < 0) { | 958 | if (pctrl->irq < 0) { |
988 | dev_err(&pdev->dev, "No interrupt defined for msmgpio\n"); | 959 | dev_err(&pdev->dev, "No interrupt defined for msmgpio\n"); |
989 | return pctrl->irq; | 960 | return pctrl->irq; |
@@ -1017,9 +988,14 @@ int msm_pinctrl_remove(struct platform_device *pdev) | |||
1017 | struct msm_pinctrl *pctrl = platform_get_drvdata(pdev); | 988 | struct msm_pinctrl *pctrl = platform_get_drvdata(pdev); |
1018 | int ret; | 989 | int ret; |
1019 | 990 | ||
991 | ret = gpiochip_remove(&pctrl->chip); | ||
992 | if (ret) { | ||
993 | dev_err(&pdev->dev, "Failed to remove gpiochip\n"); | ||
994 | return ret; | ||
995 | } | ||
996 | |||
1020 | irq_set_chained_handler(pctrl->irq, NULL); | 997 | irq_set_chained_handler(pctrl->irq, NULL); |
1021 | irq_domain_remove(pctrl->domain); | 998 | irq_domain_remove(pctrl->domain); |
1022 | ret = gpiochip_remove(&pctrl->chip); | ||
1023 | pinctrl_unregister(pctrl->pctrl); | 999 | pinctrl_unregister(pctrl->pctrl); |
1024 | 1000 | ||
1025 | return 0; | 1001 | return 0; |