diff options
author | Heiko Stübner <heiko@sntech.de> | 2014-06-15 19:36:33 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-07-11 08:08:27 -0400 |
commit | 6bc0d121a95b31b0962bf6a3f89099059bde409e (patch) | |
tree | c6cac2d887093cf718d3931166d8ea8419c0dc43 /drivers/pinctrl | |
parent | fc72c923e50d5c0575faa5f6379bd55b900ed85a (diff) |
pinctrl: rockchip: precalculate iomux offsets
An upcoming SoC introduces an interesting quirk to iomux handling making the
calculation of the iomux register-offset harder. To keep the complexity down
when getting/setting the mux, precalculate the actual register offset at
probe-time.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/pinctrl-rockchip.c | 56 |
1 files changed, 45 insertions, 11 deletions
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 2f5ba046232e..202ac82082d2 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c | |||
@@ -71,9 +71,13 @@ enum rockchip_pinctrl_type { | |||
71 | 71 | ||
72 | /** | 72 | /** |
73 | * @type: iomux variant using IOMUX_* constants | 73 | * @type: iomux variant using IOMUX_* constants |
74 | * @offset: if initialized to -1 it will be autocalculated, by specifying | ||
75 | * an initial offset value the relevant source offset can be reset | ||
76 | * to a new value for autocalculating the following iomux registers. | ||
74 | */ | 77 | */ |
75 | struct rockchip_iomux { | 78 | struct rockchip_iomux { |
76 | int type; | 79 | int type; |
80 | int offset; | ||
77 | }; | 81 | }; |
78 | 82 | ||
79 | /** | 83 | /** |
@@ -119,6 +123,12 @@ struct rockchip_pin_bank { | |||
119 | .bank_num = id, \ | 123 | .bank_num = id, \ |
120 | .nr_pins = pins, \ | 124 | .nr_pins = pins, \ |
121 | .name = label, \ | 125 | .name = label, \ |
126 | .iomux = { \ | ||
127 | { .offset = -1 }, \ | ||
128 | { .offset = -1 }, \ | ||
129 | { .offset = -1 }, \ | ||
130 | { .offset = -1 }, \ | ||
131 | }, \ | ||
122 | } | 132 | } |
123 | 133 | ||
124 | #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \ | 134 | #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \ |
@@ -127,10 +137,10 @@ struct rockchip_pin_bank { | |||
127 | .nr_pins = pins, \ | 137 | .nr_pins = pins, \ |
128 | .name = label, \ | 138 | .name = label, \ |
129 | .iomux = { \ | 139 | .iomux = { \ |
130 | { .type = iom0, }, \ | 140 | { .type = iom0, .offset = -1 }, \ |
131 | { .type = iom1, }, \ | 141 | { .type = iom1, .offset = -1 }, \ |
132 | { .type = iom2, }, \ | 142 | { .type = iom2, .offset = -1 }, \ |
133 | { .type = iom3, }, \ | 143 | { .type = iom3, .offset = -1 }, \ |
134 | }, \ | 144 | }, \ |
135 | } | 145 | } |
136 | 146 | ||
@@ -376,9 +386,7 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) | |||
376 | return RK_FUNC_GPIO; | 386 | return RK_FUNC_GPIO; |
377 | 387 | ||
378 | /* get basic quadrupel of mux registers and the correct reg inside */ | 388 | /* get basic quadrupel of mux registers and the correct reg inside */ |
379 | reg = info->ctrl->mux_offset; | 389 | reg = bank->iomux[iomux_num].offset; |
380 | reg += bank->bank_num * 0x10; | ||
381 | reg += iomux_num * 4; | ||
382 | bit = (pin % 8) * 2; | 390 | bit = (pin % 8) * 2; |
383 | 391 | ||
384 | ret = regmap_read(info->regmap_base, reg, &val); | 392 | ret = regmap_read(info->regmap_base, reg, &val); |
@@ -427,9 +435,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) | |||
427 | bank->bank_num, pin, mux); | 435 | bank->bank_num, pin, mux); |
428 | 436 | ||
429 | /* get basic quadrupel of mux registers and the correct reg inside */ | 437 | /* get basic quadrupel of mux registers and the correct reg inside */ |
430 | reg = info->ctrl->mux_offset; | 438 | reg = bank->iomux[iomux_num].offset; |
431 | reg += bank->bank_num * 0x10; | ||
432 | reg += iomux_num * 4; | ||
433 | bit = (pin % 8) * 2; | 439 | bit = (pin % 8) * 2; |
434 | 440 | ||
435 | spin_lock_irqsave(&bank->slock, flags); | 441 | spin_lock_irqsave(&bank->slock, flags); |
@@ -1515,7 +1521,7 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data( | |||
1515 | struct device_node *np; | 1521 | struct device_node *np; |
1516 | struct rockchip_pin_ctrl *ctrl; | 1522 | struct rockchip_pin_ctrl *ctrl; |
1517 | struct rockchip_pin_bank *bank; | 1523 | struct rockchip_pin_bank *bank; |
1518 | int i; | 1524 | int grf_offs, i, j; |
1519 | 1525 | ||
1520 | match = of_match_node(rockchip_pinctrl_dt_match, node); | 1526 | match = of_match_node(rockchip_pinctrl_dt_match, node); |
1521 | ctrl = (struct rockchip_pin_ctrl *)match->data; | 1527 | ctrl = (struct rockchip_pin_ctrl *)match->data; |
@@ -1537,12 +1543,40 @@ static struct rockchip_pin_ctrl *rockchip_pinctrl_get_soc_data( | |||
1537 | } | 1543 | } |
1538 | } | 1544 | } |
1539 | 1545 | ||
1546 | grf_offs = ctrl->mux_offset; | ||
1540 | bank = ctrl->pin_banks; | 1547 | bank = ctrl->pin_banks; |
1541 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { | 1548 | for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { |
1549 | int bank_pins = 0; | ||
1550 | |||
1542 | spin_lock_init(&bank->slock); | 1551 | spin_lock_init(&bank->slock); |
1543 | bank->drvdata = d; | 1552 | bank->drvdata = d; |
1544 | bank->pin_base = ctrl->nr_pins; | 1553 | bank->pin_base = ctrl->nr_pins; |
1545 | ctrl->nr_pins += bank->nr_pins; | 1554 | ctrl->nr_pins += bank->nr_pins; |
1555 | |||
1556 | /* calculate iomux offsets */ | ||
1557 | for (j = 0; j < 4; j++) { | ||
1558 | struct rockchip_iomux *iom = &bank->iomux[j]; | ||
1559 | |||
1560 | if (bank_pins >= bank->nr_pins) | ||
1561 | break; | ||
1562 | |||
1563 | /* preset offset value, set new start value */ | ||
1564 | if (iom->offset >= 0) { | ||
1565 | grf_offs = iom->offset; | ||
1566 | } else { /* set current offset */ | ||
1567 | iom->offset = grf_offs; | ||
1568 | } | ||
1569 | |||
1570 | dev_dbg(d->dev, "bank %d, iomux %d has offset 0x%x\n", | ||
1571 | i, j, iom->offset); | ||
1572 | |||
1573 | /* | ||
1574 | * Increase offset according to iomux width. | ||
1575 | */ | ||
1576 | grf_offs += 4; | ||
1577 | |||
1578 | bank_pins += 8; | ||
1579 | } | ||
1546 | } | 1580 | } |
1547 | 1581 | ||
1548 | return ctrl; | 1582 | return ctrl; |