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authorLinus Walleij <linus.walleij@linaro.org>2012-04-26 17:57:25 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-05-11 05:14:14 -0400
commite98ea774c8d210364379329f042e7596f83ecc58 (patch)
tree95833bd464ee36b68abe4e3c5612dc7e804f771c /drivers/pinctrl
parent072e82a18f72b7b7278130c79029aac59de7650b (diff)
pinctrl/nomadik: basic Nomadik pinctrl interface
This adds a scratch pin control interface to the Nomadik pinctrl driver, and defines the pins and groups in the DB8500 ASIC. We define GPIO ranges to cover the pins exposed. The DB8500 has more pins than this but we restrict the driver to the pins that can be controlled from the combined GPIO and pin control hardware to begin with. ChangeLog v1->v2: - Base on the latest pinctrl development from pinctrl-mergebase-20120418 so we can get rid of legacy group count mechanism. Also drop the range checks for group index, this is handled by the core now. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/Kconfig8
-rw-r--r--drivers/pinctrl/Makefile3
-rw-r--r--drivers/pinctrl/pinctrl-nomadik-db8500.c727
-rw-r--r--drivers/pinctrl/pinctrl-nomadik.c122
-rw-r--r--drivers/pinctrl/pinctrl-nomadik.h61
5 files changed, 919 insertions, 2 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index f73a5ea89754..5e718201b88f 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -36,6 +36,14 @@ config PINCTRL_MMP2
36 select PINCTRL_PXA3xx 36 select PINCTRL_PXA3xx
37 select PINCONF 37 select PINCONF
38 38
39config PINCTRL_NOMADIK
40 bool "Nomadik pin controller driver"
41 depends on ARCH_U8500
42
43config PINCTRL_DB8500
44 bool "DB8500 pin controller driver"
45 depends on PINCTRL_NOMADIK && ARCH_U8500
46
39config PINCTRL_PXA168 47config PINCTRL_PXA168
40 bool "PXA168 pin controller driver" 48 bool "PXA168 pin controller driver"
41 depends on ARCH_MMP 49 depends on ARCH_MMP
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index dd797caf5799..637951ea05b5 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -11,7 +11,8 @@ endif
11obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o 11obj-$(CONFIG_GENERIC_PINCONF) += pinconf-generic.o
12obj-$(CONFIG_PINCTRL_PXA3xx) += pinctrl-pxa3xx.o 12obj-$(CONFIG_PINCTRL_PXA3xx) += pinctrl-pxa3xx.o
13obj-$(CONFIG_PINCTRL_MMP2) += pinctrl-mmp2.o 13obj-$(CONFIG_PINCTRL_MMP2) += pinctrl-mmp2.o
14obj-$(CONFIG_PLAT_NOMADIK) += pinctrl-nomadik.o 14obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
15obj-$(CONFIG_PINCTRL_DB8500) += pinctrl-nomadik-db8500.o
15obj-$(CONFIG_PINCTRL_PXA168) += pinctrl-pxa168.o 16obj-$(CONFIG_PINCTRL_PXA168) += pinctrl-pxa168.o
16obj-$(CONFIG_PINCTRL_PXA910) += pinctrl-pxa910.o 17obj-$(CONFIG_PINCTRL_PXA910) += pinctrl-pxa910.o
17obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o 18obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o
diff --git a/drivers/pinctrl/pinctrl-nomadik-db8500.c b/drivers/pinctrl/pinctrl-nomadik-db8500.c
new file mode 100644
index 000000000000..b6871c9ba53b
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-nomadik-db8500.c
@@ -0,0 +1,727 @@
1#include <linux/kernel.h>
2#include <linux/pinctrl/pinctrl.h>
3#include "pinctrl-nomadik.h"
4
5/* All the pins that can be used for GPIO and some other functions */
6#define _GPIO(offset) (offset)
7
8#define DB8500_PIN_AJ5 _GPIO(0)
9#define DB8500_PIN_AJ3 _GPIO(1)
10#define DB8500_PIN_AH4 _GPIO(2)
11#define DB8500_PIN_AH3 _GPIO(3)
12#define DB8500_PIN_AH6 _GPIO(4)
13#define DB8500_PIN_AG6 _GPIO(5)
14#define DB8500_PIN_AF6 _GPIO(6)
15#define DB8500_PIN_AG5 _GPIO(7)
16#define DB8500_PIN_AD5 _GPIO(8)
17#define DB8500_PIN_AE4 _GPIO(9)
18#define DB8500_PIN_AF5 _GPIO(10)
19#define DB8500_PIN_AG4 _GPIO(11)
20#define DB8500_PIN_AC4 _GPIO(12)
21#define DB8500_PIN_AF3 _GPIO(13)
22#define DB8500_PIN_AE3 _GPIO(14)
23#define DB8500_PIN_AC3 _GPIO(15)
24#define DB8500_PIN_AD3 _GPIO(16)
25#define DB8500_PIN_AD4 _GPIO(17)
26#define DB8500_PIN_AC2 _GPIO(18)
27#define DB8500_PIN_AC1 _GPIO(19)
28#define DB8500_PIN_AB4 _GPIO(20)
29#define DB8500_PIN_AB3 _GPIO(21)
30#define DB8500_PIN_AA3 _GPIO(22)
31#define DB8500_PIN_AA4 _GPIO(23)
32#define DB8500_PIN_AB2 _GPIO(24)
33#define DB8500_PIN_Y4 _GPIO(25)
34#define DB8500_PIN_Y2 _GPIO(26)
35#define DB8500_PIN_AA2 _GPIO(27)
36#define DB8500_PIN_AA1 _GPIO(28)
37#define DB8500_PIN_W2 _GPIO(29)
38#define DB8500_PIN_W3 _GPIO(30)
39#define DB8500_PIN_V3 _GPIO(31)
40#define DB8500_PIN_V2 _GPIO(32)
41#define DB8500_PIN_AF2 _GPIO(33)
42#define DB8500_PIN_AE1 _GPIO(34)
43#define DB8500_PIN_AE2 _GPIO(35)
44#define DB8500_PIN_AG2 _GPIO(36)
45/* Hole */
46#define DB8500_PIN_F3 _GPIO(64)
47#define DB8500_PIN_F1 _GPIO(65)
48#define DB8500_PIN_G3 _GPIO(66)
49#define DB8500_PIN_G2 _GPIO(67)
50#define DB8500_PIN_E1 _GPIO(68)
51#define DB8500_PIN_E2 _GPIO(69)
52#define DB8500_PIN_G5 _GPIO(70)
53#define DB8500_PIN_G4 _GPIO(71)
54#define DB8500_PIN_H4 _GPIO(72)
55#define DB8500_PIN_H3 _GPIO(73)
56#define DB8500_PIN_J3 _GPIO(74)
57#define DB8500_PIN_H2 _GPIO(75)
58#define DB8500_PIN_J2 _GPIO(76)
59#define DB8500_PIN_H1 _GPIO(77)
60#define DB8500_PIN_F4 _GPIO(78)
61#define DB8500_PIN_E3 _GPIO(79)
62#define DB8500_PIN_E4 _GPIO(80)
63#define DB8500_PIN_D2 _GPIO(81)
64#define DB8500_PIN_C1 _GPIO(82)
65#define DB8500_PIN_D3 _GPIO(83)
66#define DB8500_PIN_C2 _GPIO(84)
67#define DB8500_PIN_D5 _GPIO(85)
68#define DB8500_PIN_C6 _GPIO(86)
69#define DB8500_PIN_B3 _GPIO(87)
70#define DB8500_PIN_C4 _GPIO(88)
71#define DB8500_PIN_E6 _GPIO(89)
72#define DB8500_PIN_A3 _GPIO(90)
73#define DB8500_PIN_B6 _GPIO(91)
74#define DB8500_PIN_D6 _GPIO(92)
75#define DB8500_PIN_B7 _GPIO(93)
76#define DB8500_PIN_D7 _GPIO(94)
77#define DB8500_PIN_E8 _GPIO(95)
78#define DB8500_PIN_D8 _GPIO(96)
79#define DB8500_PIN_D9 _GPIO(97)
80/* Hole */
81#define DB8500_PIN_A5 _GPIO(128)
82#define DB8500_PIN_B4 _GPIO(129)
83#define DB8500_PIN_C8 _GPIO(130)
84#define DB8500_PIN_A12 _GPIO(131)
85#define DB8500_PIN_C10 _GPIO(132)
86#define DB8500_PIN_B10 _GPIO(133)
87#define DB8500_PIN_B9 _GPIO(134)
88#define DB8500_PIN_A9 _GPIO(135)
89#define DB8500_PIN_C7 _GPIO(136)
90#define DB8500_PIN_A7 _GPIO(137)
91#define DB8500_PIN_C5 _GPIO(138)
92#define DB8500_PIN_C9 _GPIO(139)
93#define DB8500_PIN_B11 _GPIO(140)
94#define DB8500_PIN_C12 _GPIO(141)
95#define DB8500_PIN_C11 _GPIO(142)
96#define DB8500_PIN_D12 _GPIO(143)
97#define DB8500_PIN_B13 _GPIO(144)
98#define DB8500_PIN_C13 _GPIO(145)
99#define DB8500_PIN_D13 _GPIO(146)
100#define DB8500_PIN_C15 _GPIO(147)
101#define DB8500_PIN_B16 _GPIO(148)
102#define DB8500_PIN_B14 _GPIO(149)
103#define DB8500_PIN_C14 _GPIO(150)
104#define DB8500_PIN_D17 _GPIO(151)
105#define DB8500_PIN_D16 _GPIO(152)
106#define DB8500_PIN_B17 _GPIO(153)
107#define DB8500_PIN_C16 _GPIO(154)
108#define DB8500_PIN_C19 _GPIO(155)
109#define DB8500_PIN_C17 _GPIO(156)
110#define DB8500_PIN_A18 _GPIO(157)
111#define DB8500_PIN_C18 _GPIO(158)
112#define DB8500_PIN_B19 _GPIO(159)
113#define DB8500_PIN_B20 _GPIO(160)
114#define DB8500_PIN_D21 _GPIO(161)
115#define DB8500_PIN_D20 _GPIO(162)
116#define DB8500_PIN_C20 _GPIO(163)
117#define DB8500_PIN_B21 _GPIO(164)
118#define DB8500_PIN_C21 _GPIO(165)
119#define DB8500_PIN_A22 _GPIO(166)
120#define DB8500_PIN_B24 _GPIO(167)
121#define DB8500_PIN_C22 _GPIO(168)
122#define DB8500_PIN_D22 _GPIO(169)
123#define DB8500_PIN_C23 _GPIO(170)
124#define DB8500_PIN_D23 _GPIO(171)
125/* Hole */
126#define DB8500_PIN_AJ27 _GPIO(192)
127#define DB8500_PIN_AH27 _GPIO(193)
128#define DB8500_PIN_AF27 _GPIO(194)
129#define DB8500_PIN_AG28 _GPIO(195)
130#define DB8500_PIN_AG26 _GPIO(196)
131#define DB8500_PIN_AH24 _GPIO(197)
132#define DB8500_PIN_AG25 _GPIO(198)
133#define DB8500_PIN_AH23 _GPIO(199)
134#define DB8500_PIN_AH26 _GPIO(200)
135#define DB8500_PIN_AF24 _GPIO(201)
136#define DB8500_PIN_AF25 _GPIO(202)
137#define DB8500_PIN_AE23 _GPIO(203)
138#define DB8500_PIN_AF23 _GPIO(204)
139#define DB8500_PIN_AG23 _GPIO(205)
140#define DB8500_PIN_AG24 _GPIO(206)
141#define DB8500_PIN_AJ23 _GPIO(207)
142#define DB8500_PIN_AH16 _GPIO(208)
143#define DB8500_PIN_AG15 _GPIO(209)
144#define DB8500_PIN_AJ15 _GPIO(210)
145#define DB8500_PIN_AG14 _GPIO(211)
146#define DB8500_PIN_AF13 _GPIO(212)
147#define DB8500_PIN_AG13 _GPIO(213)
148#define DB8500_PIN_AH15 _GPIO(214)
149#define DB8500_PIN_AH13 _GPIO(215)
150#define DB8500_PIN_AG12 _GPIO(216)
151#define DB8500_PIN_AH12 _GPIO(217)
152#define DB8500_PIN_AH11 _GPIO(218)
153#define DB8500_PIN_AG10 _GPIO(219)
154#define DB8500_PIN_AH10 _GPIO(220)
155#define DB8500_PIN_AJ11 _GPIO(221)
156#define DB8500_PIN_AJ9 _GPIO(222)
157#define DB8500_PIN_AH9 _GPIO(223)
158#define DB8500_PIN_AG9 _GPIO(224)
159#define DB8500_PIN_AG8 _GPIO(225)
160#define DB8500_PIN_AF8 _GPIO(226)
161#define DB8500_PIN_AH7 _GPIO(227)
162#define DB8500_PIN_AJ6 _GPIO(228)
163#define DB8500_PIN_AG7 _GPIO(229)
164#define DB8500_PIN_AF7 _GPIO(230)
165/* Hole */
166#define DB8500_PIN_AF28 _GPIO(256)
167#define DB8500_PIN_AE29 _GPIO(257)
168#define DB8500_PIN_AD29 _GPIO(258)
169#define DB8500_PIN_AC29 _GPIO(259)
170#define DB8500_PIN_AD28 _GPIO(260)
171#define DB8500_PIN_AD26 _GPIO(261)
172#define DB8500_PIN_AE26 _GPIO(262)
173#define DB8500_PIN_AG29 _GPIO(263)
174#define DB8500_PIN_AE27 _GPIO(264)
175#define DB8500_PIN_AD27 _GPIO(265)
176#define DB8500_PIN_AC28 _GPIO(266)
177#define DB8500_PIN_AC27 _GPIO(267)
178
179/*
180 * The names of the pins are denoted by GPIO number and ball name, even
181 * though they can be used for other things than GPIO, this is the first
182 * column in the table of the data sheet and often used on schematics and
183 * such.
184 */
185static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
186 PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
187 PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
188 PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
189 PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
190 PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
191 PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
192 PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
193 PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
194 PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
195 PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
196 PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
197 PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
198 PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
199 PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
200 PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
201 PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
202 PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
203 PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
204 PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
205 PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
206 PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
207 PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
208 PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
209 PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
210 PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
211 PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
212 PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
213 PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
214 PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
215 PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
216 PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
217 PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
218 PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
219 PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
220 PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
221 PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
222 PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
223 /* Hole */
224 PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
225 PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
226 PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
227 PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
228 PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
229 PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
230 PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
231 PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
232 PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
233 PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
234 PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
235 PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
236 PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
237 PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
238 PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
239 PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
240 PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
241 PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
242 PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
243 PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
244 PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
245 PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
246 PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
247 PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
248 PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
249 PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
250 PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
251 PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
252 PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
253 PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
254 PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
255 PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
256 PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
257 PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
258 /* Hole */
259 PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
260 PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
261 PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
262 PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
263 PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
264 PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
265 PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
266 PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
267 PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
268 PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
269 PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
270 PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
271 PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
272 PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
273 PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
274 PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
275 PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
276 PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
277 PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
278 PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
279 PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
280 PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
281 PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
282 PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
283 PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
284 PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
285 PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
286 PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
287 PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
288 PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
289 PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
290 PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
291 PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
292 PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
293 PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
294 PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
295 PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
296 PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
297 PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
298 PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
299 PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
300 PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
301 PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
302 PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
303 /* Hole */
304 PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
305 PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
306 PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
307 PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
308 PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
309 PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
310 PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
311 PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
312 PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
313 PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
314 PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
315 PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
316 PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
317 PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
318 PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
319 PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
320 PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
321 PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
322 PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
323 PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
324 PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
325 PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
326 PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
327 PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
328 PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
329 PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
330 PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
331 PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
332 PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
333 PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
334 PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
335 PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
336 PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
337 PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
338 PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
339 PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
340 PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
341 PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
342 PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
343 /* Hole */
344 PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
345 PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
346 PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
347 PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
348 PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
349 PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
350 PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
351 PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
352 PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
353 PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
354 PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
355 PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
356};
357
358#define DB8500_GPIO_RANGE(a, b, c) { .name = "DB8500", .id = a, .base = b, \
359 .pin_base = b, .npins = c }
360
361/*
362 * This matches the 32-pin gpio chips registered by the GPIO portion. This
363 * cannot be const since we assign the struct gpio_chip * pointer at runtime.
364 */
365static struct pinctrl_gpio_range nmk_db8500_ranges[] = {
366 DB8500_GPIO_RANGE(0, 0, 32),
367 DB8500_GPIO_RANGE(1, 32, 5),
368 DB8500_GPIO_RANGE(2, 64, 32),
369 DB8500_GPIO_RANGE(3, 96, 2),
370 DB8500_GPIO_RANGE(4, 128, 32),
371 DB8500_GPIO_RANGE(5, 160, 12),
372 DB8500_GPIO_RANGE(6, 192, 32),
373 DB8500_GPIO_RANGE(7, 224, 7),
374 DB8500_GPIO_RANGE(8, 256, 12),
375};
376
377/*
378 * Read the pin group names like this:
379 * u0_a_1 = first groups of pins for uart0 on alt function a
380 * i2c2_b_2 = second group of pins for i2c2 on alt function b
381 *
382 * The groups are arranged as sets per altfunction column, so we can
383 * mux in one group at a time by selecting the same altfunction for them
384 * all. When functions require pins on different altfunctions, you need
385 * to combine several groups.
386 */
387
388/* Altfunction A column */
389static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
390 DB8500_PIN_AH4, DB8500_PIN_AH3 };
391static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
392static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
393/* Image processor I2C line, this is driven by image processor firmware */
394static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
395static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
396/* MSP0 can only be on these pins, but TXD and RXD can be flipped */
397static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
398static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
399static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
400/* Basic pins of the MMC/SD card 0 interface */
401static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
402 DB8500_PIN_AB4, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
403 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
404/* Often only 4 bits are used, then these are not needed (only used for MMC) */
405static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
406 DB8500_PIN_V3, DB8500_PIN_V2};
407static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 };
408/* MSP1 can only be on these pins, but TXD and RXD can be flipped */
409static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
410static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
411/* LCD interface */
412static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
413 DB8500_PIN_G3, DB8500_PIN_G2 };
414static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
415static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
416static const unsigned lcd_d0_d7_a_1_pins[] = {
417 DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
418 DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
419/* D8 thru D11 often used as TVOUT lines */
420static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
421 DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
422static const unsigned lcd_d12_d23_a_1_pins[] = {
423 DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
424 DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
425 DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
426static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
427 DB8500_PIN_D8, DB8500_PIN_D9 };
428static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
429static const unsigned kp_a_2_pins[] = {
430 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
431 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
432 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
433 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
434/* MC2 has 8 data lines and no direction control, so only for (e)MMC */
435static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
436 DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
437 DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
438 DB8500_PIN_C5 };
439static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
440 DB8500_PIN_C12, DB8500_PIN_C11 };
441static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
442 DB8500_PIN_C13, DB8500_PIN_D13 };
443static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
444/*
445 * Image processor GPIO pins are named "ipgpio" and have their own
446 * numberspace
447 */
448static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
449static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
450/* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
451static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
452 DB8500_PIN_D23 };
453/*
454 * This MSP cannot switch RX and TX, SCK in a separate group since this
455 * seems to be optional.
456 */
457static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
458static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
459 DB8500_PIN_AG28, DB8500_PIN_AG26 };
460static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
461 DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
462 DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
463 DB8500_PIN_AJ23 };
464/* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
465static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
466 DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
467 DB8500_PIN_AH15 };
468static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
469 DB8500_PIN_AH12, DB8500_PIN_AH11 };
470static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10 };
471static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ11, DB8500_PIN_AJ9,
472 DB8500_PIN_AH9, DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
473static const unsigned clkout_a_1_pins[] = { DB8500_PIN_AH7, DB8500_PIN_AJ6 };
474static const unsigned clkout_a_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
475static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
476 DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
477 DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
478 DB8500_PIN_AC28, DB8500_PIN_AC27 };
479
480/* Altfunction B column */
481static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
482static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
483static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
484static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
485static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
486static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
487static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
488/* Just RX and TX for UART2 */
489static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
490static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
491static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
492static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
493static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
494 DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
495static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
496static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
497 DB8500_PIN_V3, DB8500_PIN_V2 };
498static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
499static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
500 DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
501 DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
502 DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
503 DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
504 DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
505static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
506 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
507 DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
508 DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
509 DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
510 DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
511 DB8500_PIN_C9, DB8500_PIN_B14 };
512/* This chip select pin can be "ps0" in alt B so have it separately */
513static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
514static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
515static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
516static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
517static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
518static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
519 DB8500_PIN_C23, DB8500_PIN_D23 };
520static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
521 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
522 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
523 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
524 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
525static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
526static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
527static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
528 DB8500_PIN_AG13, DB8500_PIN_AH15 };
529static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
530 DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
531 DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
532 DB8500_PIN_AG8 };
533static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
534static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
535static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
536
537/* Altfunction C column */
538static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
539 DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
540static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
541static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
542static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
543static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
544static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
545static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
546/* Optional 4-bit Memory Stick interface */
547static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
548 DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
549 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
550static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
551static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
552static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
553static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
554 DB8500_PIN_AE2, DB8500_PIN_AG2 };
555static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
556static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
557static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
558static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
559static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
560static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
561 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
562static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
563static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
564static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
565static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
566static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
567static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
568 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
569 DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
570 DB8500_PIN_D9 };
571static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
572static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
573 DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
574 DB8500_PIN_C23, DB8500_PIN_D23 };
575static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
576static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
577static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
578 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
579static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
580static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
581static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
582 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
583static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
584static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
585static const unsigned clkout_c_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12 };
586static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
587static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
588 DB8500_PIN_AG9, DB8500_PIN_AG8 };
589static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
590static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
591
592/* Other C1 column */
593static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
594 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
595 DB8500_PIN_D6, DB8500_PIN_B7 };
596static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
597 DB8500_PIN_AH12, DB8500_PIN_AH11 };
598
599#define DB8500_PIN_GROUP(a,b) { .name = #a, .pins = a##_pins, \
600 .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
601
602static const struct nmk_pingroup nmk_db8500_groups[] = {
603 /* Altfunction A column */
604 DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
605 DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
606 DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
607 DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
608 DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
609 DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
610 DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
611 DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
612 DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
613 DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
614 DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
615 DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
616 DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
617 DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
618 DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
619 DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
620 DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
621 DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
622 DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
623 DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
624 DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
625 DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
626 DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
627 DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
628 DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
629 DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
630 DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
631 DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
632 DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
633 DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
634 DB8500_PIN_GROUP(clkout_a_1, NMK_GPIO_ALT_A),
635 DB8500_PIN_GROUP(clkout_a_2, NMK_GPIO_ALT_A),
636 DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
637 /* Altfunction B column */
638 DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
639 DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
640 DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
641 DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
642 DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
643 DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
644 DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
645 DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
646 DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
647 DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
648 DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
649 DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
650 DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
651 DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
652 DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
653 DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
654 DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
655 DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
656 DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
657 DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
658 DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
659 DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
660 DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
661 DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
662 DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
663 DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
664 DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
665 DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
666 DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
667 DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
668 DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
669 /* Altfunction C column */
670 DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
671 DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
672 DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
673 DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
674 DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
675 DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
676 DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
677 DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
678 DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
679 DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
680 DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
681 DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
682 DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
683 DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
684 DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
685 DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
686 DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
687 DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
688 DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
689 DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
690 DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
691 DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
692 DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
693 DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
694 DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
695 DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
696 DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
697 DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
698 DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
699 DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
700 DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
701 DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
702 DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
703 DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
704 DB8500_PIN_GROUP(clkout_c_1, NMK_GPIO_ALT_C),
705 DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
706 DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
707 DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
708 DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
709 /* Other alt C1 column, these are still configured as alt C */
710 DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C),
711 DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C),
712};
713
714static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
715 .gpio_ranges = nmk_db8500_ranges,
716 .gpio_num_ranges = ARRAY_SIZE(nmk_db8500_ranges),
717 .pins = nmk_db8500_pins,
718 .npins = ARRAY_SIZE(nmk_db8500_pins),
719 .groups = nmk_db8500_groups,
720 .ngroups = ARRAY_SIZE(nmk_db8500_groups),
721};
722
723void __devinit
724nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
725{
726 *soc = &nmk_db8500_soc;
727}
diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c
index 1352f3368444..7d5484fee5f3 100644
--- a/drivers/pinctrl/pinctrl-nomadik.c
+++ b/drivers/pinctrl/pinctrl-nomadik.c
@@ -24,12 +24,15 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/irqdomain.h> 25#include <linux/irqdomain.h>
26#include <linux/slab.h> 26#include <linux/slab.h>
27#include <linux/pinctrl/pinctrl.h>
27 28
28#include <asm/mach/irq.h> 29#include <asm/mach/irq.h>
29 30
30#include <plat/pincfg.h> 31#include <plat/pincfg.h>
31#include <plat/gpio-nomadik.h> 32#include <plat/gpio-nomadik.h>
32 33
34#include "pinctrl-nomadik.h"
35
33/* 36/*
34 * The GPIO module in the Nomadik family of Systems-on-Chip is an 37 * The GPIO module in the Nomadik family of Systems-on-Chip is an
35 * AMBA device, managing 32 pins and alternate functions. The logic block 38 * AMBA device, managing 32 pins and alternate functions. The logic block
@@ -64,6 +67,12 @@ struct nmk_gpio_chip {
64 u32 lowemi; 67 u32 lowemi;
65}; 68};
66 69
70struct nmk_pinctrl {
71 struct device *dev;
72 struct pinctrl_dev *pctl;
73 const struct nmk_pinctrl_soc_data *soc;
74};
75
67static struct nmk_gpio_chip * 76static struct nmk_gpio_chip *
68nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)]; 77nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
69 78
@@ -1282,6 +1291,98 @@ out:
1282 return ret; 1291 return ret;
1283} 1292}
1284 1293
1294static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev)
1295{
1296 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1297
1298 return npct->soc->ngroups;
1299}
1300
1301static const char *nmk_get_group_name(struct pinctrl_dev *pctldev,
1302 unsigned selector)
1303{
1304 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1305
1306 return npct->soc->groups[selector].name;
1307}
1308
1309static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
1310 const unsigned **pins,
1311 unsigned *num_pins)
1312{
1313 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1314
1315 *pins = npct->soc->groups[selector].pins;
1316 *num_pins = npct->soc->groups[selector].npins;
1317 return 0;
1318}
1319
1320static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
1321 unsigned offset)
1322{
1323 seq_printf(s, " Nomadik GPIO");
1324}
1325
1326static struct pinctrl_ops nmk_pinctrl_ops = {
1327 .get_groups_count = nmk_get_groups_cnt,
1328 .get_group_name = nmk_get_group_name,
1329 .get_group_pins = nmk_get_group_pins,
1330 .pin_dbg_show = nmk_pin_dbg_show,
1331};
1332
1333static struct pinctrl_desc nmk_pinctrl_desc = {
1334 .name = "pinctrl-nomadik",
1335 .pctlops = &nmk_pinctrl_ops,
1336 .owner = THIS_MODULE,
1337};
1338
1339static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
1340{
1341 const struct platform_device_id *platid = platform_get_device_id(pdev);
1342 struct nmk_pinctrl *npct;
1343 int i;
1344
1345 npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL);
1346 if (!npct)
1347 return -ENOMEM;
1348
1349 /* Poke in other ASIC variants here */
1350 if (platid->driver_data == PINCTRL_NMK_DB8500)
1351 nmk_pinctrl_db8500_init(&npct->soc);
1352
1353 /*
1354 * We need all the GPIO drivers to probe FIRST, or we will not be able
1355 * to obtain references to the struct gpio_chip * for them, and we
1356 * need this to proceed.
1357 */
1358 for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
1359 if (!nmk_gpio_chips[i]) {
1360 dev_warn(&pdev->dev, "GPIO chip %d not registered yet\n", i);
1361 devm_kfree(&pdev->dev, npct);
1362 return -EPROBE_DEFER;
1363 }
1364 npct->soc->gpio_ranges[i].gc = &nmk_gpio_chips[i]->chip;
1365 }
1366
1367 nmk_pinctrl_desc.pins = npct->soc->pins;
1368 nmk_pinctrl_desc.npins = npct->soc->npins;
1369 npct->dev = &pdev->dev;
1370 npct->pctl = pinctrl_register(&nmk_pinctrl_desc, &pdev->dev, npct);
1371 if (!npct->pctl) {
1372 dev_err(&pdev->dev, "could not register Nomadik pinctrl driver\n");
1373 return -EINVAL;
1374 }
1375
1376 /* We will handle a range of GPIO pins */
1377 for (i = 0; i < npct->soc->gpio_num_ranges; i++)
1378 pinctrl_add_gpio_range(npct->pctl, &npct->soc->gpio_ranges[i]);
1379
1380 platform_set_drvdata(pdev, npct);
1381 dev_info(&pdev->dev, "initialized Nomadik pin control driver\n");
1382
1383 return 0;
1384}
1385
1285static const struct of_device_id nmk_gpio_match[] = { 1386static const struct of_device_id nmk_gpio_match[] = {
1286 { .compatible = "st,nomadik-gpio", }, 1387 { .compatible = "st,nomadik-gpio", },
1287 {} 1388 {}
@@ -1296,9 +1397,28 @@ static struct platform_driver nmk_gpio_driver = {
1296 .probe = nmk_gpio_probe, 1397 .probe = nmk_gpio_probe,
1297}; 1398};
1298 1399
1400static const struct platform_device_id nmk_pinctrl_id[] = {
1401 { "pinctrl-stn8815", PINCTRL_NMK_STN8815 },
1402 { "pinctrl-db8500", PINCTRL_NMK_DB8500 },
1403};
1404
1405static struct platform_driver nmk_pinctrl_driver = {
1406 .driver = {
1407 .owner = THIS_MODULE,
1408 .name = "pinctrl-nomadik",
1409 },
1410 .probe = nmk_pinctrl_probe,
1411 .id_table = nmk_pinctrl_id,
1412};
1413
1299static int __init nmk_gpio_init(void) 1414static int __init nmk_gpio_init(void)
1300{ 1415{
1301 return platform_driver_register(&nmk_gpio_driver); 1416 int ret;
1417
1418 ret = platform_driver_register(&nmk_gpio_driver);
1419 if (ret)
1420 return ret;
1421 return platform_driver_register(&nmk_pinctrl_driver);
1302} 1422}
1303 1423
1304core_initcall(nmk_gpio_init); 1424core_initcall(nmk_gpio_init);
diff --git a/drivers/pinctrl/pinctrl-nomadik.h b/drivers/pinctrl/pinctrl-nomadik.h
new file mode 100644
index 000000000000..e690accb5051
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-nomadik.h
@@ -0,0 +1,61 @@
1#ifndef PINCTRL_PINCTRL_NOMADIK_H
2#define PINCTRL_PINCTRL_NOMADIK_H
3
4#include <plat/gpio-nomadik.h>
5
6/* Package definitions */
7#define PINCTRL_NMK_STN8815 0
8#define PINCTRL_NMK_DB8500 1
9
10/**
11 * struct nmk_pingroup - describes a Nomadik pin group
12 * @name: the name of this specific pin group
13 * @pins: an array of discrete physical pins used in this group, taken
14 * from the driver-local pin enumeration space
15 * @num_pins: the number of pins in this group array, i.e. the number of
16 * elements in .pins so we can iterate over that array
17 * @altsetting: the altsetting to apply to all pins in this group to
18 * configure them to be used by a function
19 */
20struct nmk_pingroup {
21 const char *name;
22 const unsigned int *pins;
23 const unsigned npins;
24 u32 altsetting;
25};
26
27/**
28 * struct nmk_pinctrl_soc_data - Nomadik pin controller per-SoC configuration
29 * @gpio_ranges: An array of GPIO ranges for this SoC
30 * @gpio_num_ranges: The number of GPIO ranges for this SoC
31 * @pins: An array describing all pins the pin controller affects.
32 * All pins which are also GPIOs must be listed first within the
33 * array, and be numbered identically to the GPIO controller's
34 * numbering.
35 * @npins: The numbmer of entries in @pins.
36 * @groups: An array describing all pin groups the pin SoC supports.
37 * @ngroups: The number of entries in @groups.
38 */
39struct nmk_pinctrl_soc_data {
40 struct pinctrl_gpio_range *gpio_ranges;
41 unsigned gpio_num_ranges;
42 const struct pinctrl_pin_desc *pins;
43 unsigned npins;
44 const struct nmk_pingroup *groups;
45 unsigned ngroups;
46};
47
48#ifdef CONFIG_PINCTRL_DB8500
49
50void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc);
51
52#else
53
54static inline void
55nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
56{
57}
58
59#endif
60
61#endif /* PINCTRL_PINCTRL_NOMADIK_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 03:28:33 -0500