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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-04-18 14:12:50 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-05-04 03:03:28 -0400
commitf2821b1ca3a21c21e8c1256ab45d70b00d1d6398 (patch)
tree51d7f2ab4772ae8800780c2eeceb52876ac99bb9 /drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
parent2284ba6b7d8310d09f3a0a5d81669632532ec26c (diff)
pinctrl: sunxi: Move Allwinner A10 pinctrl driver to a driver of its own
Move the pin description to a driver specific to be. This is one more step toward retiring pinctrl-sunxi-pins.h that used to define all the pins for all the Allwinner SoCs in a single header, that would have in turn result in having these structures in the final binary as many times as the header was included. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c1039
1 files changed, 1039 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
new file mode 100644
index 000000000000..fa1ff7c7e357
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -0,0 +1,1039 @@
1/*
2 * Allwinner A10 SoCs pinctrl driver.
3 *
4 * Copyright (C) 2014 Maxime Ripard
5 *
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/pinctrl/pinctrl.h>
18
19#include "pinctrl-sunxi.h"
20
21static const struct sunxi_desc_pin sun4i_a10_pins[] = {
22 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
23 SUNXI_FUNCTION(0x0, "gpio_in"),
24 SUNXI_FUNCTION(0x1, "gpio_out"),
25 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
26 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
27 SUNXI_FUNCTION(0x4, "uart2")), /* RTS */
28 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
29 SUNXI_FUNCTION(0x0, "gpio_in"),
30 SUNXI_FUNCTION(0x1, "gpio_out"),
31 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
32 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
33 SUNXI_FUNCTION(0x4, "uart2")), /* CTS */
34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
35 SUNXI_FUNCTION(0x0, "gpio_in"),
36 SUNXI_FUNCTION(0x1, "gpio_out"),
37 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
38 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
39 SUNXI_FUNCTION(0x4, "uart2")), /* TX */
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out"),
43 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
44 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
45 SUNXI_FUNCTION(0x4, "uart2")), /* RX */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
50 SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */
51 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
52 SUNXI_FUNCTION(0x0, "gpio_in"),
53 SUNXI_FUNCTION(0x1, "gpio_out"),
54 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
55 SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */
56 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
57 SUNXI_FUNCTION(0x0, "gpio_in"),
58 SUNXI_FUNCTION(0x1, "gpio_out"),
59 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
60 SUNXI_FUNCTION(0x3, "spi3")), /* CLK */
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
62 SUNXI_FUNCTION(0x0, "gpio_in"),
63 SUNXI_FUNCTION(0x1, "gpio_out"),
64 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
65 SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */
66 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
67 SUNXI_FUNCTION(0x0, "gpio_in"),
68 SUNXI_FUNCTION(0x1, "gpio_out"),
69 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
70 SUNXI_FUNCTION(0x3, "spi3")), /* MISO */
71 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
72 SUNXI_FUNCTION(0x0, "gpio_in"),
73 SUNXI_FUNCTION(0x1, "gpio_out"),
74 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
75 SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */
76 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
77 SUNXI_FUNCTION(0x0, "gpio_in"),
78 SUNXI_FUNCTION(0x1, "gpio_out"),
79 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
80 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
81 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
82 SUNXI_FUNCTION(0x0, "gpio_in"),
83 SUNXI_FUNCTION(0x1, "gpio_out"),
84 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
85 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
86 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
87 SUNXI_FUNCTION(0x0, "gpio_in"),
88 SUNXI_FUNCTION(0x1, "gpio_out"),
89 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
90 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
91 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
92 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
93 SUNXI_FUNCTION(0x0, "gpio_in"),
94 SUNXI_FUNCTION(0x1, "gpio_out"),
95 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
96 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
97 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
98 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
99 SUNXI_FUNCTION(0x0, "gpio_in"),
100 SUNXI_FUNCTION(0x1, "gpio_out"),
101 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
102 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
103 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
104 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
105 SUNXI_FUNCTION(0x0, "gpio_in"),
106 SUNXI_FUNCTION(0x1, "gpio_out"),
107 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
108 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
109 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
110 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
111 SUNXI_FUNCTION(0x0, "gpio_in"),
112 SUNXI_FUNCTION(0x1, "gpio_out"),
113 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
114 SUNXI_FUNCTION(0x3, "can"), /* TX */
115 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
116 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
117 SUNXI_FUNCTION(0x0, "gpio_in"),
118 SUNXI_FUNCTION(0x1, "gpio_out"),
119 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
120 SUNXI_FUNCTION(0x3, "can"), /* RX */
121 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
122 /* Hole */
123 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
124 SUNXI_FUNCTION(0x0, "gpio_in"),
125 SUNXI_FUNCTION(0x1, "gpio_out"),
126 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
127 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
131 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */
135 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
136 SUNXI_FUNCTION(0x0, "gpio_in"),
137 SUNXI_FUNCTION(0x1, "gpio_out"),
138 SUNXI_FUNCTION(0x2, "ir0")), /* TX */
139 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
140 SUNXI_FUNCTION(0x0, "gpio_in"),
141 SUNXI_FUNCTION(0x1, "gpio_out"),
142 SUNXI_FUNCTION(0x2, "ir0")), /* RX */
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */
147 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
148 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
149 SUNXI_FUNCTION(0x0, "gpio_in"),
150 SUNXI_FUNCTION(0x1, "gpio_out"),
151 SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */
152 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
153 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
154 SUNXI_FUNCTION(0x0, "gpio_in"),
155 SUNXI_FUNCTION(0x1, "gpio_out"),
156 SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */
157 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
158 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "i2s"), /* DO0 */
162 SUNXI_FUNCTION(0x3, "ac97")), /* DO */
163 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
164 SUNXI_FUNCTION(0x0, "gpio_in"),
165 SUNXI_FUNCTION(0x1, "gpio_out"),
166 SUNXI_FUNCTION(0x2, "i2s")), /* DO1 */
167 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out"),
170 SUNXI_FUNCTION(0x2, "i2s")), /* DO2 */
171 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
172 SUNXI_FUNCTION(0x0, "gpio_in"),
173 SUNXI_FUNCTION(0x1, "gpio_out"),
174 SUNXI_FUNCTION(0x2, "i2s")), /* DO3 */
175 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
176 SUNXI_FUNCTION(0x0, "gpio_in"),
177 SUNXI_FUNCTION(0x1, "gpio_out"),
178 SUNXI_FUNCTION(0x2, "i2s"), /* DI */
179 SUNXI_FUNCTION(0x3, "ac97")), /* DI */
180 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
181 SUNXI_FUNCTION(0x0, "gpio_in"),
182 SUNXI_FUNCTION(0x1, "gpio_out"),
183 SUNXI_FUNCTION(0x2, "spi2")), /* CS1 */
184 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
188 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
189 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
190 SUNXI_FUNCTION(0x0, "gpio_in"),
191 SUNXI_FUNCTION(0x1, "gpio_out"),
192 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
193 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
194 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
195 SUNXI_FUNCTION(0x0, "gpio_in"),
196 SUNXI_FUNCTION(0x1, "gpio_out"),
197 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
198 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
199 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
200 SUNXI_FUNCTION(0x0, "gpio_in"),
201 SUNXI_FUNCTION(0x1, "gpio_out"),
202 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
203 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
204 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
205 SUNXI_FUNCTION(0x0, "gpio_in"),
206 SUNXI_FUNCTION(0x1, "gpio_out"),
207 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
208 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out"),
211 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
212 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
213 SUNXI_FUNCTION(0x0, "gpio_in"),
214 SUNXI_FUNCTION(0x1, "gpio_out"),
215 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
216 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
220 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
221 SUNXI_FUNCTION(0x0, "gpio_in"),
222 SUNXI_FUNCTION(0x1, "gpio_out"),
223 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
224 SUNXI_FUNCTION(0x3, "ir1")), /* TX */
225 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
226 SUNXI_FUNCTION(0x0, "gpio_in"),
227 SUNXI_FUNCTION(0x1, "gpio_out"),
228 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
229 SUNXI_FUNCTION(0x3, "ir1")), /* RX */
230 /* Hole */
231 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
232 SUNXI_FUNCTION(0x0, "gpio_in"),
233 SUNXI_FUNCTION(0x1, "gpio_out"),
234 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
235 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
236 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
237 SUNXI_FUNCTION(0x0, "gpio_in"),
238 SUNXI_FUNCTION(0x1, "gpio_out"),
239 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
240 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
241 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out"),
244 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
245 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
246 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
247 SUNXI_FUNCTION(0x0, "gpio_in"),
248 SUNXI_FUNCTION(0x1, "gpio_out"),
249 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
250 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
251 SUNXI_FUNCTION(0x0, "gpio_in"),
252 SUNXI_FUNCTION(0x1, "gpio_out"),
253 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
254 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out"),
257 SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */
258 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
259 SUNXI_FUNCTION(0x0, "gpio_in"),
260 SUNXI_FUNCTION(0x1, "gpio_out"),
261 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
262 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
263 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
267 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
268 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
269 SUNXI_FUNCTION(0x0, "gpio_in"),
270 SUNXI_FUNCTION(0x1, "gpio_out"),
271 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
272 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
273 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
274 SUNXI_FUNCTION(0x0, "gpio_in"),
275 SUNXI_FUNCTION(0x1, "gpio_out"),
276 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
277 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
278 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out"),
281 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
282 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
283 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
284 SUNXI_FUNCTION(0x0, "gpio_in"),
285 SUNXI_FUNCTION(0x1, "gpio_out"),
286 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
287 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
288 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
289 SUNXI_FUNCTION(0x0, "gpio_in"),
290 SUNXI_FUNCTION(0x1, "gpio_out"),
291 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */
292 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
293 SUNXI_FUNCTION(0x0, "gpio_in"),
294 SUNXI_FUNCTION(0x1, "gpio_out"),
295 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */
300 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
301 SUNXI_FUNCTION(0x0, "gpio_in"),
302 SUNXI_FUNCTION(0x1, "gpio_out"),
303 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */
304 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
305 SUNXI_FUNCTION(0x0, "gpio_in"),
306 SUNXI_FUNCTION(0x1, "gpio_out"),
307 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
308 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
309 SUNXI_FUNCTION(0x0, "gpio_in"),
310 SUNXI_FUNCTION(0x1, "gpio_out"),
311 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
312 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
313 SUNXI_FUNCTION(0x0, "gpio_in"),
314 SUNXI_FUNCTION(0x1, "gpio_out"),
315 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
316 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
317 SUNXI_FUNCTION(0x0, "gpio_in"),
318 SUNXI_FUNCTION(0x1, "gpio_out"),
319 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
320 SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */
321 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
322 SUNXI_FUNCTION(0x0, "gpio_in"),
323 SUNXI_FUNCTION(0x1, "gpio_out"),
324 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
325 SUNXI_FUNCTION(0x3, "spi2")), /* CLK */
326 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
327 SUNXI_FUNCTION(0x0, "gpio_in"),
328 SUNXI_FUNCTION(0x1, "gpio_out"),
329 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
330 SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */
331 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
332 SUNXI_FUNCTION(0x0, "gpio_in"),
333 SUNXI_FUNCTION(0x1, "gpio_out"),
334 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
335 SUNXI_FUNCTION(0x3, "spi2")), /* MISO */
336 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
337 SUNXI_FUNCTION(0x0, "gpio_in"),
338 SUNXI_FUNCTION(0x1, "gpio_out"),
339 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
340 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
341 SUNXI_FUNCTION(0x0, "gpio_in"),
342 SUNXI_FUNCTION(0x1, "gpio_out"),
343 SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */
344 /* Hole */
345 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out"),
348 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
349 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
350 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
351 SUNXI_FUNCTION(0x0, "gpio_in"),
352 SUNXI_FUNCTION(0x1, "gpio_out"),
353 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
354 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
355 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
356 SUNXI_FUNCTION(0x0, "gpio_in"),
357 SUNXI_FUNCTION(0x1, "gpio_out"),
358 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
359 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
364 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
365 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
369 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
370 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out"),
373 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
374 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
375 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
376 SUNXI_FUNCTION(0x0, "gpio_in"),
377 SUNXI_FUNCTION(0x1, "gpio_out"),
378 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
379 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
380 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
381 SUNXI_FUNCTION(0x0, "gpio_in"),
382 SUNXI_FUNCTION(0x1, "gpio_out"),
383 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
384 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
385 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
386 SUNXI_FUNCTION(0x0, "gpio_in"),
387 SUNXI_FUNCTION(0x1, "gpio_out"),
388 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
389 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
390 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
391 SUNXI_FUNCTION(0x0, "gpio_in"),
392 SUNXI_FUNCTION(0x1, "gpio_out"),
393 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
394 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
395 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
396 SUNXI_FUNCTION(0x0, "gpio_in"),
397 SUNXI_FUNCTION(0x1, "gpio_out"),
398 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
399 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
400 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
401 SUNXI_FUNCTION(0x0, "gpio_in"),
402 SUNXI_FUNCTION(0x1, "gpio_out"),
403 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
404 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
405 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
406 SUNXI_FUNCTION(0x0, "gpio_in"),
407 SUNXI_FUNCTION(0x1, "gpio_out"),
408 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
409 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
410 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
411 SUNXI_FUNCTION(0x0, "gpio_in"),
412 SUNXI_FUNCTION(0x1, "gpio_out"),
413 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
414 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
415 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
416 SUNXI_FUNCTION(0x0, "gpio_in"),
417 SUNXI_FUNCTION(0x1, "gpio_out"),
418 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
419 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
420 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
421 SUNXI_FUNCTION(0x0, "gpio_in"),
422 SUNXI_FUNCTION(0x1, "gpio_out"),
423 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
424 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
425 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
426 SUNXI_FUNCTION(0x0, "gpio_in"),
427 SUNXI_FUNCTION(0x1, "gpio_out"),
428 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
429 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
430 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
431 SUNXI_FUNCTION(0x0, "gpio_in"),
432 SUNXI_FUNCTION(0x1, "gpio_out"),
433 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
434 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
435 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
436 SUNXI_FUNCTION(0x0, "gpio_in"),
437 SUNXI_FUNCTION(0x1, "gpio_out"),
438 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
439 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
440 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
441 SUNXI_FUNCTION(0x0, "gpio_in"),
442 SUNXI_FUNCTION(0x1, "gpio_out"),
443 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
444 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
445 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
446 SUNXI_FUNCTION(0x0, "gpio_in"),
447 SUNXI_FUNCTION(0x1, "gpio_out"),
448 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
449 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
450 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
451 SUNXI_FUNCTION(0x0, "gpio_in"),
452 SUNXI_FUNCTION(0x1, "gpio_out"),
453 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
454 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
455 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
456 SUNXI_FUNCTION(0x0, "gpio_in"),
457 SUNXI_FUNCTION(0x1, "gpio_out"),
458 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
459 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
460 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
461 SUNXI_FUNCTION(0x0, "gpio_in"),
462 SUNXI_FUNCTION(0x1, "gpio_out"),
463 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
464 SUNXI_FUNCTION(0x3, "sim")), /* DET */
465 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
466 SUNXI_FUNCTION(0x0, "gpio_in"),
467 SUNXI_FUNCTION(0x1, "gpio_out"),
468 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
469 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
470 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
471 SUNXI_FUNCTION(0x0, "gpio_in"),
472 SUNXI_FUNCTION(0x1, "gpio_out"),
473 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
474 SUNXI_FUNCTION(0x3, "sim")), /* RST */
475 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
476 SUNXI_FUNCTION(0x0, "gpio_in"),
477 SUNXI_FUNCTION(0x1, "gpio_out"),
478 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
479 SUNXI_FUNCTION(0x3, "sim")), /* SCK */
480 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
481 SUNXI_FUNCTION(0x0, "gpio_in"),
482 SUNXI_FUNCTION(0x1, "gpio_out"),
483 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
484 SUNXI_FUNCTION(0x3, "sim")), /* SDA */
485 /* Hole */
486 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
487 SUNXI_FUNCTION(0x0, "gpio_in"),
488 SUNXI_FUNCTION(0x1, "gpio_out"),
489 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
490 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
491 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
492 SUNXI_FUNCTION(0x0, "gpio_in"),
493 SUNXI_FUNCTION(0x1, "gpio_out"),
494 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
495 SUNXI_FUNCTION(0x3, "csi0")), /* CK */
496 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
497 SUNXI_FUNCTION(0x0, "gpio_in"),
498 SUNXI_FUNCTION(0x1, "gpio_out"),
499 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
500 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
501 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
502 SUNXI_FUNCTION(0x0, "gpio_in"),
503 SUNXI_FUNCTION(0x1, "gpio_out"),
504 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
505 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
506 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
507 SUNXI_FUNCTION(0x0, "gpio_in"),
508 SUNXI_FUNCTION(0x1, "gpio_out"),
509 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
510 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
511 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
515 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
516 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
517 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
518 SUNXI_FUNCTION(0x0, "gpio_in"),
519 SUNXI_FUNCTION(0x1, "gpio_out"),
520 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
521 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
522 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
523 SUNXI_FUNCTION(0x0, "gpio_in"),
524 SUNXI_FUNCTION(0x1, "gpio_out"),
525 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
526 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
527 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
528 SUNXI_FUNCTION(0x0, "gpio_in"),
529 SUNXI_FUNCTION(0x1, "gpio_out"),
530 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
531 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
532 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
533 SUNXI_FUNCTION(0x0, "gpio_in"),
534 SUNXI_FUNCTION(0x1, "gpio_out"),
535 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
536 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
537 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
538 SUNXI_FUNCTION(0x0, "gpio_in"),
539 SUNXI_FUNCTION(0x1, "gpio_out"),
540 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
541 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
542 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
543 SUNXI_FUNCTION(0x0, "gpio_in"),
544 SUNXI_FUNCTION(0x1, "gpio_out"),
545 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
546 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
547 /* Hole */
548 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
549 SUNXI_FUNCTION(0x0, "gpio_in"),
550 SUNXI_FUNCTION(0x1, "gpio_out"),
551 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
552 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
553 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
554 SUNXI_FUNCTION(0x0, "gpio_in"),
555 SUNXI_FUNCTION(0x1, "gpio_out"),
556 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
557 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
558 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
559 SUNXI_FUNCTION(0x0, "gpio_in"),
560 SUNXI_FUNCTION(0x1, "gpio_out"),
561 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
562 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
563 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
564 SUNXI_FUNCTION(0x0, "gpio_in"),
565 SUNXI_FUNCTION(0x1, "gpio_out"),
566 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
567 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
568 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
569 SUNXI_FUNCTION(0x0, "gpio_in"),
570 SUNXI_FUNCTION(0x1, "gpio_out"),
571 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
572 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
573 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
574 SUNXI_FUNCTION(0x0, "gpio_in"),
575 SUNXI_FUNCTION(0x1, "gpio_out"),
576 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
577 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
578 /* Hole */
579 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
580 SUNXI_FUNCTION(0x0, "gpio_in"),
581 SUNXI_FUNCTION(0x1, "gpio_out"),
582 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
583 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
584 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
585 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
586 SUNXI_FUNCTION(0x0, "gpio_in"),
587 SUNXI_FUNCTION(0x1, "gpio_out"),
588 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
589 SUNXI_FUNCTION(0x3, "csi1"), /* CK */
590 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
591 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
592 SUNXI_FUNCTION(0x0, "gpio_in"),
593 SUNXI_FUNCTION(0x1, "gpio_out"),
594 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
595 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
596 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
597 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
598 SUNXI_FUNCTION(0x0, "gpio_in"),
599 SUNXI_FUNCTION(0x1, "gpio_out"),
600 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
601 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
602 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
603 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
604 SUNXI_FUNCTION(0x0, "gpio_in"),
605 SUNXI_FUNCTION(0x1, "gpio_out"),
606 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
607 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
608 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
609 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
610 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
611 SUNXI_FUNCTION(0x0, "gpio_in"),
612 SUNXI_FUNCTION(0x1, "gpio_out"),
613 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
614 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
615 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
616 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
617 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
618 SUNXI_FUNCTION(0x0, "gpio_in"),
619 SUNXI_FUNCTION(0x1, "gpio_out"),
620 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
621 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
622 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
623 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
624 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
625 SUNXI_FUNCTION(0x0, "gpio_in"),
626 SUNXI_FUNCTION(0x1, "gpio_out"),
627 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
628 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
629 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
630 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
631 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
632 SUNXI_FUNCTION(0x0, "gpio_in"),
633 SUNXI_FUNCTION(0x1, "gpio_out"),
634 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
635 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
636 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
637 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
638 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
639 SUNXI_FUNCTION(0x0, "gpio_in"),
640 SUNXI_FUNCTION(0x1, "gpio_out"),
641 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
642 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
643 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
644 SUNXI_FUNCTION(0x5, "csi0")), /* D13 */
645 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
646 SUNXI_FUNCTION(0x0, "gpio_in"),
647 SUNXI_FUNCTION(0x1, "gpio_out"),
648 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
649 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
650 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
651 SUNXI_FUNCTION(0x5, "csi0")), /* D14 */
652 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
653 SUNXI_FUNCTION(0x0, "gpio_in"),
654 SUNXI_FUNCTION(0x1, "gpio_out"),
655 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
656 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
657 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
658 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
659 /* Hole */
660 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
661 SUNXI_FUNCTION(0x0, "gpio_in"),
662 SUNXI_FUNCTION(0x1, "gpio_out"),
663 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
664 SUNXI_FUNCTION(0x3, "pata"), /* ATAA0 */
665 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
666 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
667 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
668 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
669 SUNXI_FUNCTION(0x0, "gpio_in"),
670 SUNXI_FUNCTION(0x1, "gpio_out"),
671 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
672 SUNXI_FUNCTION(0x3, "pata"), /* ATAA1 */
673 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
674 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
675 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
676 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
677 SUNXI_FUNCTION(0x0, "gpio_in"),
678 SUNXI_FUNCTION(0x1, "gpio_out"),
679 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
680 SUNXI_FUNCTION(0x3, "pata"), /* ATAA2 */
681 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
682 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
683 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
684 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
685 SUNXI_FUNCTION(0x0, "gpio_in"),
686 SUNXI_FUNCTION(0x1, "gpio_out"),
687 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
688 SUNXI_FUNCTION(0x3, "pata"), /* ATAIRQ */
689 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
690 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
691 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
692 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
693 SUNXI_FUNCTION(0x0, "gpio_in"),
694 SUNXI_FUNCTION(0x1, "gpio_out"),
695 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
696 SUNXI_FUNCTION(0x3, "pata"), /* ATAD0 */
697 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
698 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
699 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
700 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
701 SUNXI_FUNCTION(0x0, "gpio_in"),
702 SUNXI_FUNCTION(0x1, "gpio_out"),
703 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
704 SUNXI_FUNCTION(0x3, "pata"), /* ATAD1 */
705 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
706 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
707 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
708 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
709 SUNXI_FUNCTION(0x0, "gpio_in"),
710 SUNXI_FUNCTION(0x1, "gpio_out"),
711 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
712 SUNXI_FUNCTION(0x3, "pata"), /* ATAD2 */
713 SUNXI_FUNCTION(0x4, "uart5"), /* TX */
714 SUNXI_FUNCTION(0x5, "ms"), /* BS */
715 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
716 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
717 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
718 SUNXI_FUNCTION(0x0, "gpio_in"),
719 SUNXI_FUNCTION(0x1, "gpio_out"),
720 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
721 SUNXI_FUNCTION(0x3, "pata"), /* ATAD3 */
722 SUNXI_FUNCTION(0x4, "uart5"), /* RX */
723 SUNXI_FUNCTION(0x5, "ms"), /* CLK */
724 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
725 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
726 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
727 SUNXI_FUNCTION(0x0, "gpio_in"),
728 SUNXI_FUNCTION(0x1, "gpio_out"),
729 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
730 SUNXI_FUNCTION(0x3, "pata"), /* ATAD4 */
731 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
732 SUNXI_FUNCTION(0x5, "ms"), /* D0 */
733 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
734 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
735 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
736 SUNXI_FUNCTION(0x0, "gpio_in"),
737 SUNXI_FUNCTION(0x1, "gpio_out"),
738 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
739 SUNXI_FUNCTION(0x3, "pata"), /* ATAD5 */
740 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
741 SUNXI_FUNCTION(0x5, "ms"), /* D1 */
742 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
743 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
744 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
745 SUNXI_FUNCTION(0x0, "gpio_in"),
746 SUNXI_FUNCTION(0x1, "gpio_out"),
747 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
748 SUNXI_FUNCTION(0x3, "pata"), /* ATAD6 */
749 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
750 SUNXI_FUNCTION(0x5, "ms"), /* D2 */
751 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
752 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
753 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
754 SUNXI_FUNCTION(0x0, "gpio_in"),
755 SUNXI_FUNCTION(0x1, "gpio_out"),
756 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
757 SUNXI_FUNCTION(0x3, "pata"), /* ATAD7 */
758 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
759 SUNXI_FUNCTION(0x5, "ms"), /* D3 */
760 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
761 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
762 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
763 SUNXI_FUNCTION(0x0, "gpio_in"),
764 SUNXI_FUNCTION(0x1, "gpio_out"),
765 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
766 SUNXI_FUNCTION(0x3, "pata"), /* ATAD8 */
767 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
768 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
769 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
770 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
771 SUNXI_FUNCTION(0x0, "gpio_in"),
772 SUNXI_FUNCTION(0x1, "gpio_out"),
773 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
774 SUNXI_FUNCTION(0x3, "pata"), /* ATAD9 */
775 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
776 SUNXI_FUNCTION(0x5, "sim"), /* RST */
777 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
778 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
779 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
780 SUNXI_FUNCTION(0x0, "gpio_in"),
781 SUNXI_FUNCTION(0x1, "gpio_out"),
782 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
783 SUNXI_FUNCTION(0x3, "pata"), /* ATAD10 */
784 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
785 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
786 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
787 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
788 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
789 SUNXI_FUNCTION(0x0, "gpio_in"),
790 SUNXI_FUNCTION(0x1, "gpio_out"),
791 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
792 SUNXI_FUNCTION(0x3, "pata"), /* ATAD11 */
793 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
794 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
795 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
796 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
797 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
798 SUNXI_FUNCTION(0x0, "gpio_in"),
799 SUNXI_FUNCTION(0x1, "gpio_out"),
800 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
801 SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */
802 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
803 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
804 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out"),
808 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
809 SUNXI_FUNCTION(0x3, "pata"), /* ATAD13 */
810 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
811 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
812 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
813 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out"),
817 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
818 SUNXI_FUNCTION(0x3, "pata"), /* ATAD14 */
819 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
820 SUNXI_FUNCTION(0x5, "sim"), /* SCK */
821 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
822 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
823 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
824 SUNXI_FUNCTION(0x0, "gpio_in"),
825 SUNXI_FUNCTION(0x1, "gpio_out"),
826 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
827 SUNXI_FUNCTION(0x3, "pata"), /* ATAD15 */
828 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
829 SUNXI_FUNCTION(0x5, "sim"), /* SDA */
830 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
831 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
832 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
833 SUNXI_FUNCTION(0x0, "gpio_in"),
834 SUNXI_FUNCTION(0x1, "gpio_out"),
835 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
836 SUNXI_FUNCTION(0x3, "pata"), /* ATAOE */
837 SUNXI_FUNCTION(0x4, "can"), /* TX */
838 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
839 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
840 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
841 SUNXI_FUNCTION(0x0, "gpio_in"),
842 SUNXI_FUNCTION(0x1, "gpio_out"),
843 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
844 SUNXI_FUNCTION(0x3, "pata"), /* ATADREQ */
845 SUNXI_FUNCTION(0x4, "can"), /* RX */
846 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
847 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
848 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
849 SUNXI_FUNCTION(0x0, "gpio_in"),
850 SUNXI_FUNCTION(0x1, "gpio_out"),
851 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
852 SUNXI_FUNCTION(0x3, "pata"), /* ATADACK */
853 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
854 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
855 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
856 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
857 SUNXI_FUNCTION(0x0, "gpio_in"),
858 SUNXI_FUNCTION(0x1, "gpio_out"),
859 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
860 SUNXI_FUNCTION(0x3, "pata"), /* ATACS0 */
861 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
862 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
863 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
864 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
865 SUNXI_FUNCTION(0x0, "gpio_in"),
866 SUNXI_FUNCTION(0x1, "gpio_out"),
867 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
868 SUNXI_FUNCTION(0x3, "pata"), /* ATACS1 */
869 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
870 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
871 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
872 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
873 SUNXI_FUNCTION(0x0, "gpio_in"),
874 SUNXI_FUNCTION(0x1, "gpio_out"),
875 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
876 SUNXI_FUNCTION(0x3, "pata"), /* ATAIORDY */
877 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
878 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
879 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
880 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
881 SUNXI_FUNCTION(0x0, "gpio_in"),
882 SUNXI_FUNCTION(0x1, "gpio_out"),
883 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
884 SUNXI_FUNCTION(0x3, "pata"), /* ATAIOR */
885 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
886 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
887 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
888 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
889 SUNXI_FUNCTION(0x0, "gpio_in"),
890 SUNXI_FUNCTION(0x1, "gpio_out"),
891 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
892 SUNXI_FUNCTION(0x3, "pata"), /* ATAIOW */
893 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
894 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
895 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
896 /* Hole */
897 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
898 SUNXI_FUNCTION(0x0, "gpio_in"),
899 SUNXI_FUNCTION(0x1, "gpio_out")),
900 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
901 SUNXI_FUNCTION(0x0, "gpio_in"),
902 SUNXI_FUNCTION(0x1, "gpio_out")),
903 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
904 SUNXI_FUNCTION(0x0, "gpio_in"),
905 SUNXI_FUNCTION(0x1, "gpio_out")),
906 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
907 SUNXI_FUNCTION(0x0, "gpio_in"),
908 SUNXI_FUNCTION(0x1, "gpio_out"),
909 SUNXI_FUNCTION(0x2, "pwm")), /* PWM1 */
910 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
911 SUNXI_FUNCTION(0x0, "gpio_in"),
912 SUNXI_FUNCTION(0x1, "gpio_out"),
913 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
914 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
915 SUNXI_FUNCTION(0x0, "gpio_in"),
916 SUNXI_FUNCTION(0x1, "gpio_out"),
917 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
918 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
919 SUNXI_FUNCTION(0x0, "gpio_in"),
920 SUNXI_FUNCTION(0x1, "gpio_out"),
921 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
922 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
923 SUNXI_FUNCTION(0x0, "gpio_in"),
924 SUNXI_FUNCTION(0x1, "gpio_out"),
925 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
926 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
927 SUNXI_FUNCTION(0x0, "gpio_in"),
928 SUNXI_FUNCTION(0x1, "gpio_out"),
929 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
930 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
931 SUNXI_FUNCTION(0x0, "gpio_in"),
932 SUNXI_FUNCTION(0x1, "gpio_out"),
933 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
934 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
935 SUNXI_FUNCTION(0x0, "gpio_in"),
936 SUNXI_FUNCTION(0x1, "gpio_out"),
937 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
938 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
939 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
940 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
941 SUNXI_FUNCTION(0x0, "gpio_in"),
942 SUNXI_FUNCTION(0x1, "gpio_out"),
943 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
944 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
945 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
946 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
947 SUNXI_FUNCTION(0x0, "gpio_in"),
948 SUNXI_FUNCTION(0x1, "gpio_out"),
949 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
950 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
951 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
952 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
953 SUNXI_FUNCTION(0x0, "gpio_in"),
954 SUNXI_FUNCTION(0x1, "gpio_out"),
955 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
956 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
957 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
958 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
959 SUNXI_FUNCTION(0x0, "gpio_in"),
960 SUNXI_FUNCTION(0x1, "gpio_out"),
961 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
962 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
963 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
964 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
965 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
966 SUNXI_FUNCTION(0x0, "gpio_in"),
967 SUNXI_FUNCTION(0x1, "gpio_out"),
968 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
969 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
970 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
971 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
972 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
973 SUNXI_FUNCTION(0x0, "gpio_in"),
974 SUNXI_FUNCTION(0x1, "gpio_out"),
975 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
976 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
977 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
978 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
979 SUNXI_FUNCTION(0x0, "gpio_in"),
980 SUNXI_FUNCTION(0x1, "gpio_out"),
981 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
982 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
983 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
984 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
985 SUNXI_FUNCTION(0x0, "gpio_in"),
986 SUNXI_FUNCTION(0x1, "gpio_out"),
987 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
988 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
989 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
990 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
991 SUNXI_FUNCTION(0x0, "gpio_in"),
992 SUNXI_FUNCTION(0x1, "gpio_out"),
993 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
994 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
995 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
996 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
997 SUNXI_FUNCTION(0x0, "gpio_in"),
998 SUNXI_FUNCTION(0x1, "gpio_out"),
999 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
1000 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
1001 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1002 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1003 SUNXI_FUNCTION(0x0, "gpio_in"),
1004 SUNXI_FUNCTION(0x1, "gpio_out"),
1005 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
1006 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1007 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1008};
1009
1010static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
1011 .pins = sun4i_a10_pins,
1012 .npins = ARRAY_SIZE(sun4i_a10_pins),
1013};
1014
1015static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
1016{
1017 return sunxi_pinctrl_init(pdev,
1018 &sun4i_a10_pinctrl_data);
1019}
1020
1021static struct of_device_id sun4i_a10_pinctrl_match[] = {
1022 { .compatible = "allwinner,sun4i-a10-pinctrl", },
1023 {}
1024};
1025MODULE_DEVICE_TABLE(of, sun4i_a10_pinctrl_match);
1026
1027static struct platform_driver sun4i_a10_pinctrl_driver = {
1028 .probe = sun4i_a10_pinctrl_probe,
1029 .driver = {
1030 .name = "sun4i-pinctrl",
1031 .owner = THIS_MODULE,
1032 .of_match_table = sun4i_a10_pinctrl_match,
1033 },
1034};
1035module_platform_driver(sun4i_a10_pinctrl_driver);
1036
1037MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
1038MODULE_DESCRIPTION("Allwinner A10 pinctrl driver");
1039MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 16:36:46 -0500