diff options
author | Jiri Kosina <jkosina@suse.cz> | 2014-11-20 08:42:02 -0500 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2014-11-20 08:42:02 -0500 |
commit | a02001086bbfb4da35d1228bebc2f1b442db455f (patch) | |
tree | 62ab47936cef06fd08657ca5b6cd1df98c19be57 /drivers/pinctrl/spear | |
parent | eff264efeeb0898408e8c9df72d8a32621035bed (diff) | |
parent | fc14f9c1272f62c3e8d01300f52467c0d9af50f9 (diff) |
Merge Linus' tree to be be to apply submitted patches to newer code than
current trivial.git base
Diffstat (limited to 'drivers/pinctrl/spear')
-rw-r--r-- | drivers/pinctrl/spear/Kconfig | 1 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-plgpio.c | 84 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear.c | 11 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear1310.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear1340.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear300.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear310.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/spear/pinctrl-spear320.c | 2 |
8 files changed, 39 insertions, 67 deletions
diff --git a/drivers/pinctrl/spear/Kconfig b/drivers/pinctrl/spear/Kconfig index 04d93e602674..9ef18eb958e1 100644 --- a/drivers/pinctrl/spear/Kconfig +++ b/drivers/pinctrl/spear/Kconfig | |||
@@ -48,6 +48,7 @@ config PINCTRL_SPEAR1340 | |||
48 | config PINCTRL_SPEAR_PLGPIO | 48 | config PINCTRL_SPEAR_PLGPIO |
49 | bool "SPEAr SoC PLGPIO Controller" | 49 | bool "SPEAr SoC PLGPIO Controller" |
50 | depends on GPIOLIB && PINCTRL_SPEAR | 50 | depends on GPIOLIB && PINCTRL_SPEAR |
51 | select GPIOLIB_IRQCHIP | ||
51 | help | 52 | help |
52 | Say yes here to support PLGPIO controller on ST Microelectronics SPEAr | 53 | Say yes here to support PLGPIO controller on ST Microelectronics SPEAr |
53 | SoCs. | 54 | SoCs. |
diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c index ecfc6aacf270..ce5f22c4151d 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c | |||
@@ -11,12 +11,11 @@ | |||
11 | 11 | ||
12 | #include <linux/clk.h> | 12 | #include <linux/clk.h> |
13 | #include <linux/err.h> | 13 | #include <linux/err.h> |
14 | #include <linux/gpio.h> | 14 | #include <linux/gpio/driver.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/irq.h> | ||
17 | #include <linux/irqdomain.h> | ||
18 | #include <linux/irqchip/chained_irq.h> | ||
19 | #include <linux/module.h> | 16 | #include <linux/module.h> |
17 | #include <linux/of.h> | ||
18 | #include <linux/of_platform.h> | ||
20 | #include <linux/pinctrl/consumer.h> | 19 | #include <linux/pinctrl/consumer.h> |
21 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
22 | #include <linux/pm.h> | 21 | #include <linux/pm.h> |
@@ -54,7 +53,6 @@ struct plgpio_regs { | |||
54 | * | 53 | * |
55 | * lock: lock for guarding gpio registers | 54 | * lock: lock for guarding gpio registers |
56 | * base: base address of plgpio block | 55 | * base: base address of plgpio block |
57 | * irq_base: irq number of plgpio0 | ||
58 | * chip: gpio framework specific chip information structure | 56 | * chip: gpio framework specific chip information structure |
59 | * p2o: function ptr for pin to offset conversion. This is required only for | 57 | * p2o: function ptr for pin to offset conversion. This is required only for |
60 | * machines where mapping b/w pin and offset is not 1-to-1. | 58 | * machines where mapping b/w pin and offset is not 1-to-1. |
@@ -68,8 +66,6 @@ struct plgpio { | |||
68 | spinlock_t lock; | 66 | spinlock_t lock; |
69 | void __iomem *base; | 67 | void __iomem *base; |
70 | struct clk *clk; | 68 | struct clk *clk; |
71 | unsigned irq_base; | ||
72 | struct irq_domain *irq_domain; | ||
73 | struct gpio_chip chip; | 69 | struct gpio_chip chip; |
74 | int (*p2o)(int pin); /* pin_to_offset */ | 70 | int (*p2o)(int pin); /* pin_to_offset */ |
75 | int (*o2p)(int offset); /* offset_to_pin */ | 71 | int (*o2p)(int offset); /* offset_to_pin */ |
@@ -280,21 +276,12 @@ disable_clk: | |||
280 | pinctrl_free_gpio(gpio); | 276 | pinctrl_free_gpio(gpio); |
281 | } | 277 | } |
282 | 278 | ||
283 | static int plgpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
284 | { | ||
285 | struct plgpio *plgpio = container_of(chip, struct plgpio, chip); | ||
286 | |||
287 | if (IS_ERR_VALUE(plgpio->irq_base)) | ||
288 | return -EINVAL; | ||
289 | |||
290 | return irq_find_mapping(plgpio->irq_domain, offset); | ||
291 | } | ||
292 | |||
293 | /* PLGPIO IRQ */ | 279 | /* PLGPIO IRQ */ |
294 | static void plgpio_irq_disable(struct irq_data *d) | 280 | static void plgpio_irq_disable(struct irq_data *d) |
295 | { | 281 | { |
296 | struct plgpio *plgpio = irq_data_get_irq_chip_data(d); | 282 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
297 | int offset = d->irq - plgpio->irq_base; | 283 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); |
284 | int offset = d->hwirq; | ||
298 | unsigned long flags; | 285 | unsigned long flags; |
299 | 286 | ||
300 | /* get correct offset for "offset" pin */ | 287 | /* get correct offset for "offset" pin */ |
@@ -311,8 +298,9 @@ static void plgpio_irq_disable(struct irq_data *d) | |||
311 | 298 | ||
312 | static void plgpio_irq_enable(struct irq_data *d) | 299 | static void plgpio_irq_enable(struct irq_data *d) |
313 | { | 300 | { |
314 | struct plgpio *plgpio = irq_data_get_irq_chip_data(d); | 301 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
315 | int offset = d->irq - plgpio->irq_base; | 302 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); |
303 | int offset = d->hwirq; | ||
316 | unsigned long flags; | 304 | unsigned long flags; |
317 | 305 | ||
318 | /* get correct offset for "offset" pin */ | 306 | /* get correct offset for "offset" pin */ |
@@ -329,8 +317,9 @@ static void plgpio_irq_enable(struct irq_data *d) | |||
329 | 317 | ||
330 | static int plgpio_irq_set_type(struct irq_data *d, unsigned trigger) | 318 | static int plgpio_irq_set_type(struct irq_data *d, unsigned trigger) |
331 | { | 319 | { |
332 | struct plgpio *plgpio = irq_data_get_irq_chip_data(d); | 320 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
333 | int offset = d->irq - plgpio->irq_base; | 321 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); |
322 | int offset = d->hwirq; | ||
334 | void __iomem *reg_off; | 323 | void __iomem *reg_off; |
335 | unsigned int supported_type = 0, val; | 324 | unsigned int supported_type = 0, val; |
336 | 325 | ||
@@ -369,7 +358,8 @@ static struct irq_chip plgpio_irqchip = { | |||
369 | 358 | ||
370 | static void plgpio_irq_handler(unsigned irq, struct irq_desc *desc) | 359 | static void plgpio_irq_handler(unsigned irq, struct irq_desc *desc) |
371 | { | 360 | { |
372 | struct plgpio *plgpio = irq_get_handler_data(irq); | 361 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
362 | struct plgpio *plgpio = container_of(gc, struct plgpio, chip); | ||
373 | struct irq_chip *irqchip = irq_desc_get_chip(desc); | 363 | struct irq_chip *irqchip = irq_desc_get_chip(desc); |
374 | int regs_count, count, pin, offset, i = 0; | 364 | int regs_count, count, pin, offset, i = 0; |
375 | unsigned long pending; | 365 | unsigned long pending; |
@@ -410,7 +400,8 @@ static void plgpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
410 | 400 | ||
411 | /* get correct irq line number */ | 401 | /* get correct irq line number */ |
412 | pin = i * MAX_GPIO_PER_REG + pin; | 402 | pin = i * MAX_GPIO_PER_REG + pin; |
413 | generic_handle_irq(plgpio_to_irq(&plgpio->chip, pin)); | 403 | generic_handle_irq( |
404 | irq_find_mapping(gc->irqdomain, pin)); | ||
414 | } | 405 | } |
415 | } | 406 | } |
416 | chained_irq_exit(irqchip, desc); | 407 | chained_irq_exit(irqchip, desc); |
@@ -523,10 +514,9 @@ end: | |||
523 | } | 514 | } |
524 | static int plgpio_probe(struct platform_device *pdev) | 515 | static int plgpio_probe(struct platform_device *pdev) |
525 | { | 516 | { |
526 | struct device_node *np = pdev->dev.of_node; | ||
527 | struct plgpio *plgpio; | 517 | struct plgpio *plgpio; |
528 | struct resource *res; | 518 | struct resource *res; |
529 | int ret, irq, i; | 519 | int ret, irq; |
530 | 520 | ||
531 | plgpio = devm_kzalloc(&pdev->dev, sizeof(*plgpio), GFP_KERNEL); | 521 | plgpio = devm_kzalloc(&pdev->dev, sizeof(*plgpio), GFP_KERNEL); |
532 | if (!plgpio) { | 522 | if (!plgpio) { |
@@ -563,7 +553,6 @@ static int plgpio_probe(struct platform_device *pdev) | |||
563 | platform_set_drvdata(pdev, plgpio); | 553 | platform_set_drvdata(pdev, plgpio); |
564 | spin_lock_init(&plgpio->lock); | 554 | spin_lock_init(&plgpio->lock); |
565 | 555 | ||
566 | plgpio->irq_base = -1; | ||
567 | plgpio->chip.base = -1; | 556 | plgpio->chip.base = -1; |
568 | plgpio->chip.request = plgpio_request; | 557 | plgpio->chip.request = plgpio_request; |
569 | plgpio->chip.free = plgpio_free; | 558 | plgpio->chip.free = plgpio_free; |
@@ -571,10 +560,10 @@ static int plgpio_probe(struct platform_device *pdev) | |||
571 | plgpio->chip.direction_output = plgpio_direction_output; | 560 | plgpio->chip.direction_output = plgpio_direction_output; |
572 | plgpio->chip.get = plgpio_get_value; | 561 | plgpio->chip.get = plgpio_get_value; |
573 | plgpio->chip.set = plgpio_set_value; | 562 | plgpio->chip.set = plgpio_set_value; |
574 | plgpio->chip.to_irq = plgpio_to_irq; | ||
575 | plgpio->chip.label = dev_name(&pdev->dev); | 563 | plgpio->chip.label = dev_name(&pdev->dev); |
576 | plgpio->chip.dev = &pdev->dev; | 564 | plgpio->chip.dev = &pdev->dev; |
577 | plgpio->chip.owner = THIS_MODULE; | 565 | plgpio->chip.owner = THIS_MODULE; |
566 | plgpio->chip.of_node = pdev->dev.of_node; | ||
578 | 567 | ||
579 | if (!IS_ERR(plgpio->clk)) { | 568 | if (!IS_ERR(plgpio->clk)) { |
580 | ret = clk_prepare(plgpio->clk); | 569 | ret = clk_prepare(plgpio->clk); |
@@ -592,43 +581,32 @@ static int plgpio_probe(struct platform_device *pdev) | |||
592 | 581 | ||
593 | irq = platform_get_irq(pdev, 0); | 582 | irq = platform_get_irq(pdev, 0); |
594 | if (irq < 0) { | 583 | if (irq < 0) { |
595 | dev_info(&pdev->dev, "irqs not supported\n"); | 584 | dev_info(&pdev->dev, "PLGPIO registered without IRQs\n"); |
596 | return 0; | ||
597 | } | ||
598 | |||
599 | plgpio->irq_base = irq_alloc_descs(-1, 0, plgpio->chip.ngpio, 0); | ||
600 | if (IS_ERR_VALUE(plgpio->irq_base)) { | ||
601 | /* we would not support irq for gpio */ | ||
602 | dev_warn(&pdev->dev, "couldn't allocate irq base\n"); | ||
603 | return 0; | 585 | return 0; |
604 | } | 586 | } |
605 | 587 | ||
606 | plgpio->irq_domain = irq_domain_add_legacy(np, plgpio->chip.ngpio, | 588 | ret = gpiochip_irqchip_add(&plgpio->chip, |
607 | plgpio->irq_base, 0, &irq_domain_simple_ops, NULL); | 589 | &plgpio_irqchip, |
608 | if (WARN_ON(!plgpio->irq_domain)) { | 590 | 0, |
609 | dev_err(&pdev->dev, "irq domain init failed\n"); | 591 | handle_simple_irq, |
610 | irq_free_descs(plgpio->irq_base, plgpio->chip.ngpio); | 592 | IRQ_TYPE_NONE); |
611 | ret = -ENXIO; | 593 | if (ret) { |
594 | dev_err(&pdev->dev, "failed to add irqchip to gpiochip\n"); | ||
612 | goto remove_gpiochip; | 595 | goto remove_gpiochip; |
613 | } | 596 | } |
614 | 597 | ||
615 | irq_set_chained_handler(irq, plgpio_irq_handler); | 598 | gpiochip_set_chained_irqchip(&plgpio->chip, |
616 | for (i = 0; i < plgpio->chip.ngpio; i++) { | 599 | &plgpio_irqchip, |
617 | irq_set_chip_and_handler(i + plgpio->irq_base, &plgpio_irqchip, | 600 | irq, |
618 | handle_simple_irq); | 601 | plgpio_irq_handler); |
619 | set_irq_flags(i + plgpio->irq_base, IRQF_VALID); | ||
620 | irq_set_chip_data(i + plgpio->irq_base, plgpio); | ||
621 | } | ||
622 | 602 | ||
623 | irq_set_handler_data(irq, plgpio); | ||
624 | dev_info(&pdev->dev, "PLGPIO registered with IRQs\n"); | 603 | dev_info(&pdev->dev, "PLGPIO registered with IRQs\n"); |
625 | 604 | ||
626 | return 0; | 605 | return 0; |
627 | 606 | ||
628 | remove_gpiochip: | 607 | remove_gpiochip: |
629 | dev_info(&pdev->dev, "Remove gpiochip\n"); | 608 | dev_info(&pdev->dev, "Remove gpiochip\n"); |
630 | if (gpiochip_remove(&plgpio->chip)) | 609 | gpiochip_remove(&plgpio->chip); |
631 | dev_err(&pdev->dev, "unable to remove gpiochip\n"); | ||
632 | unprepare_clk: | 610 | unprepare_clk: |
633 | if (!IS_ERR(plgpio->clk)) | 611 | if (!IS_ERR(plgpio->clk)) |
634 | clk_unprepare(plgpio->clk); | 612 | clk_unprepare(plgpio->clk); |
diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c index 58bf6867aa17..abdb05ac43dc 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.c +++ b/drivers/pinctrl/spear/pinctrl-spear.c | |||
@@ -268,18 +268,12 @@ static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, | |||
268 | return 0; | 268 | return 0; |
269 | } | 269 | } |
270 | 270 | ||
271 | static int spear_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function, | 271 | static int spear_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned function, |
272 | unsigned group) | 272 | unsigned group) |
273 | { | 273 | { |
274 | return spear_pinctrl_endisable(pctldev, function, group, true); | 274 | return spear_pinctrl_endisable(pctldev, function, group, true); |
275 | } | 275 | } |
276 | 276 | ||
277 | static void spear_pinctrl_disable(struct pinctrl_dev *pctldev, | ||
278 | unsigned function, unsigned group) | ||
279 | { | ||
280 | spear_pinctrl_endisable(pctldev, function, group, false); | ||
281 | } | ||
282 | |||
283 | /* gpio with pinmux */ | 277 | /* gpio with pinmux */ |
284 | static struct spear_gpio_pingroup *get_gpio_pingroup(struct spear_pmx *pmx, | 278 | static struct spear_gpio_pingroup *get_gpio_pingroup(struct spear_pmx *pmx, |
285 | unsigned pin) | 279 | unsigned pin) |
@@ -344,8 +338,7 @@ static const struct pinmux_ops spear_pinmux_ops = { | |||
344 | .get_functions_count = spear_pinctrl_get_funcs_count, | 338 | .get_functions_count = spear_pinctrl_get_funcs_count, |
345 | .get_function_name = spear_pinctrl_get_func_name, | 339 | .get_function_name = spear_pinctrl_get_func_name, |
346 | .get_function_groups = spear_pinctrl_get_func_groups, | 340 | .get_function_groups = spear_pinctrl_get_func_groups, |
347 | .enable = spear_pinctrl_enable, | 341 | .set_mux = spear_pinctrl_set_mux, |
348 | .disable = spear_pinctrl_disable, | ||
349 | .gpio_request_enable = gpio_request_enable, | 342 | .gpio_request_enable = gpio_request_enable, |
350 | .gpio_disable_free = gpio_disable_free, | 343 | .gpio_disable_free = gpio_disable_free, |
351 | }; | 344 | }; |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c index 1a8bbfec60ca..6d57d43ab640 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c | |||
@@ -2692,7 +2692,7 @@ static struct spear_pinctrl_machdata spear1310_machdata = { | |||
2692 | .modes_supported = false, | 2692 | .modes_supported = false, |
2693 | }; | 2693 | }; |
2694 | 2694 | ||
2695 | static struct of_device_id spear1310_pinctrl_of_match[] = { | 2695 | static const struct of_device_id spear1310_pinctrl_of_match[] = { |
2696 | { | 2696 | { |
2697 | .compatible = "st,spear1310-pinmux", | 2697 | .compatible = "st,spear1310-pinmux", |
2698 | }, | 2698 | }, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c index 873966e2b99f..d243e43e7f6d 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1340.c +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c | |||
@@ -2008,7 +2008,7 @@ static struct spear_pinctrl_machdata spear1340_machdata = { | |||
2008 | .modes_supported = false, | 2008 | .modes_supported = false, |
2009 | }; | 2009 | }; |
2010 | 2010 | ||
2011 | static struct of_device_id spear1340_pinctrl_of_match[] = { | 2011 | static const struct of_device_id spear1340_pinctrl_of_match[] = { |
2012 | { | 2012 | { |
2013 | .compatible = "st,spear1340-pinmux", | 2013 | .compatible = "st,spear1340-pinmux", |
2014 | }, | 2014 | }, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear300.c b/drivers/pinctrl/spear/pinctrl-spear300.c index 4777c0d0e730..9db83e9ee18c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear300.c +++ b/drivers/pinctrl/spear/pinctrl-spear300.c | |||
@@ -646,7 +646,7 @@ static struct spear_function *spear300_functions[] = { | |||
646 | &gpio1_function, | 646 | &gpio1_function, |
647 | }; | 647 | }; |
648 | 648 | ||
649 | static struct of_device_id spear300_pinctrl_of_match[] = { | 649 | static const struct of_device_id spear300_pinctrl_of_match[] = { |
650 | { | 650 | { |
651 | .compatible = "st,spear300-pinmux", | 651 | .compatible = "st,spear300-pinmux", |
652 | }, | 652 | }, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear310.c b/drivers/pinctrl/spear/pinctrl-spear310.c index ed1d3608f486..db775a414b7a 100644 --- a/drivers/pinctrl/spear/pinctrl-spear310.c +++ b/drivers/pinctrl/spear/pinctrl-spear310.c | |||
@@ -371,7 +371,7 @@ static struct spear_function *spear310_functions[] = { | |||
371 | &tdm_function, | 371 | &tdm_function, |
372 | }; | 372 | }; |
373 | 373 | ||
374 | static struct of_device_id spear310_pinctrl_of_match[] = { | 374 | static const struct of_device_id spear310_pinctrl_of_match[] = { |
375 | { | 375 | { |
376 | .compatible = "st,spear310-pinmux", | 376 | .compatible = "st,spear310-pinmux", |
377 | }, | 377 | }, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index b8e290a8c8c9..80fbd68e17bc 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c | |||
@@ -3410,7 +3410,7 @@ static struct spear_function *spear320_functions[] = { | |||
3410 | &i2c2_function, | 3410 | &i2c2_function, |
3411 | }; | 3411 | }; |
3412 | 3412 | ||
3413 | static struct of_device_id spear320_pinctrl_of_match[] = { | 3413 | static const struct of_device_id spear320_pinctrl_of_match[] = { |
3414 | { | 3414 | { |
3415 | .compatible = "st,spear320-pinmux", | 3415 | .compatible = "st,spear320-pinmux", |
3416 | }, | 3416 | }, |