diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-07-15 19:54:13 -0400 |
---|---|---|
committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-07-29 09:17:37 -0400 |
commit | 4e5ca4a1e65d6c9f7a26b8af26ec6cf1c516f31b (patch) | |
tree | 6c06b3229afa23ef1cd3ba43a6694dc121c59c4a /drivers/pinctrl/sh-pfc | |
parent | 082ab8ff33f250c519b364224263b44a86c71c2d (diff) |
sh-pfc: shx3: Remove unused input_pu range
The PFC SHX3 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.
If required, configuring pull-up resistors for the SHX3 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-shx3.c | 270 |
1 files changed, 124 insertions, 146 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c index 6594c8c48747..50d9c5d83b8d 100644 --- a/drivers/pinctrl/sh-pfc/pfc-shx3.c +++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c | |||
@@ -56,26 +56,6 @@ enum { | |||
56 | PH3_IN, PH2_IN, PH1_IN, PH0_IN, | 56 | PH3_IN, PH2_IN, PH1_IN, PH0_IN, |
57 | PINMUX_INPUT_END, | 57 | PINMUX_INPUT_END, |
58 | 58 | ||
59 | PINMUX_INPUT_PULLUP_BEGIN, | ||
60 | PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU, | ||
61 | PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU, | ||
62 | PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU, | ||
63 | PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU, | ||
64 | PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU, | ||
65 | PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU, | ||
66 | PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU, | ||
67 | PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU, | ||
68 | PE7_IN_PU, PE6_IN_PU, PE5_IN_PU, PE4_IN_PU, | ||
69 | PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU, | ||
70 | PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU, | ||
71 | PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU, | ||
72 | PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU, | ||
73 | PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU, | ||
74 | |||
75 | PH5_IN_PU, PH4_IN_PU, | ||
76 | PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU, | ||
77 | PINMUX_INPUT_PULLUP_END, | ||
78 | |||
79 | PINMUX_OUTPUT_BEGIN, | 59 | PINMUX_OUTPUT_BEGIN, |
80 | PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT, | 60 | PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT, |
81 | PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT, | 61 | PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT, |
@@ -150,82 +130,82 @@ enum { | |||
150 | static const pinmux_enum_t shx3_pinmux_data[] = { | 130 | static const pinmux_enum_t shx3_pinmux_data[] = { |
151 | 131 | ||
152 | /* PA GPIO */ | 132 | /* PA GPIO */ |
153 | PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), | 133 | PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT), |
154 | PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU), | 134 | PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT), |
155 | PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU), | 135 | PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT), |
156 | PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU), | 136 | PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT), |
157 | PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU), | 137 | PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT), |
158 | PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU), | 138 | PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT), |
159 | PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU), | 139 | PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT), |
160 | PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU), | 140 | PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT), |
161 | 141 | ||
162 | /* PB GPIO */ | 142 | /* PB GPIO */ |
163 | PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU), | 143 | PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT), |
164 | PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU), | 144 | PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT), |
165 | PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU), | 145 | PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT), |
166 | PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU), | 146 | PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT), |
167 | PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU), | 147 | PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT), |
168 | PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU), | 148 | PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT), |
169 | PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU), | 149 | PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT), |
170 | PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU), | 150 | PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT), |
171 | 151 | ||
172 | /* PC GPIO */ | 152 | /* PC GPIO */ |
173 | PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU), | 153 | PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT), |
174 | PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU), | 154 | PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT), |
175 | PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU), | 155 | PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT), |
176 | PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU), | 156 | PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT), |
177 | PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU), | 157 | PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT), |
178 | PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU), | 158 | PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT), |
179 | PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU), | 159 | PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT), |
180 | PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU), | 160 | PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT), |
181 | 161 | ||
182 | /* PD GPIO */ | 162 | /* PD GPIO */ |
183 | PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU), | 163 | PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT), |
184 | PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU), | 164 | PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT), |
185 | PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU), | 165 | PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT), |
186 | PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU), | 166 | PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT), |
187 | PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU), | 167 | PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT), |
188 | PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU), | 168 | PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT), |
189 | PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU), | 169 | PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT), |
190 | PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU), | 170 | PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT), |
191 | 171 | ||
192 | /* PE GPIO */ | 172 | /* PE GPIO */ |
193 | PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU), | 173 | PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT), |
194 | PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU), | 174 | PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT), |
195 | PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU), | 175 | PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT), |
196 | PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU), | 176 | PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT), |
197 | PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU), | 177 | PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT), |
198 | PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU), | 178 | PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT), |
199 | PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU), | 179 | PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT), |
200 | PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU), | 180 | PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT), |
201 | 181 | ||
202 | /* PF GPIO */ | 182 | /* PF GPIO */ |
203 | PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU), | 183 | PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT), |
204 | PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU), | 184 | PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT), |
205 | PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU), | 185 | PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT), |
206 | PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU), | 186 | PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT), |
207 | PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU), | 187 | PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT), |
208 | PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU), | 188 | PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT), |
209 | PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU), | 189 | PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT), |
210 | PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU), | 190 | PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT), |
211 | 191 | ||
212 | /* PG GPIO */ | 192 | /* PG GPIO */ |
213 | PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU), | 193 | PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT), |
214 | PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU), | 194 | PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT), |
215 | PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU), | 195 | PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT), |
216 | PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU), | 196 | PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT), |
217 | PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU), | 197 | PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT), |
218 | PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU), | 198 | PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT), |
219 | PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU), | 199 | PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT), |
220 | PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU), | 200 | PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT), |
221 | 201 | ||
222 | /* PH GPIO */ | 202 | /* PH GPIO */ |
223 | PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU), | 203 | PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT), |
224 | PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU), | 204 | PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT), |
225 | PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU), | 205 | PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT), |
226 | PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU), | 206 | PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT), |
227 | PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU), | 207 | PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT), |
228 | PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU), | 208 | PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT), |
229 | 209 | ||
230 | /* PA FN */ | 210 | /* PA FN */ |
231 | PINMUX_DATA(D31_MARK, PA7_FN), | 211 | PINMUX_DATA(D31_MARK, PA7_FN), |
@@ -456,76 +436,76 @@ static const struct pinmux_func shx3_pinmux_func_gpios[] = { | |||
456 | 436 | ||
457 | static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { | 437 | static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { |
458 | { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) { | 438 | { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) { |
459 | PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, | 439 | PA7_FN, PA7_OUT, PA7_IN, 0, |
460 | PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, | 440 | PA6_FN, PA6_OUT, PA6_IN, 0, |
461 | PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU, | 441 | PA5_FN, PA5_OUT, PA5_IN, 0, |
462 | PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU, | 442 | PA4_FN, PA4_OUT, PA4_IN, 0, |
463 | PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU, | 443 | PA3_FN, PA3_OUT, PA3_IN, 0, |
464 | PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU, | 444 | PA2_FN, PA2_OUT, PA2_IN, 0, |
465 | PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU, | 445 | PA1_FN, PA1_OUT, PA1_IN, 0, |
466 | PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU, | 446 | PA0_FN, PA0_OUT, PA0_IN, 0, |
467 | PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU, | 447 | PB7_FN, PB7_OUT, PB7_IN, 0, |
468 | PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU, | 448 | PB6_FN, PB6_OUT, PB6_IN, 0, |
469 | PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU, | 449 | PB5_FN, PB5_OUT, PB5_IN, 0, |
470 | PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU, | 450 | PB4_FN, PB4_OUT, PB4_IN, 0, |
471 | PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU, | 451 | PB3_FN, PB3_OUT, PB3_IN, 0, |
472 | PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU, | 452 | PB2_FN, PB2_OUT, PB2_IN, 0, |
473 | PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU, | 453 | PB1_FN, PB1_OUT, PB1_IN, 0, |
474 | PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU, }, | 454 | PB0_FN, PB0_OUT, PB0_IN, 0, }, |
475 | }, | 455 | }, |
476 | { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2) { | 456 | { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2) { |
477 | PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU, | 457 | PC7_FN, PC7_OUT, PC7_IN, 0, |
478 | PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU, | 458 | PC6_FN, PC6_OUT, PC6_IN, 0, |
479 | PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU, | 459 | PC5_FN, PC5_OUT, PC5_IN, 0, |
480 | PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU, | 460 | PC4_FN, PC4_OUT, PC4_IN, 0, |
481 | PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU, | 461 | PC3_FN, PC3_OUT, PC3_IN, 0, |
482 | PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU, | 462 | PC2_FN, PC2_OUT, PC2_IN, 0, |
483 | PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU, | 463 | PC1_FN, PC1_OUT, PC1_IN, 0, |
484 | PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU, | 464 | PC0_FN, PC0_OUT, PC0_IN, 0, |
485 | PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU, | 465 | PD7_FN, PD7_OUT, PD7_IN, 0, |
486 | PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU, | 466 | PD6_FN, PD6_OUT, PD6_IN, 0, |
487 | PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU, | 467 | PD5_FN, PD5_OUT, PD5_IN, 0, |
488 | PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU, | 468 | PD4_FN, PD4_OUT, PD4_IN, 0, |
489 | PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU, | 469 | PD3_FN, PD3_OUT, PD3_IN, 0, |
490 | PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU, | 470 | PD2_FN, PD2_OUT, PD2_IN, 0, |
491 | PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU, | 471 | PD1_FN, PD1_OUT, PD1_IN, 0, |
492 | PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU, }, | 472 | PD0_FN, PD0_OUT, PD0_IN, 0, }, |
493 | }, | 473 | }, |
494 | { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2) { | 474 | { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2) { |
495 | PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU, | 475 | PE7_FN, PE7_OUT, PE7_IN, 0, |
496 | PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU, | 476 | PE6_FN, PE6_OUT, PE6_IN, 0, |
497 | PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU, | 477 | PE5_FN, PE5_OUT, PE5_IN, 0, |
498 | PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU, | 478 | PE4_FN, PE4_OUT, PE4_IN, 0, |
499 | PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU, | 479 | PE3_FN, PE3_OUT, PE3_IN, 0, |
500 | PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU, | 480 | PE2_FN, PE2_OUT, PE2_IN, 0, |
501 | PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU, | 481 | PE1_FN, PE1_OUT, PE1_IN, 0, |
502 | PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU, | 482 | PE0_FN, PE0_OUT, PE0_IN, 0, |
503 | PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU, | 483 | PF7_FN, PF7_OUT, PF7_IN, 0, |
504 | PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU, | 484 | PF6_FN, PF6_OUT, PF6_IN, 0, |
505 | PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU, | 485 | PF5_FN, PF5_OUT, PF5_IN, 0, |
506 | PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU, | 486 | PF4_FN, PF4_OUT, PF4_IN, 0, |
507 | PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU, | 487 | PF3_FN, PF3_OUT, PF3_IN, 0, |
508 | PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU, | 488 | PF2_FN, PF2_OUT, PF2_IN, 0, |
509 | PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU, | 489 | PF1_FN, PF1_OUT, PF1_IN, 0, |
510 | PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU, }, | 490 | PF0_FN, PF0_OUT, PF0_IN, 0, }, |
511 | }, | 491 | }, |
512 | { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2) { | 492 | { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2) { |
513 | PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU, | 493 | PG7_FN, PG7_OUT, PG7_IN, 0, |
514 | PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU, | 494 | PG6_FN, PG6_OUT, PG6_IN, 0, |
515 | PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU, | 495 | PG5_FN, PG5_OUT, PG5_IN, 0, |
516 | PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU, | 496 | PG4_FN, PG4_OUT, PG4_IN, 0, |
517 | PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU, | 497 | PG3_FN, PG3_OUT, PG3_IN, 0, |
518 | PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU, | 498 | PG2_FN, PG2_OUT, PG2_IN, 0, |
519 | PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU, | 499 | PG1_FN, PG1_OUT, PG1_IN, 0, |
520 | PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU, | 500 | PG0_FN, PG0_OUT, PG0_IN, 0, |
521 | 0, 0, 0, 0, | 501 | 0, 0, 0, 0, |
522 | 0, 0, 0, 0, | 502 | 0, 0, 0, 0, |
523 | PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU, | 503 | PH5_FN, PH5_OUT, PH5_IN, 0, |
524 | PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU, | 504 | PH4_FN, PH4_OUT, PH4_IN, 0, |
525 | PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU, | 505 | PH3_FN, PH3_OUT, PH3_IN, 0, |
526 | PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU, | 506 | PH2_FN, PH2_OUT, PH2_IN, 0, |
527 | PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU, | 507 | PH1_FN, PH1_OUT, PH1_IN, 0, |
528 | PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU, }, | 508 | PH0_FN, PH0_OUT, PH0_IN, 0, }, |
529 | }, | 509 | }, |
530 | { }, | 510 | { }, |
531 | }; | 511 | }; |
@@ -569,8 +549,6 @@ static const struct pinmux_data_reg shx3_pinmux_data_regs[] = { | |||
569 | const struct sh_pfc_soc_info shx3_pinmux_info = { | 549 | const struct sh_pfc_soc_info shx3_pinmux_info = { |
570 | .name = "shx3_pfc", | 550 | .name = "shx3_pfc", |
571 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | 551 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, |
572 | .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, | ||
573 | PINMUX_INPUT_PULLUP_END }, | ||
574 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | 552 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, |
575 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | 553 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
576 | .pins = shx3_pinmux_pins, | 554 | .pins = shx3_pinmux_pins, |