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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-03-13 13:32:00 -0400
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-03-15 08:34:14 -0400
commit19ac5557e74fb4f9d7364235ff805f96c2c4f562 (patch)
tree729c61797a5e3605440a578351f5aa1d334f5cda /drivers/pinctrl/sh-pfc
parent0b1e75ccc18c34a0f4c37e501aa4cf17a3ae37f7 (diff)
sh-pfc: sh73a0: Remove pull-up function GPIOS
All sh73a0 platforms now use the pinconf API to control pull-ups, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh73a0.c465
1 files changed, 23 insertions, 442 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 1a638f2c7ec2..1249a3ffdb31 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -66,14 +66,6 @@ enum {
66 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */ 66 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
67 PINMUX_INPUT_END, 67 PINMUX_INPUT_END,
68 68
69 PINMUX_INPUT_PULLUP_BEGIN,
70 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
71 PINMUX_INPUT_PULLUP_END,
72
73 PINMUX_INPUT_PULLDOWN_BEGIN,
74 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
75 PINMUX_INPUT_PULLDOWN_END,
76
77 PINMUX_OUTPUT_BEGIN, 69 PINMUX_OUTPUT_BEGIN,
78 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */ 70 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
79 PINMUX_OUTPUT_END, 71 PINMUX_OUTPUT_END,
@@ -468,328 +460,15 @@ enum {
468 EDBGREQ_PD_MARK, 460 EDBGREQ_PD_MARK,
469 EDBGREQ_PU_MARK, 461 EDBGREQ_PU_MARK,
470 462
471 /* Functions with pull-ups */
472 KEYIN0_PU_MARK,
473 KEYIN1_PU_MARK,
474 KEYIN2_PU_MARK,
475 KEYIN3_PU_MARK,
476 KEYIN4_PU_MARK,
477 KEYIN5_PU_MARK,
478 KEYIN6_PU_MARK,
479 KEYIN7_PU_MARK,
480 SDHICD0_PU_MARK,
481 SDHID0_0_PU_MARK,
482 SDHID0_1_PU_MARK,
483 SDHID0_2_PU_MARK,
484 SDHID0_3_PU_MARK,
485 SDHICMD0_PU_MARK,
486 SDHIWP0_PU_MARK,
487 SDHID1_0_PU_MARK,
488 SDHID1_1_PU_MARK,
489 SDHID1_2_PU_MARK,
490 SDHID1_3_PU_MARK,
491 SDHICMD1_PU_MARK,
492 SDHID2_0_PU_MARK,
493 SDHID2_1_PU_MARK,
494 SDHID2_2_PU_MARK,
495 SDHID2_3_PU_MARK,
496 SDHICMD2_PU_MARK,
497 MMCCMD0_PU_MARK,
498 MMCCMD1_PU_MARK,
499 MMCD0_0_PU_MARK,
500 MMCD0_1_PU_MARK,
501 MMCD0_2_PU_MARK,
502 MMCD0_3_PU_MARK,
503 MMCD0_4_PU_MARK,
504 MMCD0_5_PU_MARK,
505 MMCD0_6_PU_MARK,
506 MMCD0_7_PU_MARK,
507 FSIBISLD_PU_MARK,
508 FSIACK_PU_MARK,
509 FSIAILR_PU_MARK,
510 FSIAIBT_PU_MARK,
511 FSIAISLD_PU_MARK,
512
513 PINMUX_MARK_END, 463 PINMUX_MARK_END,
514}; 464};
515 465
466#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx)
467#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_PORT_DATA, , unused)
468
516static const pinmux_enum_t pinmux_data[] = { 469static const pinmux_enum_t pinmux_data[] = {
517 /* specify valid pin states for each pin in GPIO mode */ 470 /* specify valid pin states for each pin in GPIO mode */
518 471 PINMUX_DATA_GP_ALL(),
519 /* Table 25-1 (I/O and Pull U/D) */
520 PORT_DATA_I_PD(0),
521 PORT_DATA_I_PU(1),
522 PORT_DATA_I_PU(2),
523 PORT_DATA_I_PU(3),
524 PORT_DATA_I_PU(4),
525 PORT_DATA_I_PU(5),
526 PORT_DATA_I_PU(6),
527 PORT_DATA_I_PU(7),
528 PORT_DATA_I_PU(8),
529 PORT_DATA_I_PD(9),
530 PORT_DATA_I_PD(10),
531 PORT_DATA_I_PU_PD(11),
532 PORT_DATA_IO_PU_PD(12),
533 PORT_DATA_IO_PU_PD(13),
534 PORT_DATA_IO_PU_PD(14),
535 PORT_DATA_IO_PU_PD(15),
536 PORT_DATA_IO_PD(16),
537 PORT_DATA_IO_PD(17),
538 PORT_DATA_IO_PU(18),
539 PORT_DATA_IO_PU(19),
540 PORT_DATA_O(20),
541 PORT_DATA_O(21),
542 PORT_DATA_O(22),
543 PORT_DATA_O(23),
544 PORT_DATA_O(24),
545 PORT_DATA_I_PD(25),
546 PORT_DATA_I_PD(26),
547 PORT_DATA_IO_PU(27),
548 PORT_DATA_IO_PU(28),
549 PORT_DATA_IO_PD(29),
550 PORT_DATA_IO_PD(30),
551 PORT_DATA_IO_PU(31),
552 PORT_DATA_IO_PD(32),
553 PORT_DATA_I_PU_PD(33),
554 PORT_DATA_IO_PD(34),
555 PORT_DATA_I_PU_PD(35),
556 PORT_DATA_IO_PD(36),
557 PORT_DATA_IO(37),
558 PORT_DATA_O(38),
559 PORT_DATA_I_PU(39),
560 PORT_DATA_I_PU_PD(40),
561 PORT_DATA_O(41),
562 PORT_DATA_IO_PD(42),
563 PORT_DATA_IO_PU_PD(43),
564 PORT_DATA_IO_PU_PD(44),
565 PORT_DATA_IO_PD(45),
566 PORT_DATA_IO_PD(46),
567 PORT_DATA_IO_PD(47),
568 PORT_DATA_I_PD(48),
569 PORT_DATA_IO_PU_PD(49),
570 PORT_DATA_IO_PD(50),
571
572 PORT_DATA_IO_PD(51),
573 PORT_DATA_O(52),
574 PORT_DATA_IO_PU_PD(53),
575 PORT_DATA_IO_PU_PD(54),
576 PORT_DATA_IO_PD(55),
577 PORT_DATA_I_PU_PD(56),
578 PORT_DATA_IO(57),
579 PORT_DATA_IO(58),
580 PORT_DATA_IO(59),
581 PORT_DATA_IO(60),
582 PORT_DATA_IO(61),
583 PORT_DATA_IO_PD(62),
584 PORT_DATA_IO_PD(63),
585 PORT_DATA_IO_PU_PD(64),
586 PORT_DATA_IO_PD(65),
587 PORT_DATA_IO_PU_PD(66),
588 PORT_DATA_IO_PU_PD(67),
589 PORT_DATA_IO_PU_PD(68),
590 PORT_DATA_IO_PU_PD(69),
591 PORT_DATA_IO_PU_PD(70),
592 PORT_DATA_IO_PU_PD(71),
593 PORT_DATA_IO_PU_PD(72),
594 PORT_DATA_I_PU_PD(73),
595 PORT_DATA_IO_PU(74),
596 PORT_DATA_IO_PU(75),
597 PORT_DATA_IO_PU(76),
598 PORT_DATA_IO_PU(77),
599 PORT_DATA_IO_PU(78),
600 PORT_DATA_IO_PU(79),
601 PORT_DATA_IO_PU(80),
602 PORT_DATA_IO_PU(81),
603 PORT_DATA_IO_PU(82),
604 PORT_DATA_IO_PU(83),
605 PORT_DATA_IO_PU(84),
606 PORT_DATA_IO_PU(85),
607 PORT_DATA_IO_PU(86),
608 PORT_DATA_IO_PU(87),
609 PORT_DATA_IO_PU(88),
610 PORT_DATA_IO_PU(89),
611 PORT_DATA_O(90),
612 PORT_DATA_IO_PU(91),
613 PORT_DATA_O(92),
614 PORT_DATA_IO_PU(93),
615 PORT_DATA_O(94),
616 PORT_DATA_I_PU_PD(95),
617 PORT_DATA_IO(96),
618 PORT_DATA_IO(97),
619 PORT_DATA_IO(98),
620 PORT_DATA_I_PU(99),
621 PORT_DATA_O(100),
622 PORT_DATA_O(101),
623 PORT_DATA_I_PU(102),
624 PORT_DATA_IO_PD(103),
625 PORT_DATA_I_PU_PD(104),
626 PORT_DATA_I_PD(105),
627 PORT_DATA_I_PD(106),
628 PORT_DATA_I_PU_PD(107),
629 PORT_DATA_I_PU_PD(108),
630 PORT_DATA_IO_PD(109),
631 PORT_DATA_IO_PD(110),
632 PORT_DATA_IO_PU_PD(111),
633 PORT_DATA_IO_PU_PD(112),
634 PORT_DATA_IO_PU_PD(113),
635 PORT_DATA_IO_PD(114),
636 PORT_DATA_IO_PU(115),
637 PORT_DATA_IO_PU(116),
638 PORT_DATA_IO_PU_PD(117),
639 PORT_DATA_IO_PU_PD(118),
640 PORT_DATA_IO_PD(128),
641
642 PORT_DATA_IO_PD(129),
643 PORT_DATA_IO_PU_PD(130),
644 PORT_DATA_IO_PD(131),
645 PORT_DATA_IO_PD(132),
646 PORT_DATA_IO_PD(133),
647 PORT_DATA_IO_PU_PD(134),
648 PORT_DATA_IO_PU_PD(135),
649 PORT_DATA_IO_PU_PD(136),
650 PORT_DATA_IO_PU_PD(137),
651 PORT_DATA_IO_PD(138),
652 PORT_DATA_IO_PD(139),
653 PORT_DATA_IO_PD(140),
654 PORT_DATA_IO_PD(141),
655 PORT_DATA_IO_PD(142),
656 PORT_DATA_IO_PD(143),
657 PORT_DATA_IO_PU_PD(144),
658 PORT_DATA_IO_PD(145),
659 PORT_DATA_IO_PU_PD(146),
660 PORT_DATA_IO_PU_PD(147),
661 PORT_DATA_IO_PU_PD(148),
662 PORT_DATA_IO_PU_PD(149),
663 PORT_DATA_I_PU_PD(150),
664 PORT_DATA_IO_PU_PD(151),
665 PORT_DATA_IO_PU_PD(152),
666 PORT_DATA_IO_PD(153),
667 PORT_DATA_IO_PD(154),
668 PORT_DATA_I_PU_PD(155),
669 PORT_DATA_IO_PU_PD(156),
670 PORT_DATA_I_PD(157),
671 PORT_DATA_IO_PD(158),
672 PORT_DATA_IO_PU_PD(159),
673 PORT_DATA_IO_PU_PD(160),
674 PORT_DATA_I_PU_PD(161),
675 PORT_DATA_I_PU_PD(162),
676 PORT_DATA_IO_PU_PD(163),
677 PORT_DATA_I_PU_PD(164),
678 PORT_DATA_IO_PD(192),
679 PORT_DATA_IO_PU_PD(193),
680 PORT_DATA_IO_PD(194),
681 PORT_DATA_IO_PU_PD(195),
682 PORT_DATA_IO_PD(196),
683 PORT_DATA_IO_PD(197),
684 PORT_DATA_IO_PD(198),
685 PORT_DATA_IO_PD(199),
686 PORT_DATA_IO_PU_PD(200),
687 PORT_DATA_IO_PU_PD(201),
688 PORT_DATA_IO_PU_PD(202),
689 PORT_DATA_IO_PU_PD(203),
690 PORT_DATA_IO_PU_PD(204),
691 PORT_DATA_IO_PU_PD(205),
692 PORT_DATA_IO_PU_PD(206),
693 PORT_DATA_IO_PD(207),
694 PORT_DATA_IO_PD(208),
695 PORT_DATA_IO_PD(209),
696 PORT_DATA_IO_PD(210),
697 PORT_DATA_IO_PD(211),
698 PORT_DATA_IO_PD(212),
699 PORT_DATA_IO_PD(213),
700 PORT_DATA_IO_PU_PD(214),
701 PORT_DATA_IO_PU_PD(215),
702 PORT_DATA_IO_PD(216),
703 PORT_DATA_IO_PD(217),
704 PORT_DATA_O(218),
705 PORT_DATA_IO_PD(219),
706 PORT_DATA_IO_PD(220),
707 PORT_DATA_IO_PU_PD(221),
708 PORT_DATA_IO_PU_PD(222),
709 PORT_DATA_I_PU_PD(223),
710 PORT_DATA_I_PU_PD(224),
711
712 PORT_DATA_IO_PU_PD(225),
713 PORT_DATA_O(226),
714 PORT_DATA_IO_PU_PD(227),
715 PORT_DATA_I_PU_PD(228),
716 PORT_DATA_I_PD(229),
717 PORT_DATA_IO(230),
718 PORT_DATA_IO_PU_PD(231),
719 PORT_DATA_IO_PU_PD(232),
720 PORT_DATA_I_PU_PD(233),
721 PORT_DATA_IO_PU_PD(234),
722 PORT_DATA_IO_PU_PD(235),
723 PORT_DATA_IO_PU_PD(236),
724 PORT_DATA_IO_PD(237),
725 PORT_DATA_IO_PU_PD(238),
726 PORT_DATA_IO_PU_PD(239),
727 PORT_DATA_IO_PU_PD(240),
728 PORT_DATA_O(241),
729 PORT_DATA_I_PD(242),
730 PORT_DATA_IO_PU_PD(243),
731 PORT_DATA_IO_PU_PD(244),
732 PORT_DATA_IO_PU_PD(245),
733 PORT_DATA_IO_PU_PD(246),
734 PORT_DATA_IO_PU_PD(247),
735 PORT_DATA_IO_PU_PD(248),
736 PORT_DATA_IO_PU_PD(249),
737 PORT_DATA_IO_PU_PD(250),
738 PORT_DATA_IO_PU_PD(251),
739 PORT_DATA_IO_PU_PD(252),
740 PORT_DATA_IO_PU_PD(253),
741 PORT_DATA_IO_PU_PD(254),
742 PORT_DATA_IO_PU_PD(255),
743 PORT_DATA_IO_PU_PD(256),
744 PORT_DATA_IO_PU_PD(257),
745 PORT_DATA_IO_PU_PD(258),
746 PORT_DATA_IO_PU_PD(259),
747 PORT_DATA_IO_PU_PD(260),
748 PORT_DATA_IO_PU_PD(261),
749 PORT_DATA_IO_PU_PD(262),
750 PORT_DATA_IO_PU_PD(263),
751 PORT_DATA_IO_PU_PD(264),
752 PORT_DATA_IO_PU_PD(265),
753 PORT_DATA_IO_PU_PD(266),
754 PORT_DATA_IO_PU_PD(267),
755 PORT_DATA_IO_PU_PD(268),
756 PORT_DATA_IO_PU_PD(269),
757 PORT_DATA_IO_PU_PD(270),
758 PORT_DATA_IO_PU_PD(271),
759 PORT_DATA_IO_PU_PD(272),
760 PORT_DATA_IO_PU_PD(273),
761 PORT_DATA_IO_PU_PD(274),
762 PORT_DATA_IO_PU_PD(275),
763 PORT_DATA_IO_PU_PD(276),
764 PORT_DATA_IO_PU_PD(277),
765 PORT_DATA_IO_PU_PD(278),
766 PORT_DATA_IO_PU_PD(279),
767 PORT_DATA_IO_PU_PD(280),
768 PORT_DATA_O(281),
769 PORT_DATA_O(282),
770 PORT_DATA_I_PU(288),
771 PORT_DATA_IO_PU_PD(289),
772 PORT_DATA_IO_PU_PD(290),
773 PORT_DATA_IO_PU_PD(291),
774 PORT_DATA_IO_PU_PD(292),
775 PORT_DATA_IO_PU_PD(293),
776 PORT_DATA_IO_PU_PD(294),
777 PORT_DATA_IO_PU_PD(295),
778 PORT_DATA_IO_PU_PD(296),
779 PORT_DATA_IO_PU_PD(297),
780 PORT_DATA_IO_PU_PD(298),
781
782 PORT_DATA_IO_PU_PD(299),
783 PORT_DATA_IO_PU_PD(300),
784 PORT_DATA_IO_PU_PD(301),
785 PORT_DATA_IO_PU_PD(302),
786 PORT_DATA_IO_PU_PD(303),
787 PORT_DATA_IO_PU_PD(304),
788 PORT_DATA_IO_PU_PD(305),
789 PORT_DATA_O(306),
790 PORT_DATA_O(307),
791 PORT_DATA_I_PU(308),
792 PORT_DATA_O(309),
793 472
794 /* Table 25-1 (Function 0-7) */ 473 /* Table 25-1 (Function 0-7) */
795 PINMUX_DATA(VBUS_0_MARK, PORT0_FN1), 474 PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
@@ -1358,28 +1037,19 @@ static const pinmux_enum_t pinmux_data[] = {
1358 PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), 1037 PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3),
1359 PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), 1038 PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1),
1360 PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), 1039 PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0),
1361 PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU, 1040 PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, MSEL4CR_MSEL15_0),
1362 MSEL4CR_MSEL15_0), 1041 PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, MSEL4CR_MSEL15_0),
1363 PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU, 1042 PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, MSEL4CR_MSEL15_0),
1364 MSEL4CR_MSEL15_0), 1043 PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, MSEL4CR_MSEL15_0),
1365 PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU, 1044 PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, MSEL4CR_MSEL15_0),
1366 MSEL4CR_MSEL15_0),
1367 PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU,
1368 MSEL4CR_MSEL15_0),
1369 PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU,
1370 MSEL4CR_MSEL15_0), \
1371 PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), 1045 PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3),
1372 PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU, 1046 PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, MSEL4CR_MSEL15_0),
1373 MSEL4CR_MSEL15_0), \
1374 PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), 1047 PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3),
1375 PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU, 1048 PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, MSEL4CR_MSEL15_0),
1376 MSEL4CR_MSEL15_0), \
1377 PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), 1049 PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3),
1378 PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU, 1050 PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, MSEL4CR_MSEL15_0),
1379 MSEL4CR_MSEL15_0), \
1380 PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), 1051 PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3),
1381 PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU, 1052 PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, MSEL4CR_MSEL15_0),
1382 MSEL4CR_MSEL15_0),
1383 PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ 1053 PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \
1384 PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), 1054 PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2),
1385 PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), 1055 PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1),
@@ -1485,62 +1155,6 @@ static const pinmux_enum_t pinmux_data[] = {
1485 PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1), 1155 PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1),
1486 PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0), 1156 PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0),
1487 PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1), 1157 PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1),
1488
1489 /* Functions with pull-ups */
1490 PINMUX_DATA(KEYIN0_PU_MARK, PORT66_FN2, PORT66_IN_PU),
1491 PINMUX_DATA(KEYIN1_PU_MARK, PORT67_FN2, PORT67_IN_PU),
1492 PINMUX_DATA(KEYIN2_PU_MARK, PORT68_FN2, PORT68_IN_PU),
1493 PINMUX_DATA(KEYIN3_PU_MARK, PORT69_FN2, PORT69_IN_PU),
1494 PINMUX_DATA(KEYIN4_PU_MARK, PORT70_FN2, PORT70_IN_PU),
1495 PINMUX_DATA(KEYIN5_PU_MARK, PORT71_FN2, PORT71_IN_PU),
1496 PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU),
1497 PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU),
1498
1499 PINMUX_DATA(SDHICD0_PU_MARK, PORT251_FN1, PORT251_IN_PU),
1500 PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU),
1501 PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU),
1502 PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU),
1503 PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU),
1504 PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU),
1505 PINMUX_DATA(SDHIWP0_PU_MARK, PORT257_FN1, PORT257_IN_PU),
1506 PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU),
1507 PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU),
1508 PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU),
1509 PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU),
1510 PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU),
1511 PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU),
1512 PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU),
1513 PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU),
1514 PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU),
1515 PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU),
1516
1517 PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU,
1518 MSEL4CR_MSEL15_0),
1519 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
1520 MSEL4CR_MSEL15_1),
1521
1522 PINMUX_DATA(MMCD0_0_PU_MARK,
1523 PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
1524 PINMUX_DATA(MMCD0_1_PU_MARK,
1525 PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
1526 PINMUX_DATA(MMCD0_2_PU_MARK,
1527 PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
1528 PINMUX_DATA(MMCD0_3_PU_MARK,
1529 PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
1530 PINMUX_DATA(MMCD0_4_PU_MARK,
1531 PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
1532 PINMUX_DATA(MMCD0_5_PU_MARK,
1533 PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
1534 PINMUX_DATA(MMCD0_6_PU_MARK,
1535 PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
1536 PINMUX_DATA(MMCD0_7_PU_MARK,
1537 PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
1538
1539 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
1540 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
1541 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
1542 PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU),
1543 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
1544}; 1158};
1545 1159
1546#define SH73A0_PIN(pin, cfgs) \ 1160#define SH73A0_PIN(pin, cfgs) \
@@ -3775,49 +3389,18 @@ static const struct pinmux_func pinmux_func_gpios[] = {
3775 GPIO_FN(RESETA_N_PU_OFF), 3389 GPIO_FN(RESETA_N_PU_OFF),
3776 GPIO_FN(EDBGREQ_PD), 3390 GPIO_FN(EDBGREQ_PD),
3777 GPIO_FN(EDBGREQ_PU), 3391 GPIO_FN(EDBGREQ_PU),
3778
3779 /* Functions with pull-ups */
3780 GPIO_FN(KEYIN0_PU),
3781 GPIO_FN(KEYIN1_PU),
3782 GPIO_FN(KEYIN2_PU),
3783 GPIO_FN(KEYIN3_PU),
3784 GPIO_FN(KEYIN4_PU),
3785 GPIO_FN(KEYIN5_PU),
3786 GPIO_FN(KEYIN6_PU),
3787 GPIO_FN(KEYIN7_PU),
3788 GPIO_FN(SDHICD0_PU),
3789 GPIO_FN(SDHID0_0_PU),
3790 GPIO_FN(SDHID0_1_PU),
3791 GPIO_FN(SDHID0_2_PU),
3792 GPIO_FN(SDHID0_3_PU),
3793 GPIO_FN(SDHICMD0_PU),
3794 GPIO_FN(SDHIWP0_PU),
3795 GPIO_FN(SDHID1_0_PU),
3796 GPIO_FN(SDHID1_1_PU),
3797 GPIO_FN(SDHID1_2_PU),
3798 GPIO_FN(SDHID1_3_PU),
3799 GPIO_FN(SDHICMD1_PU),
3800 GPIO_FN(SDHID2_0_PU),
3801 GPIO_FN(SDHID2_1_PU),
3802 GPIO_FN(SDHID2_2_PU),
3803 GPIO_FN(SDHID2_3_PU),
3804 GPIO_FN(SDHICMD2_PU),
3805 GPIO_FN(MMCCMD0_PU),
3806 GPIO_FN(MMCCMD1_PU),
3807 GPIO_FN(MMCD0_0_PU),
3808 GPIO_FN(MMCD0_1_PU),
3809 GPIO_FN(MMCD0_2_PU),
3810 GPIO_FN(MMCD0_3_PU),
3811 GPIO_FN(MMCD0_4_PU),
3812 GPIO_FN(MMCD0_5_PU),
3813 GPIO_FN(MMCD0_6_PU),
3814 GPIO_FN(MMCD0_7_PU),
3815 GPIO_FN(FSIACK_PU),
3816 GPIO_FN(FSIAILR_PU),
3817 GPIO_FN(FSIAIBT_PU),
3818 GPIO_FN(FSIAISLD_PU),
3819}; 3392};
3820 3393
3394#undef PORTCR
3395#define PORTCR(nr, reg) \
3396 { \
3397 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
3398 _PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT), \
3399 PORT##nr##_FN0, PORT##nr##_FN1, \
3400 PORT##nr##_FN2, PORT##nr##_FN3, \
3401 PORT##nr##_FN4, PORT##nr##_FN5, \
3402 PORT##nr##_FN6, PORT##nr##_FN7 } \
3403 }
3821static const struct pinmux_cfg_reg pinmux_config_regs[] = { 3404static const struct pinmux_cfg_reg pinmux_config_regs[] = {
3822 PORTCR(0, 0xe6050000), /* PORT0CR */ 3405 PORTCR(0, 0xe6050000), /* PORT0CR */
3823 PORTCR(1, 0xe6050001), /* PORT1CR */ 3406 PORTCR(1, 0xe6050001), /* PORT1CR */
@@ -4425,8 +4008,6 @@ const struct sh_pfc_soc_info sh73a0_pinmux_info = {
4425 .ops = &sh73a0_pinmux_ops, 4008 .ops = &sh73a0_pinmux_ops,
4426 4009
4427 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, 4010 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
4428 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
4429 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
4430 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, 4011 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
4431 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, 4012 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
4432 4013
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-03 12:13:12 -0400