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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-08-07 08:02:22 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-08-14 16:49:22 -0400
commitf06812095e97af956c9fe8e0f82a5f6d5a26e5d2 (patch)
tree2534752ed5292e248647f9868a994dd250ea2f39 /drivers/pinctrl/sh-pfc
parent1c8e794432c2ee752599bf114f3e8bd683674e3d (diff)
sh-pfc: r8a7790: Rename DU1_DOTCLKIN to DU_DOTCLKIN1
Name the DU clock input 1 consistently with clock inputs 0 and 2. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 763c031e818a..da3aaeb51f0f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -237,7 +237,7 @@ enum {
237 FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C, 237 FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
238 FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C, 238 FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
239 FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, 239 FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
240 FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN, 240 FN_PCMWE_N, FN_IECLK_C, FN_DU_DOTCLKIN1,
241 FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK, 241 FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
242 FN_ATACS00_N, FN_AVB_RXD1, 242 FN_ATACS00_N, FN_AVB_RXD1,
243 FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2, 243 FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
@@ -609,7 +609,7 @@ enum {
609 GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK, 609 GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
610 STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK, 610 STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
611 PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK, 611 PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
612 PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK, 612 PCMWE_N_MARK, IECLK_C_MARK, DU_DOTCLKIN1_MARK,
613 AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK, 613 AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
614 ATACS00_N_MARK, AVB_RXD1_MARK, 614 ATACS00_N_MARK, AVB_RXD1_MARK,
615 VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK, 615 VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
@@ -1214,7 +1214,7 @@ static const u16 pinmux_data[] = {
1214 PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2), 1214 PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
1215 PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N), 1215 PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
1216 PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2), 1216 PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
1217 PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN), 1217 PINMUX_IPSR_DATA(IP7_26_25, DU_DOTCLKIN1),
1218 PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC), 1218 PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
1219 PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C), 1219 PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
1220 PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0), 1220 PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
@@ -3819,7 +3819,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
3819 /* IP7_28_27 [2] */ 3819 /* IP7_28_27 [2] */
3820 FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, 0, 3820 FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, 0,
3821 /* IP7_26_25 [2] */ 3821 /* IP7_26_25 [2] */
3822 FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0, 3822 FN_DU_DOTCLKIN1, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
3823 /* IP7_24_22 [3] */ 3823 /* IP7_24_22 [3] */
3824 FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C, 3824 FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
3825 0, 0, 0, 3825 0, 0, 0,