diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-07-15 19:54:13 -0400 |
---|---|---|
committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-07-29 09:17:33 -0400 |
commit | 7f975b3f1e2b1416d02863fb10e0f69f3d668c77 (patch) | |
tree | 56560eb4919e6aaac59b37c309e235db19e79465 /drivers/pinctrl/sh-pfc | |
parent | ad81f0545ef01ea651886dddac4bef6cec930092 (diff) |
sh-pfc: sh7720: Remove unused input_pu range
The PFC SH7720 SoC data contains a input_pu range used to configure
pull-up resistors using the legacy non-pinconf API. That API has been
removed from the driver, the range is thus not used anymore. Remove it.
If required, configuring pull-up resistors for the SH7720 can be
implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
and R-Car platforms.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/pinctrl/sh-pfc')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-sh7720.c | 465 |
1 files changed, 217 insertions, 248 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c index 52e9f6be665f..3b96d612b9ac 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c | |||
@@ -81,36 +81,6 @@ enum { | |||
81 | PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, | 81 | PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN, |
82 | PINMUX_INPUT_END, | 82 | PINMUX_INPUT_END, |
83 | 83 | ||
84 | PINMUX_INPUT_PULLUP_BEGIN, | ||
85 | PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU, | ||
86 | PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU, | ||
87 | PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU, | ||
88 | PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU, | ||
89 | PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU, | ||
90 | PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU, | ||
91 | PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU, | ||
92 | PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU, | ||
93 | PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU, | ||
94 | PTF0_IN_PU, | ||
95 | PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU, | ||
96 | PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU, | ||
97 | PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU, | ||
98 | PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU, | ||
99 | PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU, | ||
100 | PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU, | ||
101 | PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU, | ||
102 | PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU, | ||
103 | PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU, | ||
104 | PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU, | ||
105 | PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU, | ||
106 | PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU, | ||
107 | PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU, | ||
108 | PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU, | ||
109 | PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU, | ||
110 | PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU, | ||
111 | PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU, | ||
112 | PINMUX_INPUT_PULLUP_END, | ||
113 | |||
114 | PINMUX_OUTPUT_BEGIN, | 84 | PINMUX_OUTPUT_BEGIN, |
115 | PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, | 85 | PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT, |
116 | PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, | 86 | PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT, |
@@ -264,53 +234,53 @@ enum { | |||
264 | 234 | ||
265 | static const pinmux_enum_t pinmux_data[] = { | 235 | static const pinmux_enum_t pinmux_data[] = { |
266 | /* PTA GPIO */ | 236 | /* PTA GPIO */ |
267 | PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU), | 237 | PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), |
268 | PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU), | 238 | PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), |
269 | PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU), | 239 | PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT), |
270 | PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU), | 240 | PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT), |
271 | PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU), | 241 | PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT), |
272 | PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU), | 242 | PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT), |
273 | PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU), | 243 | PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT), |
274 | PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU), | 244 | PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT), |
275 | 245 | ||
276 | /* PTB GPIO */ | 246 | /* PTB GPIO */ |
277 | PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU), | 247 | PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT), |
278 | PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU), | 248 | PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT), |
279 | PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU), | 249 | PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT), |
280 | PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU), | 250 | PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT), |
281 | PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU), | 251 | PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT), |
282 | PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU), | 252 | PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT), |
283 | PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU), | 253 | PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT), |
284 | PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU), | 254 | PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT), |
285 | 255 | ||
286 | /* PTC GPIO */ | 256 | /* PTC GPIO */ |
287 | PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU), | 257 | PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT), |
288 | PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU), | 258 | PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT), |
289 | PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU), | 259 | PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT), |
290 | PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU), | 260 | PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT), |
291 | PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU), | 261 | PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT), |
292 | PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU), | 262 | PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT), |
293 | PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU), | 263 | PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT), |
294 | PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU), | 264 | PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT), |
295 | 265 | ||
296 | /* PTD GPIO */ | 266 | /* PTD GPIO */ |
297 | PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU), | 267 | PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT), |
298 | PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU), | 268 | PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT), |
299 | PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU), | 269 | PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT), |
300 | PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU), | 270 | PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT), |
301 | PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU), | 271 | PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT), |
302 | PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU), | 272 | PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT), |
303 | PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU), | 273 | PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT), |
304 | PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU), | 274 | PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT), |
305 | 275 | ||
306 | /* PTE GPIO */ | 276 | /* PTE GPIO */ |
307 | PINMUX_DATA(PTE6_DATA, PTE6_IN), | 277 | PINMUX_DATA(PTE6_DATA, PTE6_IN), |
308 | PINMUX_DATA(PTE5_DATA, PTE5_IN), | 278 | PINMUX_DATA(PTE5_DATA, PTE5_IN), |
309 | PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU), | 279 | PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT), |
310 | PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU), | 280 | PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT), |
311 | PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU), | 281 | PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT), |
312 | PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU), | 282 | PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT), |
313 | PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU), | 283 | PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT), |
314 | 284 | ||
315 | /* PTF GPIO */ | 285 | /* PTF GPIO */ |
316 | PINMUX_DATA(PTF6_DATA, PTF6_IN), | 286 | PINMUX_DATA(PTF6_DATA, PTF6_IN), |
@@ -319,102 +289,102 @@ static const pinmux_enum_t pinmux_data[] = { | |||
319 | PINMUX_DATA(PTF3_DATA, PTF3_IN), | 289 | PINMUX_DATA(PTF3_DATA, PTF3_IN), |
320 | PINMUX_DATA(PTF2_DATA, PTF2_IN), | 290 | PINMUX_DATA(PTF2_DATA, PTF2_IN), |
321 | PINMUX_DATA(PTF1_DATA, PTF1_IN), | 291 | PINMUX_DATA(PTF1_DATA, PTF1_IN), |
322 | PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU), | 292 | PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT), |
323 | 293 | ||
324 | /* PTG GPIO */ | 294 | /* PTG GPIO */ |
325 | PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU), | 295 | PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT), |
326 | PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU), | 296 | PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT), |
327 | PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU), | 297 | PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT), |
328 | PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU), | 298 | PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT), |
329 | PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU), | 299 | PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT), |
330 | PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU), | 300 | PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT), |
331 | PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU), | 301 | PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT), |
332 | 302 | ||
333 | /* PTH GPIO */ | 303 | /* PTH GPIO */ |
334 | PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU), | 304 | PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT), |
335 | PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU), | 305 | PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT), |
336 | PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU), | 306 | PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT), |
337 | PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU), | 307 | PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT), |
338 | PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU), | 308 | PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT), |
339 | PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU), | 309 | PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT), |
340 | PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU), | 310 | PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT), |
341 | 311 | ||
342 | /* PTJ GPIO */ | 312 | /* PTJ GPIO */ |
343 | PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU), | 313 | PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT), |
344 | PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU), | 314 | PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT), |
345 | PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU), | 315 | PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT), |
346 | PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU), | 316 | PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT), |
347 | PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU), | 317 | PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT), |
348 | PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU), | 318 | PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT), |
349 | PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU), | 319 | PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT), |
350 | 320 | ||
351 | /* PTK GPIO */ | 321 | /* PTK GPIO */ |
352 | PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU), | 322 | PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT), |
353 | PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU), | 323 | PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT), |
354 | PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU), | 324 | PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT), |
355 | PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU), | 325 | PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT), |
356 | 326 | ||
357 | /* PTL GPIO */ | 327 | /* PTL GPIO */ |
358 | PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU), | 328 | PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT), |
359 | PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU), | 329 | PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT), |
360 | PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU), | 330 | PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT), |
361 | PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU), | 331 | PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT), |
362 | PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU), | 332 | PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT), |
363 | 333 | ||
364 | /* PTM GPIO */ | 334 | /* PTM GPIO */ |
365 | PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU), | 335 | PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT), |
366 | PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU), | 336 | PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT), |
367 | PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU), | 337 | PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT), |
368 | PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU), | 338 | PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT), |
369 | PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU), | 339 | PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT), |
370 | PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU), | 340 | PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT), |
371 | PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU), | 341 | PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT), |
372 | PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU), | 342 | PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT), |
373 | 343 | ||
374 | /* PTP GPIO */ | 344 | /* PTP GPIO */ |
375 | PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU), | 345 | PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT), |
376 | PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU), | 346 | PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT), |
377 | PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU), | 347 | PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT), |
378 | PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU), | 348 | PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT), |
379 | PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU), | 349 | PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT), |
380 | 350 | ||
381 | /* PTR GPIO */ | 351 | /* PTR GPIO */ |
382 | PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU), | 352 | PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT), |
383 | PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU), | 353 | PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT), |
384 | PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU), | 354 | PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT), |
385 | PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU), | 355 | PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT), |
386 | PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU), | 356 | PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT), |
387 | PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU), | 357 | PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT), |
388 | PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU), | 358 | PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT), |
389 | PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU), | 359 | PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT), |
390 | 360 | ||
391 | /* PTS GPIO */ | 361 | /* PTS GPIO */ |
392 | PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU), | 362 | PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT), |
393 | PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU), | 363 | PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT), |
394 | PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU), | 364 | PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT), |
395 | PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU), | 365 | PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT), |
396 | PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU), | 366 | PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT), |
397 | 367 | ||
398 | /* PTT GPIO */ | 368 | /* PTT GPIO */ |
399 | PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU), | 369 | PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT), |
400 | PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU), | 370 | PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT), |
401 | PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU), | 371 | PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT), |
402 | PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU), | 372 | PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT), |
403 | PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU), | 373 | PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT), |
404 | 374 | ||
405 | /* PTU GPIO */ | 375 | /* PTU GPIO */ |
406 | PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU), | 376 | PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT), |
407 | PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU), | 377 | PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT), |
408 | PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU), | 378 | PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT), |
409 | PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU), | 379 | PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT), |
410 | PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU), | 380 | PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT), |
411 | 381 | ||
412 | /* PTV GPIO */ | 382 | /* PTV GPIO */ |
413 | PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU), | 383 | PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT), |
414 | PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU), | 384 | PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT), |
415 | PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU), | 385 | PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT), |
416 | PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU), | 386 | PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT), |
417 | PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU), | 387 | PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT), |
418 | 388 | ||
419 | /* PTA FN */ | 389 | /* PTA FN */ |
420 | PINMUX_DATA(D23_MARK, PTA7_FN), | 390 | PINMUX_DATA(D23_MARK, PTA7_FN), |
@@ -959,54 +929,54 @@ static const struct pinmux_func pinmux_func_gpios[] = { | |||
959 | 929 | ||
960 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { | 930 | static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
961 | { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { | 931 | { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { |
962 | PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN, | 932 | PTA7_FN, PTA7_OUT, 0, PTA7_IN, |
963 | PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN, | 933 | PTA6_FN, PTA6_OUT, 0, PTA6_IN, |
964 | PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN, | 934 | PTA5_FN, PTA5_OUT, 0, PTA5_IN, |
965 | PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN, | 935 | PTA4_FN, PTA4_OUT, 0, PTA4_IN, |
966 | PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN, | 936 | PTA3_FN, PTA3_OUT, 0, PTA3_IN, |
967 | PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN, | 937 | PTA2_FN, PTA2_OUT, 0, PTA2_IN, |
968 | PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN, | 938 | PTA1_FN, PTA1_OUT, 0, PTA1_IN, |
969 | PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN } | 939 | PTA0_FN, PTA0_OUT, 0, PTA0_IN } |
970 | }, | 940 | }, |
971 | { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) { | 941 | { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) { |
972 | PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN, | 942 | PTB7_FN, PTB7_OUT, 0, PTB7_IN, |
973 | PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN, | 943 | PTB6_FN, PTB6_OUT, 0, PTB6_IN, |
974 | PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN, | 944 | PTB5_FN, PTB5_OUT, 0, PTB5_IN, |
975 | PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN, | 945 | PTB4_FN, PTB4_OUT, 0, PTB4_IN, |
976 | PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN, | 946 | PTB3_FN, PTB3_OUT, 0, PTB3_IN, |
977 | PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN, | 947 | PTB2_FN, PTB2_OUT, 0, PTB2_IN, |
978 | PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN, | 948 | PTB1_FN, PTB1_OUT, 0, PTB1_IN, |
979 | PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN } | 949 | PTB0_FN, PTB0_OUT, 0, PTB0_IN } |
980 | }, | 950 | }, |
981 | { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) { | 951 | { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) { |
982 | PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN, | 952 | PTC7_FN, PTC7_OUT, 0, PTC7_IN, |
983 | PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN, | 953 | PTC6_FN, PTC6_OUT, 0, PTC6_IN, |
984 | PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN, | 954 | PTC5_FN, PTC5_OUT, 0, PTC5_IN, |
985 | PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN, | 955 | PTC4_FN, PTC4_OUT, 0, PTC4_IN, |
986 | PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN, | 956 | PTC3_FN, PTC3_OUT, 0, PTC3_IN, |
987 | PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN, | 957 | PTC2_FN, PTC2_OUT, 0, PTC2_IN, |
988 | PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN, | 958 | PTC1_FN, PTC1_OUT, 0, PTC1_IN, |
989 | PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN } | 959 | PTC0_FN, PTC0_OUT, 0, PTC0_IN } |
990 | }, | 960 | }, |
991 | { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) { | 961 | { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) { |
992 | PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN, | 962 | PTD7_FN, PTD7_OUT, 0, PTD7_IN, |
993 | PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN, | 963 | PTD6_FN, PTD6_OUT, 0, PTD6_IN, |
994 | PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN, | 964 | PTD5_FN, PTD5_OUT, 0, PTD5_IN, |
995 | PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN, | 965 | PTD4_FN, PTD4_OUT, 0, PTD4_IN, |
996 | PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN, | 966 | PTD3_FN, PTD3_OUT, 0, PTD3_IN, |
997 | PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN, | 967 | PTD2_FN, PTD2_OUT, 0, PTD2_IN, |
998 | PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN, | 968 | PTD1_FN, PTD1_OUT, 0, PTD1_IN, |
999 | PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN } | 969 | PTD0_FN, PTD0_OUT, 0, PTD0_IN } |
1000 | }, | 970 | }, |
1001 | { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) { | 971 | { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) { |
1002 | 0, 0, 0, 0, | 972 | 0, 0, 0, 0, |
1003 | PTE6_FN, 0, 0, PTE6_IN, | 973 | PTE6_FN, 0, 0, PTE6_IN, |
1004 | PTE5_FN, 0, 0, PTE5_IN, | 974 | PTE5_FN, 0, 0, PTE5_IN, |
1005 | PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN, | 975 | PTE4_FN, PTE4_OUT, 0, PTE4_IN, |
1006 | PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN, | 976 | PTE3_FN, PTE3_OUT, 0, PTE3_IN, |
1007 | PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN, | 977 | PTE2_FN, PTE2_OUT, 0, PTE2_IN, |
1008 | PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN, | 978 | PTE1_FN, PTE1_OUT, 0, PTE1_IN, |
1009 | PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN } | 979 | PTE0_FN, PTE0_OUT, 0, PTE0_IN } |
1010 | }, | 980 | }, |
1011 | { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) { | 981 | { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) { |
1012 | 0, 0, 0, 0, | 982 | 0, 0, 0, 0, |
@@ -1020,123 +990,123 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { | |||
1020 | }, | 990 | }, |
1021 | { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) { | 991 | { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) { |
1022 | 0, 0, 0, 0, | 992 | 0, 0, 0, 0, |
1023 | PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN, | 993 | PTG6_FN, PTG6_OUT, 0, PTG6_IN, |
1024 | PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN, | 994 | PTG5_FN, PTG5_OUT, 0, PTG5_IN, |
1025 | PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN, | 995 | PTG4_FN, PTG4_OUT, 0, PTG4_IN, |
1026 | PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN, | 996 | PTG3_FN, PTG3_OUT, 0, PTG3_IN, |
1027 | PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN, | 997 | PTG2_FN, PTG2_OUT, 0, PTG2_IN, |
1028 | PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN, | 998 | PTG1_FN, PTG1_OUT, 0, PTG1_IN, |
1029 | PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN } | 999 | PTG0_FN, PTG0_OUT, 0, PTG0_IN } |
1030 | }, | 1000 | }, |
1031 | { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) { | 1001 | { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) { |
1032 | 0, 0, 0, 0, | 1002 | 0, 0, 0, 0, |
1033 | PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN, | 1003 | PTH6_FN, PTH6_OUT, 0, PTH6_IN, |
1034 | PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN, | 1004 | PTH5_FN, PTH5_OUT, 0, PTH5_IN, |
1035 | PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN, | 1005 | PTH4_FN, PTH4_OUT, 0, PTH4_IN, |
1036 | PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN, | 1006 | PTH3_FN, PTH3_OUT, 0, PTH3_IN, |
1037 | PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN, | 1007 | PTH2_FN, PTH2_OUT, 0, PTH2_IN, |
1038 | PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN, | 1008 | PTH1_FN, PTH1_OUT, 0, PTH1_IN, |
1039 | PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN } | 1009 | PTH0_FN, PTH0_OUT, 0, PTH0_IN } |
1040 | }, | 1010 | }, |
1041 | { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) { | 1011 | { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) { |
1042 | 0, 0, 0, 0, | 1012 | 0, 0, 0, 0, |
1043 | PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN, | 1013 | PTJ6_FN, PTJ6_OUT, 0, PTJ6_IN, |
1044 | PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN, | 1014 | PTJ5_FN, PTJ5_OUT, 0, PTJ5_IN, |
1045 | PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN, | 1015 | PTJ4_FN, PTJ4_OUT, 0, PTJ4_IN, |
1046 | PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN, | 1016 | PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN, |
1047 | PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN, | 1017 | PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN, |
1048 | PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN, | 1018 | PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN, |
1049 | PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN } | 1019 | PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN } |
1050 | }, | 1020 | }, |
1051 | { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) { | 1021 | { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) { |
1052 | 0, 0, 0, 0, | 1022 | 0, 0, 0, 0, |
1053 | 0, 0, 0, 0, | 1023 | 0, 0, 0, 0, |
1054 | 0, 0, 0, 0, | 1024 | 0, 0, 0, 0, |
1055 | 0, 0, 0, 0, | 1025 | 0, 0, 0, 0, |
1056 | PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN, | 1026 | PTK3_FN, PTK3_OUT, 0, PTK3_IN, |
1057 | PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN, | 1027 | PTK2_FN, PTK2_OUT, 0, PTK2_IN, |
1058 | PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN, | 1028 | PTK1_FN, PTK1_OUT, 0, PTK1_IN, |
1059 | PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN } | 1029 | PTK0_FN, PTK0_OUT, 0, PTK0_IN } |
1060 | }, | 1030 | }, |
1061 | { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) { | 1031 | { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) { |
1062 | PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN, | 1032 | PTL7_FN, PTL7_OUT, 0, PTL7_IN, |
1063 | PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN, | 1033 | PTL6_FN, PTL6_OUT, 0, PTL6_IN, |
1064 | PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN, | 1034 | PTL5_FN, PTL5_OUT, 0, PTL5_IN, |
1065 | PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN, | 1035 | PTL4_FN, PTL4_OUT, 0, PTL4_IN, |
1066 | PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN, | 1036 | PTL3_FN, PTL3_OUT, 0, PTL3_IN, |
1067 | 0, 0, 0, 0, | 1037 | 0, 0, 0, 0, |
1068 | 0, 0, 0, 0, | 1038 | 0, 0, 0, 0, |
1069 | 0, 0, 0, 0 } | 1039 | 0, 0, 0, 0 } |
1070 | }, | 1040 | }, |
1071 | { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) { | 1041 | { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) { |
1072 | PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN, | 1042 | PTM7_FN, PTM7_OUT, 0, PTM7_IN, |
1073 | PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN, | 1043 | PTM6_FN, PTM6_OUT, 0, PTM6_IN, |
1074 | PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN, | 1044 | PTM5_FN, PTM5_OUT, 0, PTM5_IN, |
1075 | PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN, | 1045 | PTM4_FN, PTM4_OUT, 0, PTM4_IN, |
1076 | PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN, | 1046 | PTM3_FN, PTM3_OUT, 0, PTM3_IN, |
1077 | PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN, | 1047 | PTM2_FN, PTM2_OUT, 0, PTM2_IN, |
1078 | PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN, | 1048 | PTM1_FN, PTM1_OUT, 0, PTM1_IN, |
1079 | PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN } | 1049 | PTM0_FN, PTM0_OUT, 0, PTM0_IN } |
1080 | }, | 1050 | }, |
1081 | { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) { | 1051 | { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) { |
1082 | 0, 0, 0, 0, | 1052 | 0, 0, 0, 0, |
1083 | 0, 0, 0, 0, | 1053 | 0, 0, 0, 0, |
1084 | 0, 0, 0, 0, | 1054 | 0, 0, 0, 0, |
1085 | PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN, | 1055 | PTP4_FN, PTP4_OUT, 0, PTP4_IN, |
1086 | PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN, | 1056 | PTP3_FN, PTP3_OUT, 0, PTP3_IN, |
1087 | PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN, | 1057 | PTP2_FN, PTP2_OUT, 0, PTP2_IN, |
1088 | PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN, | 1058 | PTP1_FN, PTP1_OUT, 0, PTP1_IN, |
1089 | PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN } | 1059 | PTP0_FN, PTP0_OUT, 0, PTP0_IN } |
1090 | }, | 1060 | }, |
1091 | { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) { | 1061 | { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) { |
1092 | PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN, | 1062 | PTR7_FN, PTR7_OUT, 0, PTR7_IN, |
1093 | PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN, | 1063 | PTR6_FN, PTR6_OUT, 0, PTR6_IN, |
1094 | PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN, | 1064 | PTR5_FN, PTR5_OUT, 0, PTR5_IN, |
1095 | PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN, | 1065 | PTR4_FN, PTR4_OUT, 0, PTR4_IN, |
1096 | PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN, | 1066 | PTR3_FN, PTR3_OUT, 0, PTR3_IN, |
1097 | PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN, | 1067 | PTR2_FN, PTR2_OUT, 0, PTR2_IN, |
1098 | PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN, | 1068 | PTR1_FN, PTR1_OUT, 0, PTR1_IN, |
1099 | PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN } | 1069 | PTR0_FN, PTR0_OUT, 0, PTR0_IN } |
1100 | }, | 1070 | }, |
1101 | { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) { | 1071 | { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) { |
1102 | 0, 0, 0, 0, | 1072 | 0, 0, 0, 0, |
1103 | 0, 0, 0, 0, | 1073 | 0, 0, 0, 0, |
1104 | 0, 0, 0, 0, | 1074 | 0, 0, 0, 0, |
1105 | PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN, | 1075 | PTS4_FN, PTS4_OUT, 0, PTS4_IN, |
1106 | PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN, | 1076 | PTS3_FN, PTS3_OUT, 0, PTS3_IN, |
1107 | PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN, | 1077 | PTS2_FN, PTS2_OUT, 0, PTS2_IN, |
1108 | PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN, | 1078 | PTS1_FN, PTS1_OUT, 0, PTS1_IN, |
1109 | PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN } | 1079 | PTS0_FN, PTS0_OUT, 0, PTS0_IN } |
1110 | }, | 1080 | }, |
1111 | { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) { | 1081 | { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) { |
1112 | 0, 0, 0, 0, | 1082 | 0, 0, 0, 0, |
1113 | 0, 0, 0, 0, | 1083 | 0, 0, 0, 0, |
1114 | 0, 0, 0, 0, | 1084 | 0, 0, 0, 0, |
1115 | PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN, | 1085 | PTT4_FN, PTT4_OUT, 0, PTT4_IN, |
1116 | PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN, | 1086 | PTT3_FN, PTT3_OUT, 0, PTT3_IN, |
1117 | PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN, | 1087 | PTT2_FN, PTT2_OUT, 0, PTT2_IN, |
1118 | PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN, | 1088 | PTT1_FN, PTT1_OUT, 0, PTT1_IN, |
1119 | PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN } | 1089 | PTT0_FN, PTT0_OUT, 0, PTT0_IN } |
1120 | }, | 1090 | }, |
1121 | { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) { | 1091 | { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) { |
1122 | 0, 0, 0, 0, | 1092 | 0, 0, 0, 0, |
1123 | 0, 0, 0, 0, | 1093 | 0, 0, 0, 0, |
1124 | 0, 0, 0, 0, | 1094 | 0, 0, 0, 0, |
1125 | PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN, | 1095 | PTU4_FN, PTU4_OUT, 0, PTU4_IN, |
1126 | PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN, | 1096 | PTU3_FN, PTU3_OUT, 0, PTU3_IN, |
1127 | PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN, | 1097 | PTU2_FN, PTU2_OUT, 0, PTU2_IN, |
1128 | PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN, | 1098 | PTU1_FN, PTU1_OUT, 0, PTU1_IN, |
1129 | PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN } | 1099 | PTU0_FN, PTU0_OUT, 0, PTU0_IN } |
1130 | }, | 1100 | }, |
1131 | { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) { | 1101 | { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) { |
1132 | 0, 0, 0, 0, | 1102 | 0, 0, 0, 0, |
1133 | 0, 0, 0, 0, | 1103 | 0, 0, 0, 0, |
1134 | 0, 0, 0, 0, | 1104 | 0, 0, 0, 0, |
1135 | PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN, | 1105 | PTV4_FN, PTV4_OUT, 0, PTV4_IN, |
1136 | PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN, | 1106 | PTV3_FN, PTV3_OUT, 0, PTV3_IN, |
1137 | PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN, | 1107 | PTV2_FN, PTV2_OUT, 0, PTV2_IN, |
1138 | PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN, | 1108 | PTV1_FN, PTV1_OUT, 0, PTV1_IN, |
1139 | PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN } | 1109 | PTV0_FN, PTV0_OUT, 0, PTV0_IN } |
1140 | }, | 1110 | }, |
1141 | {} | 1111 | {} |
1142 | }; | 1112 | }; |
@@ -1220,7 +1190,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = { | |||
1220 | const struct sh_pfc_soc_info sh7720_pinmux_info = { | 1190 | const struct sh_pfc_soc_info sh7720_pinmux_info = { |
1221 | .name = "sh7720_pfc", | 1191 | .name = "sh7720_pfc", |
1222 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | 1192 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, |
1223 | .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, | ||
1224 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | 1193 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, |
1225 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | 1194 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, |
1226 | 1195 | ||