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authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-21 13:14:10 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-21 13:14:10 -0500
commita547df99aad777c1807e23991fa2471693c0e4cc (patch)
tree8e0a198648483580c9a7aa40efa4927c282fa4b1 /drivers/pinctrl/sh-pfc/pfc-sh7372.c
parent8e5096607280d4e103389bfe8f8b7decbf538ff6 (diff)
parentfa8cf57c923e86a693a85aff1df579245a27cbb3 (diff)
Merge tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull bulk pin control changes from Linus Walleij: "This has been queued and tested for a while. Lots of action here, like in the GPIO tree, embedded stuff like this is really hot now it seems. Details in the signed tag. I'm especially happy about the Qualcomm driver as it is used in such a huge subset of mobile handsets out there, and these platforms in general need better upstream support - New driver for the Qualcomm TLMM pin controller and its msm8x74 subdriver. - New driver for the Broadcom Capri BCM281xx SoC. - New subdriver for the imx25 pin controller. - New subdriver for the Tegra124 pin controller. - Lock GPIO lines as IRQs for select combined pin control and GPIO drivers for baytrail and sirf. - Some semi-big refactorings and extenstions to the sirf driver. - Lots of patching, cleanup and fixing in the Renesas "PFC" driver and associated subdrivers as usual. It is settling down a little bit now it seems. - Minor fixes and incremental updates here and there as usual" * tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits) pinctrl: sunxi: Honor GPIO output initial vaules pinctrl: capri: add dependency on OF ARM: bcm11351: Enable pinctrl for Broadcom Capri SoCs ARM: pinctrl: Add Broadcom Capri pinctrl driver pinctrl: Add pinctrl binding for Broadcom Capri SoCs pinctrl: Add void * to pinctrl_pin_desc pinctrl: st: Fix a typo in probe pinctrl: Fix some typos and grammar issues in the documentation pinctrl: sirf: lock IRQs when starting them pinctrl: sirf: put gpio interrupt pin into input status automatically pinctrl: sirf: use only one irq_domain for the whole device node pinctrl: single: fix infinite loop caused by bad mask pinctrl: single: fix pcs_disable with bits_per_mux pinctrl: single: fix DT bindings documentation pinctrl: as3722: Set pin to output mode for some function pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync pinctrl: sirf: fix the pins of sdmmc5 connected with TriG pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6 pinctrl: sunxi: Add Allwinner A20 clock output pin functions pinctrl/lantiq: fix typo ...
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-sh7372.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7372.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index cc097b693820..d9158b3b2919 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -844,7 +844,7 @@ static const u16 pinmux_data[] = {
844#define SH7372_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O) 844#define SH7372_PIN_O(pin) SH_PFC_PIN_CFG(pin, __O)
845#define SH7372_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD) 845#define SH7372_PIN_O_PU_PD(pin) SH_PFC_PIN_CFG(pin, __O | __PUD)
846 846
847static struct sh_pfc_pin pinmux_pins[] = { 847static const struct sh_pfc_pin pinmux_pins[] = {
848 /* Table 57-1 (I/O and Pull U/D) */ 848 /* Table 57-1 (I/O and Pull U/D) */
849 SH7372_PIN_IO_PD(0), SH7372_PIN_IO_PD(1), 849 SH7372_PIN_IO_PD(0), SH7372_PIN_IO_PD(1),
850 SH7372_PIN_O(2), SH7372_PIN_I_PD(3), 850 SH7372_PIN_O(2), SH7372_PIN_I_PD(3),
@@ -2118,17 +2118,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
2118 SH_PFC_FUNCTION(usb1), 2118 SH_PFC_FUNCTION(usb1),
2119}; 2119};
2120 2120
2121#undef PORTCR
2122#define PORTCR(nr, reg) \
2123 { \
2124 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
2125 _PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT), \
2126 PORT##nr##_FN0, PORT##nr##_FN1, \
2127 PORT##nr##_FN2, PORT##nr##_FN3, \
2128 PORT##nr##_FN4, PORT##nr##_FN5, \
2129 PORT##nr##_FN6, PORT##nr##_FN7 } \
2130 }
2131
2132static const struct pinmux_cfg_reg pinmux_config_regs[] = { 2121static const struct pinmux_cfg_reg pinmux_config_regs[] = {
2133 PORTCR(0, 0xE6051000), /* PORT0CR */ 2122 PORTCR(0, 0xE6051000), /* PORT0CR */
2134 PORTCR(1, 0xE6051001), /* PORT1CR */ 2123 PORTCR(1, 0xE6051001), /* PORT1CR */
@@ -2585,7 +2574,7 @@ static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
2585 &sh7372_portcr_offsets[i]; 2574 &sh7372_portcr_offsets[i];
2586 2575
2587 if (pin <= group->end_pin) 2576 if (pin <= group->end_pin)
2588 return pfc->window->virt + group->offset + pin; 2577 return pfc->windows->virt + group->offset + pin;
2589 } 2578 }
2590 2579
2591 return NULL; 2580 return NULL;