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authorGeert Uytterhoeven <geert+renesas@linux-m68k.org>2014-02-26 04:16:57 -0500
committerLinus Walleij <linus.walleij@linaro.org>2014-03-04 20:53:49 -0500
commite6fae2d03dc4f9172db88ad18a577c2a45b9e8ac (patch)
tree357ce725aaf36c928559b8a1502839c9958a8553 /drivers/pinctrl/sh-pfc/pfc-r8a7791.c
parent7033168da51e43ebba7870f089d275b4589df0c5 (diff)
pinctrl: sh-pfc: r8a7791: Add alternative MSIOF pin groups
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7791.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7791.c469
1 files changed, 469 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
index 7ac8d7fca91b..21f069481f82 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
@@ -2093,6 +2093,92 @@ static const unsigned int msiof0_tx_pins[] = {
2093static const unsigned int msiof0_tx_mux[] = { 2093static const unsigned int msiof0_tx_mux[] = {
2094 MSIOF0_TXD_MARK, 2094 MSIOF0_TXD_MARK,
2095}; 2095};
2096
2097static const unsigned int msiof0_clk_b_pins[] = {
2098 /* SCK */
2099 RCAR_GP_PIN(0, 16),
2100};
2101static const unsigned int msiof0_clk_b_mux[] = {
2102 MSIOF0_SCK_B_MARK,
2103};
2104static const unsigned int msiof0_sync_b_pins[] = {
2105 /* SYNC */
2106 RCAR_GP_PIN(0, 17),
2107};
2108static const unsigned int msiof0_sync_b_mux[] = {
2109 MSIOF0_SYNC_B_MARK,
2110};
2111static const unsigned int msiof0_ss1_b_pins[] = {
2112 /* SS1 */
2113 RCAR_GP_PIN(0, 18),
2114};
2115static const unsigned int msiof0_ss1_b_mux[] = {
2116 MSIOF0_SS1_B_MARK,
2117};
2118static const unsigned int msiof0_ss2_b_pins[] = {
2119 /* SS2 */
2120 RCAR_GP_PIN(0, 19),
2121};
2122static const unsigned int msiof0_ss2_b_mux[] = {
2123 MSIOF0_SS2_B_MARK,
2124};
2125static const unsigned int msiof0_rx_b_pins[] = {
2126 /* RXD */
2127 RCAR_GP_PIN(0, 21),
2128};
2129static const unsigned int msiof0_rx_b_mux[] = {
2130 MSIOF0_RXD_B_MARK,
2131};
2132static const unsigned int msiof0_tx_b_pins[] = {
2133 /* TXD */
2134 RCAR_GP_PIN(0, 20),
2135};
2136static const unsigned int msiof0_tx_b_mux[] = {
2137 MSIOF0_TXD_B_MARK,
2138};
2139
2140static const unsigned int msiof0_clk_c_pins[] = {
2141 /* SCK */
2142 RCAR_GP_PIN(5, 26),
2143};
2144static const unsigned int msiof0_clk_c_mux[] = {
2145 MSIOF0_SCK_C_MARK,
2146};
2147static const unsigned int msiof0_sync_c_pins[] = {
2148 /* SYNC */
2149 RCAR_GP_PIN(5, 25),
2150};
2151static const unsigned int msiof0_sync_c_mux[] = {
2152 MSIOF0_SYNC_C_MARK,
2153};
2154static const unsigned int msiof0_ss1_c_pins[] = {
2155 /* SS1 */
2156 RCAR_GP_PIN(5, 27),
2157};
2158static const unsigned int msiof0_ss1_c_mux[] = {
2159 MSIOF0_SS1_C_MARK,
2160};
2161static const unsigned int msiof0_ss2_c_pins[] = {
2162 /* SS2 */
2163 RCAR_GP_PIN(5, 28),
2164};
2165static const unsigned int msiof0_ss2_c_mux[] = {
2166 MSIOF0_SS2_C_MARK,
2167};
2168static const unsigned int msiof0_rx_c_pins[] = {
2169 /* RXD */
2170 RCAR_GP_PIN(5, 29),
2171};
2172static const unsigned int msiof0_rx_c_mux[] = {
2173 MSIOF0_RXD_C_MARK,
2174};
2175static const unsigned int msiof0_tx_c_pins[] = {
2176 /* TXD */
2177 RCAR_GP_PIN(5, 30),
2178};
2179static const unsigned int msiof0_tx_c_mux[] = {
2180 MSIOF0_TXD_C_MARK,
2181};
2096/* - MSIOF1 ----------------------------------------------------------------- */ 2182/* - MSIOF1 ----------------------------------------------------------------- */
2097static const unsigned int msiof1_clk_pins[] = { 2183static const unsigned int msiof1_clk_pins[] = {
2098 /* SCK */ 2184 /* SCK */
@@ -2136,6 +2222,143 @@ static const unsigned int msiof1_tx_pins[] = {
2136static const unsigned int msiof1_tx_mux[] = { 2222static const unsigned int msiof1_tx_mux[] = {
2137 MSIOF1_TXD_MARK, 2223 MSIOF1_TXD_MARK,
2138}; 2224};
2225
2226static const unsigned int msiof1_clk_b_pins[] = {
2227 /* SCK */
2228 RCAR_GP_PIN(2, 29),
2229};
2230static const unsigned int msiof1_clk_b_mux[] = {
2231 MSIOF1_SCK_B_MARK,
2232};
2233static const unsigned int msiof1_sync_b_pins[] = {
2234 /* SYNC */
2235 RCAR_GP_PIN(2, 30),
2236};
2237static const unsigned int msiof1_sync_b_mux[] = {
2238 MSIOF1_SYNC_B_MARK,
2239};
2240static const unsigned int msiof1_ss1_b_pins[] = {
2241 /* SS1 */
2242 RCAR_GP_PIN(2, 31),
2243};
2244static const unsigned int msiof1_ss1_b_mux[] = {
2245 MSIOF1_SS1_B_MARK,
2246};
2247static const unsigned int msiof1_ss2_b_pins[] = {
2248 /* SS2 */
2249 RCAR_GP_PIN(7, 16),
2250};
2251static const unsigned int msiof1_ss2_b_mux[] = {
2252 MSIOF1_SS2_B_MARK,
2253};
2254static const unsigned int msiof1_rx_b_pins[] = {
2255 /* RXD */
2256 RCAR_GP_PIN(7, 18),
2257};
2258static const unsigned int msiof1_rx_b_mux[] = {
2259 MSIOF1_RXD_B_MARK,
2260};
2261static const unsigned int msiof1_tx_b_pins[] = {
2262 /* TXD */
2263 RCAR_GP_PIN(7, 17),
2264};
2265static const unsigned int msiof1_tx_b_mux[] = {
2266 MSIOF1_TXD_B_MARK,
2267};
2268
2269static const unsigned int msiof1_clk_c_pins[] = {
2270 /* SCK */
2271 RCAR_GP_PIN(2, 15),
2272};
2273static const unsigned int msiof1_clk_c_mux[] = {
2274 MSIOF1_SCK_C_MARK,
2275};
2276static const unsigned int msiof1_sync_c_pins[] = {
2277 /* SYNC */
2278 RCAR_GP_PIN(2, 16),
2279};
2280static const unsigned int msiof1_sync_c_mux[] = {
2281 MSIOF1_SYNC_C_MARK,
2282};
2283static const unsigned int msiof1_rx_c_pins[] = {
2284 /* RXD */
2285 RCAR_GP_PIN(2, 18),
2286};
2287static const unsigned int msiof1_rx_c_mux[] = {
2288 MSIOF1_RXD_C_MARK,
2289};
2290static const unsigned int msiof1_tx_c_pins[] = {
2291 /* TXD */
2292 RCAR_GP_PIN(2, 17),
2293};
2294static const unsigned int msiof1_tx_c_mux[] = {
2295 MSIOF1_TXD_C_MARK,
2296};
2297
2298static const unsigned int msiof1_clk_d_pins[] = {
2299 /* SCK */
2300 RCAR_GP_PIN(0, 28),
2301};
2302static const unsigned int msiof1_clk_d_mux[] = {
2303 MSIOF1_SCK_D_MARK,
2304};
2305static const unsigned int msiof1_sync_d_pins[] = {
2306 /* SYNC */
2307 RCAR_GP_PIN(0, 30),
2308};
2309static const unsigned int msiof1_sync_d_mux[] = {
2310 MSIOF1_SYNC_D_MARK,
2311};
2312static const unsigned int msiof1_ss1_d_pins[] = {
2313 /* SS1 */
2314 RCAR_GP_PIN(0, 29),
2315};
2316static const unsigned int msiof1_ss1_d_mux[] = {
2317 MSIOF1_SS1_D_MARK,
2318};
2319static const unsigned int msiof1_rx_d_pins[] = {
2320 /* RXD */
2321 RCAR_GP_PIN(0, 27),
2322};
2323static const unsigned int msiof1_rx_d_mux[] = {
2324 MSIOF1_RXD_D_MARK,
2325};
2326static const unsigned int msiof1_tx_d_pins[] = {
2327 /* TXD */
2328 RCAR_GP_PIN(0, 26),
2329};
2330static const unsigned int msiof1_tx_d_mux[] = {
2331 MSIOF1_TXD_D_MARK,
2332};
2333
2334static const unsigned int msiof1_clk_e_pins[] = {
2335 /* SCK */
2336 RCAR_GP_PIN(5, 18),
2337};
2338static const unsigned int msiof1_clk_e_mux[] = {
2339 MSIOF1_SCK_E_MARK,
2340};
2341static const unsigned int msiof1_sync_e_pins[] = {
2342 /* SYNC */
2343 RCAR_GP_PIN(5, 19),
2344};
2345static const unsigned int msiof1_sync_e_mux[] = {
2346 MSIOF1_SYNC_E_MARK,
2347};
2348static const unsigned int msiof1_rx_e_pins[] = {
2349 /* RXD */
2350 RCAR_GP_PIN(5, 17),
2351};
2352static const unsigned int msiof1_rx_e_mux[] = {
2353 MSIOF1_RXD_E_MARK,
2354};
2355static const unsigned int msiof1_tx_e_pins[] = {
2356 /* TXD */
2357 RCAR_GP_PIN(5, 20),
2358};
2359static const unsigned int msiof1_tx_e_mux[] = {
2360 MSIOF1_TXD_E_MARK,
2361};
2139/* - MSIOF2 ----------------------------------------------------------------- */ 2362/* - MSIOF2 ----------------------------------------------------------------- */
2140static const unsigned int msiof2_clk_pins[] = { 2363static const unsigned int msiof2_clk_pins[] = {
2141 /* SCK */ 2364 /* SCK */
@@ -2179,6 +2402,150 @@ static const unsigned int msiof2_tx_pins[] = {
2179static const unsigned int msiof2_tx_mux[] = { 2402static const unsigned int msiof2_tx_mux[] = {
2180 MSIOF2_TXD_MARK, 2403 MSIOF2_TXD_MARK,
2181}; 2404};
2405
2406static const unsigned int msiof2_clk_b_pins[] = {
2407 /* SCK */
2408 RCAR_GP_PIN(3, 0),
2409};
2410static const unsigned int msiof2_clk_b_mux[] = {
2411 MSIOF2_SCK_B_MARK,
2412};
2413static const unsigned int msiof2_sync_b_pins[] = {
2414 /* SYNC */
2415 RCAR_GP_PIN(3, 1),
2416};
2417static const unsigned int msiof2_sync_b_mux[] = {
2418 MSIOF2_SYNC_B_MARK,
2419};
2420static const unsigned int msiof2_ss1_b_pins[] = {
2421 /* SS1 */
2422 RCAR_GP_PIN(3, 8),
2423};
2424static const unsigned int msiof2_ss1_b_mux[] = {
2425 MSIOF2_SS1_B_MARK,
2426};
2427static const unsigned int msiof2_ss2_b_pins[] = {
2428 /* SS2 */
2429 RCAR_GP_PIN(3, 9),
2430};
2431static const unsigned int msiof2_ss2_b_mux[] = {
2432 MSIOF2_SS2_B_MARK,
2433};
2434static const unsigned int msiof2_rx_b_pins[] = {
2435 /* RXD */
2436 RCAR_GP_PIN(3, 17),
2437};
2438static const unsigned int msiof2_rx_b_mux[] = {
2439 MSIOF2_RXD_B_MARK,
2440};
2441static const unsigned int msiof2_tx_b_pins[] = {
2442 /* TXD */
2443 RCAR_GP_PIN(3, 16),
2444};
2445static const unsigned int msiof2_tx_b_mux[] = {
2446 MSIOF2_TXD_B_MARK,
2447};
2448
2449static const unsigned int msiof2_clk_c_pins[] = {
2450 /* SCK */
2451 RCAR_GP_PIN(2, 2),
2452};
2453static const unsigned int msiof2_clk_c_mux[] = {
2454 MSIOF2_SCK_C_MARK,
2455};
2456static const unsigned int msiof2_sync_c_pins[] = {
2457 /* SYNC */
2458 RCAR_GP_PIN(2, 3),
2459};
2460static const unsigned int msiof2_sync_c_mux[] = {
2461 MSIOF2_SYNC_C_MARK,
2462};
2463static const unsigned int msiof2_rx_c_pins[] = {
2464 /* RXD */
2465 RCAR_GP_PIN(2, 5),
2466};
2467static const unsigned int msiof2_rx_c_mux[] = {
2468 MSIOF2_RXD_C_MARK,
2469};
2470static const unsigned int msiof2_tx_c_pins[] = {
2471 /* TXD */
2472 RCAR_GP_PIN(2, 4),
2473};
2474static const unsigned int msiof2_tx_c_mux[] = {
2475 MSIOF2_TXD_C_MARK,
2476};
2477
2478static const unsigned int msiof2_clk_d_pins[] = {
2479 /* SCK */
2480 RCAR_GP_PIN(2, 14),
2481};
2482static const unsigned int msiof2_clk_d_mux[] = {
2483 MSIOF2_SCK_D_MARK,
2484};
2485static const unsigned int msiof2_sync_d_pins[] = {
2486 /* SYNC */
2487 RCAR_GP_PIN(2, 15),
2488};
2489static const unsigned int msiof2_sync_d_mux[] = {
2490 MSIOF2_SYNC_D_MARK,
2491};
2492static const unsigned int msiof2_ss1_d_pins[] = {
2493 /* SS1 */
2494 RCAR_GP_PIN(2, 17),
2495};
2496static const unsigned int msiof2_ss1_d_mux[] = {
2497 MSIOF2_SS1_D_MARK,
2498};
2499static const unsigned int msiof2_ss2_d_pins[] = {
2500 /* SS2 */
2501 RCAR_GP_PIN(2, 19),
2502};
2503static const unsigned int msiof2_ss2_d_mux[] = {
2504 MSIOF2_SS2_D_MARK,
2505};
2506static const unsigned int msiof2_rx_d_pins[] = {
2507 /* RXD */
2508 RCAR_GP_PIN(2, 18),
2509};
2510static const unsigned int msiof2_rx_d_mux[] = {
2511 MSIOF2_RXD_D_MARK,
2512};
2513static const unsigned int msiof2_tx_d_pins[] = {
2514 /* TXD */
2515 RCAR_GP_PIN(2, 16),
2516};
2517static const unsigned int msiof2_tx_d_mux[] = {
2518 MSIOF2_TXD_D_MARK,
2519};
2520
2521static const unsigned int msiof2_clk_e_pins[] = {
2522 /* SCK */
2523 RCAR_GP_PIN(7, 15),
2524};
2525static const unsigned int msiof2_clk_e_mux[] = {
2526 MSIOF2_SCK_E_MARK,
2527};
2528static const unsigned int msiof2_sync_e_pins[] = {
2529 /* SYNC */
2530 RCAR_GP_PIN(7, 16),
2531};
2532static const unsigned int msiof2_sync_e_mux[] = {
2533 MSIOF2_SYNC_E_MARK,
2534};
2535static const unsigned int msiof2_rx_e_pins[] = {
2536 /* RXD */
2537 RCAR_GP_PIN(7, 14),
2538};
2539static const unsigned int msiof2_rx_e_mux[] = {
2540 MSIOF2_RXD_E_MARK,
2541};
2542static const unsigned int msiof2_tx_e_pins[] = {
2543 /* TXD */
2544 RCAR_GP_PIN(7, 13),
2545};
2546static const unsigned int msiof2_tx_e_mux[] = {
2547 MSIOF2_TXD_E_MARK,
2548};
2182/* - QSPI ------------------------------------------------------------------- */ 2549/* - QSPI ------------------------------------------------------------------- */
2183static const unsigned int qspi_ctrl_pins[] = { 2550static const unsigned int qspi_ctrl_pins[] = {
2184 /* SPCLK, SSL */ 2551 /* SPCLK, SSL */
@@ -3234,18 +3601,69 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
3234 SH_PFC_PIN_GROUP(msiof0_ss2), 3601 SH_PFC_PIN_GROUP(msiof0_ss2),
3235 SH_PFC_PIN_GROUP(msiof0_rx), 3602 SH_PFC_PIN_GROUP(msiof0_rx),
3236 SH_PFC_PIN_GROUP(msiof0_tx), 3603 SH_PFC_PIN_GROUP(msiof0_tx),
3604 SH_PFC_PIN_GROUP(msiof0_clk_b),
3605 SH_PFC_PIN_GROUP(msiof0_sync_b),
3606 SH_PFC_PIN_GROUP(msiof0_ss1_b),
3607 SH_PFC_PIN_GROUP(msiof0_ss2_b),
3608 SH_PFC_PIN_GROUP(msiof0_rx_b),
3609 SH_PFC_PIN_GROUP(msiof0_tx_b),
3610 SH_PFC_PIN_GROUP(msiof0_clk_c),
3611 SH_PFC_PIN_GROUP(msiof0_sync_c),
3612 SH_PFC_PIN_GROUP(msiof0_ss1_c),
3613 SH_PFC_PIN_GROUP(msiof0_ss2_c),
3614 SH_PFC_PIN_GROUP(msiof0_rx_c),
3615 SH_PFC_PIN_GROUP(msiof0_tx_c),
3237 SH_PFC_PIN_GROUP(msiof1_clk), 3616 SH_PFC_PIN_GROUP(msiof1_clk),
3238 SH_PFC_PIN_GROUP(msiof1_sync), 3617 SH_PFC_PIN_GROUP(msiof1_sync),
3239 SH_PFC_PIN_GROUP(msiof1_ss1), 3618 SH_PFC_PIN_GROUP(msiof1_ss1),
3240 SH_PFC_PIN_GROUP(msiof1_ss2), 3619 SH_PFC_PIN_GROUP(msiof1_ss2),
3241 SH_PFC_PIN_GROUP(msiof1_rx), 3620 SH_PFC_PIN_GROUP(msiof1_rx),
3242 SH_PFC_PIN_GROUP(msiof1_tx), 3621 SH_PFC_PIN_GROUP(msiof1_tx),
3622 SH_PFC_PIN_GROUP(msiof1_clk_b),
3623 SH_PFC_PIN_GROUP(msiof1_sync_b),
3624 SH_PFC_PIN_GROUP(msiof1_ss1_b),
3625 SH_PFC_PIN_GROUP(msiof1_ss2_b),
3626 SH_PFC_PIN_GROUP(msiof1_rx_b),
3627 SH_PFC_PIN_GROUP(msiof1_tx_b),
3628 SH_PFC_PIN_GROUP(msiof1_clk_c),
3629 SH_PFC_PIN_GROUP(msiof1_sync_c),
3630 SH_PFC_PIN_GROUP(msiof1_rx_c),
3631 SH_PFC_PIN_GROUP(msiof1_tx_c),
3632 SH_PFC_PIN_GROUP(msiof1_clk_d),
3633 SH_PFC_PIN_GROUP(msiof1_sync_d),
3634 SH_PFC_PIN_GROUP(msiof1_ss1_d),
3635 SH_PFC_PIN_GROUP(msiof1_rx_d),
3636 SH_PFC_PIN_GROUP(msiof1_tx_d),
3637 SH_PFC_PIN_GROUP(msiof1_clk_e),
3638 SH_PFC_PIN_GROUP(msiof1_sync_e),
3639 SH_PFC_PIN_GROUP(msiof1_rx_e),
3640 SH_PFC_PIN_GROUP(msiof1_tx_e),
3243 SH_PFC_PIN_GROUP(msiof2_clk), 3641 SH_PFC_PIN_GROUP(msiof2_clk),
3244 SH_PFC_PIN_GROUP(msiof2_sync), 3642 SH_PFC_PIN_GROUP(msiof2_sync),
3245 SH_PFC_PIN_GROUP(msiof2_ss1), 3643 SH_PFC_PIN_GROUP(msiof2_ss1),
3246 SH_PFC_PIN_GROUP(msiof2_ss2), 3644 SH_PFC_PIN_GROUP(msiof2_ss2),
3247 SH_PFC_PIN_GROUP(msiof2_rx), 3645 SH_PFC_PIN_GROUP(msiof2_rx),
3248 SH_PFC_PIN_GROUP(msiof2_tx), 3646 SH_PFC_PIN_GROUP(msiof2_tx),
3647 SH_PFC_PIN_GROUP(msiof2_clk_b),
3648 SH_PFC_PIN_GROUP(msiof2_sync_b),
3649 SH_PFC_PIN_GROUP(msiof2_ss1_b),
3650 SH_PFC_PIN_GROUP(msiof2_ss2_b),
3651 SH_PFC_PIN_GROUP(msiof2_rx_b),
3652 SH_PFC_PIN_GROUP(msiof2_tx_b),
3653 SH_PFC_PIN_GROUP(msiof2_clk_c),
3654 SH_PFC_PIN_GROUP(msiof2_sync_c),
3655 SH_PFC_PIN_GROUP(msiof2_rx_c),
3656 SH_PFC_PIN_GROUP(msiof2_tx_c),
3657 SH_PFC_PIN_GROUP(msiof2_clk_d),
3658 SH_PFC_PIN_GROUP(msiof2_sync_d),
3659 SH_PFC_PIN_GROUP(msiof2_ss1_d),
3660 SH_PFC_PIN_GROUP(msiof2_ss2_d),
3661 SH_PFC_PIN_GROUP(msiof2_rx_d),
3662 SH_PFC_PIN_GROUP(msiof2_tx_d),
3663 SH_PFC_PIN_GROUP(msiof2_clk_e),
3664 SH_PFC_PIN_GROUP(msiof2_sync_e),
3665 SH_PFC_PIN_GROUP(msiof2_rx_e),
3666 SH_PFC_PIN_GROUP(msiof2_tx_e),
3249 SH_PFC_PIN_GROUP(qspi_ctrl), 3667 SH_PFC_PIN_GROUP(qspi_ctrl),
3250 SH_PFC_PIN_GROUP(qspi_data2), 3668 SH_PFC_PIN_GROUP(qspi_data2),
3251 SH_PFC_PIN_GROUP(qspi_data4), 3669 SH_PFC_PIN_GROUP(qspi_data4),
@@ -3471,6 +3889,18 @@ static const char * const msiof0_groups[] = {
3471 "msiof0_ss2", 3889 "msiof0_ss2",
3472 "msiof0_rx", 3890 "msiof0_rx",
3473 "msiof0_tx", 3891 "msiof0_tx",
3892 "msiof0_clk_b",
3893 "msiof0_sync_b",
3894 "msiof0_ss1_b",
3895 "msiof0_ss2_b",
3896 "msiof0_rx_b",
3897 "msiof0_tx_b",
3898 "msiof0_clk_c",
3899 "msiof0_sync_c",
3900 "msiof0_ss1_c",
3901 "msiof0_ss2_c",
3902 "msiof0_rx_c",
3903 "msiof0_tx_c",
3474}; 3904};
3475 3905
3476static const char * const msiof1_groups[] = { 3906static const char * const msiof1_groups[] = {
@@ -3480,6 +3910,25 @@ static const char * const msiof1_groups[] = {
3480 "msiof1_ss2", 3910 "msiof1_ss2",
3481 "msiof1_rx", 3911 "msiof1_rx",
3482 "msiof1_tx", 3912 "msiof1_tx",
3913 "msiof1_clk_b",
3914 "msiof1_sync_b",
3915 "msiof1_ss1_b",
3916 "msiof1_ss2_b",
3917 "msiof1_rx_b",
3918 "msiof1_tx_b",
3919 "msiof1_clk_c",
3920 "msiof1_sync_c",
3921 "msiof1_rx_c",
3922 "msiof1_tx_c",
3923 "msiof1_clk_d",
3924 "msiof1_sync_d",
3925 "msiof1_ss1_d",
3926 "msiof1_rx_d",
3927 "msiof1_tx_d",
3928 "msiof1_clk_e",
3929 "msiof1_sync_e",
3930 "msiof1_rx_e",
3931 "msiof1_tx_e",
3483}; 3932};
3484 3933
3485static const char * const msiof2_groups[] = { 3934static const char * const msiof2_groups[] = {
@@ -3489,6 +3938,26 @@ static const char * const msiof2_groups[] = {
3489 "msiof2_ss2", 3938 "msiof2_ss2",
3490 "msiof2_rx", 3939 "msiof2_rx",
3491 "msiof2_tx", 3940 "msiof2_tx",
3941 "msiof2_clk_b",
3942 "msiof2_sync_b",
3943 "msiof2_ss1_b",
3944 "msiof2_ss2_b",
3945 "msiof2_rx_b",
3946 "msiof2_tx_b",
3947 "msiof2_clk_c",
3948 "msiof2_sync_c",
3949 "msiof2_rx_c",
3950 "msiof2_tx_c",
3951 "msiof2_clk_d",
3952 "msiof2_sync_d",
3953 "msiof2_ss1_d",
3954 "msiof2_ss2_d",
3955 "msiof2_rx_d",
3956 "msiof2_tx_d",
3957 "msiof2_clk_e",
3958 "msiof2_sync_e",
3959 "msiof2_rx_e",
3960 "msiof2_tx_e",
3492}; 3961};
3493 3962
3494static const char * const qspi_groups[] = { 3963static const char * const qspi_groups[] = {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 18:56:19 -0500