diff options
author | Valentine Barshak <valentine.barshak@cogentembedded.com> | 2013-12-10 13:20:25 -0500 |
---|---|---|
committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-12-10 14:42:36 -0500 |
commit | 317a03a9cb925a5566b852dff85f6aaa4aff7e3e (patch) | |
tree | 14940fc055fc19f9122df034f76e89d119bb32c5 /drivers/pinctrl/sh-pfc/pfc-r8a7790.c | |
parent | 64fe8abc7336e17f977bb38c4c261d24bfc5da17 (diff) |
pinctrl: sh-pfc: pfc-r8a7790: Add missing VIN1 pins
Both VIN0 and VIN1 channels support identical input interfaces.
Add missing VIN1 pins here and organize them in the same pin
groups as VIN0.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7790.c')
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 112 |
1 files changed, 104 insertions, 8 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 11e12d61de9b..2194ea6374ca 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c | |||
@@ -3360,15 +3360,91 @@ static const unsigned int vin0_clk_mux[] = { | |||
3360 | VI0_CLK_MARK, | 3360 | VI0_CLK_MARK, |
3361 | }; | 3361 | }; |
3362 | /* - VIN1 ------------------------------------------------------------------- */ | 3362 | /* - VIN1 ------------------------------------------------------------------- */ |
3363 | static const unsigned int vin1_data_pins[] = { | 3363 | static const union vin_data vin1_data_pins = { |
3364 | RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), | 3364 | .data24 = { |
3365 | RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15), | 3365 | /* B */ |
3366 | RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), | ||
3367 | RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), | ||
3368 | RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15), | ||
3369 | RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), | ||
3370 | /* G */ | ||
3371 | RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 15), | ||
3372 | RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), | ||
3373 | RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), | ||
3374 | RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), | ||
3375 | /* R */ | ||
3376 | RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28), | ||
3377 | RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), | ||
3378 | RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), | ||
3379 | RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), | ||
3380 | }, | ||
3381 | }; | ||
3382 | static const union vin_data vin1_data_mux = { | ||
3383 | .data24 = { | ||
3384 | /* B */ | ||
3385 | VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, | ||
3386 | VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK, | ||
3387 | VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK, | ||
3388 | VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK, | ||
3389 | /* G */ | ||
3390 | VI1_G0_MARK, VI1_G1_MARK, | ||
3391 | VI1_G2_MARK, VI1_G3_MARK, | ||
3392 | VI1_G4_MARK, VI1_G5_MARK, | ||
3393 | VI1_G6_MARK, VI1_G7_MARK, | ||
3394 | /* R */ | ||
3395 | VI1_R0_MARK, VI1_R1_MARK, | ||
3396 | VI1_R2_MARK, VI1_R3_MARK, | ||
3397 | VI1_R4_MARK, VI1_R5_MARK, | ||
3398 | VI1_R6_MARK, VI1_R7_MARK, | ||
3399 | }, | ||
3400 | }; | ||
3401 | static const unsigned int vin1_data18_pins[] = { | ||
3402 | /* B */ | ||
3403 | RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13), | ||
3404 | RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15), | ||
3366 | RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), | 3405 | RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17), |
3406 | /* G */ | ||
3407 | RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 20), | ||
3408 | RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 12), | ||
3409 | RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 7), | ||
3410 | /* R */ | ||
3411 | RCAR_GP_PIN(0, 29), RCAR_GP_PIN(1, 4), | ||
3412 | RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), | ||
3413 | RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 8), | ||
3367 | }; | 3414 | }; |
3368 | static const unsigned int vin1_data_mux[] = { | 3415 | static const unsigned int vin1_data18_mux[] = { |
3369 | VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, VI1_DATA2_VI1_B2_MARK, | 3416 | /* B */ |
3370 | VI1_DATA3_VI1_B3_MARK, VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK, | 3417 | VI1_DATA2_VI1_B2_MARK, VI1_DATA3_VI1_B3_MARK, |
3418 | VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK, | ||
3371 | VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK, | 3419 | VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK, |
3420 | /* G */ | ||
3421 | VI1_G2_MARK, VI1_G3_MARK, | ||
3422 | VI1_G4_MARK, VI1_G5_MARK, | ||
3423 | VI1_G6_MARK, VI1_G7_MARK, | ||
3424 | /* R */ | ||
3425 | VI1_R2_MARK, VI1_R3_MARK, | ||
3426 | VI1_R4_MARK, VI1_R5_MARK, | ||
3427 | VI1_R6_MARK, VI1_R7_MARK, | ||
3428 | }; | ||
3429 | static const unsigned int vin1_sync_pins[] = { | ||
3430 | RCAR_GP_PIN(1, 24), /* HSYNC */ | ||
3431 | RCAR_GP_PIN(1, 25), /* VSYNC */ | ||
3432 | }; | ||
3433 | static const unsigned int vin1_sync_mux[] = { | ||
3434 | VI1_HSYNC_N_MARK, | ||
3435 | VI1_VSYNC_N_MARK, | ||
3436 | }; | ||
3437 | static const unsigned int vin1_field_pins[] = { | ||
3438 | RCAR_GP_PIN(1, 13), | ||
3439 | }; | ||
3440 | static const unsigned int vin1_field_mux[] = { | ||
3441 | VI1_FIELD_MARK, | ||
3442 | }; | ||
3443 | static const unsigned int vin1_clkenb_pins[] = { | ||
3444 | RCAR_GP_PIN(1, 26), | ||
3445 | }; | ||
3446 | static const unsigned int vin1_clkenb_mux[] = { | ||
3447 | VI1_CLKENB_MARK, | ||
3372 | }; | 3448 | }; |
3373 | static const unsigned int vin1_clk_pins[] = { | 3449 | static const unsigned int vin1_clk_pins[] = { |
3374 | RCAR_GP_PIN(2, 9), | 3450 | RCAR_GP_PIN(2, 9), |
@@ -3595,7 +3671,17 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { | |||
3595 | SH_PFC_PIN_GROUP(vin0_field), | 3671 | SH_PFC_PIN_GROUP(vin0_field), |
3596 | SH_PFC_PIN_GROUP(vin0_clkenb), | 3672 | SH_PFC_PIN_GROUP(vin0_clkenb), |
3597 | SH_PFC_PIN_GROUP(vin0_clk), | 3673 | SH_PFC_PIN_GROUP(vin0_clk), |
3598 | SH_PFC_PIN_GROUP(vin1_data), | 3674 | VIN_DATA_PIN_GROUP(vin1_data, 24), |
3675 | VIN_DATA_PIN_GROUP(vin1_data, 20), | ||
3676 | SH_PFC_PIN_GROUP(vin1_data18), | ||
3677 | VIN_DATA_PIN_GROUP(vin1_data, 16), | ||
3678 | VIN_DATA_PIN_GROUP(vin1_data, 12), | ||
3679 | VIN_DATA_PIN_GROUP(vin1_data, 10), | ||
3680 | VIN_DATA_PIN_GROUP(vin1_data, 8), | ||
3681 | VIN_DATA_PIN_GROUP(vin1_data, 4), | ||
3682 | SH_PFC_PIN_GROUP(vin1_sync), | ||
3683 | SH_PFC_PIN_GROUP(vin1_field), | ||
3684 | SH_PFC_PIN_GROUP(vin1_clkenb), | ||
3599 | SH_PFC_PIN_GROUP(vin1_clk), | 3685 | SH_PFC_PIN_GROUP(vin1_clk), |
3600 | }; | 3686 | }; |
3601 | 3687 | ||
@@ -3928,7 +4014,17 @@ static const char * const vin0_groups[] = { | |||
3928 | }; | 4014 | }; |
3929 | 4015 | ||
3930 | static const char * const vin1_groups[] = { | 4016 | static const char * const vin1_groups[] = { |
3931 | "vin1_data", | 4017 | "vin1_data24", |
4018 | "vin1_data20", | ||
4019 | "vin1_data18", | ||
4020 | "vin1_data16", | ||
4021 | "vin1_data12", | ||
4022 | "vin1_data10", | ||
4023 | "vin1_data8", | ||
4024 | "vin1_data4", | ||
4025 | "vin1_sync", | ||
4026 | "vin1_field", | ||
4027 | "vin1_clkenb", | ||
3932 | "vin1_clk", | 4028 | "vin1_clk", |
3933 | }; | 4029 | }; |
3934 | 4030 | ||