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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-20 12:23:30 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-20 12:23:30 -0500
commit8a3a11f91def34424b1995cb54ccd658efde8568 (patch)
tree6b97487ffea8cb7d8c280bb88fd681335f91cf73 /drivers/pinctrl/pinctrl-tegra.c
parent8909ff652ddfc83ecdf450f96629c25489d88f77 (diff)
parentade158eb53eed40f6090e9f7ee6ee3513ec1eec4 (diff)
Merge tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pinctrl changes from Linus Walleij: "These are the main pinctrl changes for the v3.9 merge window. The most interesting change by far is how the device core grabs pinctrl default handles avoiding the need to stick boilerplate into driver consumers. - Grabbing of default pinctrl handles from the device core. These are the hunks hitting drivers/base. All is ACKed by Greg, after a long discussion about different alternatives. - Some stuff also touches the MFD and ARM SoC trees, this has been coordinated and ACKed. - New drivers for: - The Tegra 114 sub-SoC - Allwinner sunxi - New ABx500 driver and sub-SoC drivers for AB8500, AB8505, AB9540 and AB8540. - Make it possible for hogged pins to enter a sleep mode, and make it possible for drivers to control that mode. - Various clean-up, extensions and device tree support to various pin controllers." * tag 'pinctrl-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (68 commits) pinctrl: tegra: add clfvs function to Tegra114 support pinctrl: generic: rename input schmitt disable pinctrl/pinconfig: add debug interface pinctrl: samsung: remove duplicated line ARM: ux500: use real AB8500 IRQ numbers instead of virtual ones ARM: ux500: remove irq_base property from platform_data pinctrl/abx500: use direct IRQ defines pinctrl/abx500: replace IRQ offsets with table read-in values pinctrl/abx500: move IRQ handling to ab8500-core pinctrl: exynos5440: remove erroneous __init pinctrl/abx500: adjust offset for get_mode() pinctrl/abx500: add Device Tree support pinctrl/abx500: align GPIO cluster boundaries pinctrl/abx500: prevent error path from corrupting returning error pinctrl: sunxi: add of_xlate function pinctrl/lantiq: fix pin number in ltq_pmx_gpio_request_enable pinctrl/lantiq: add functionality to falcon_pinconf_dbg_show pinctrl/lantiq: fix pinconfig parameters pinctrl/lantiq: one of the boot leds was defined incorrectly pinctrl/lantiq: only probe available pad controllers ...
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra.c')
-rw-r--r--drivers/pinctrl/pinctrl-tegra.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c
index ae1e4bb3259d..f195d77a3572 100644
--- a/drivers/pinctrl/pinctrl-tegra.c
+++ b/drivers/pinctrl/pinctrl-tegra.c
@@ -201,6 +201,7 @@ static const struct cfg_param {
201 {"nvidia,open-drain", TEGRA_PINCONF_PARAM_OPEN_DRAIN}, 201 {"nvidia,open-drain", TEGRA_PINCONF_PARAM_OPEN_DRAIN},
202 {"nvidia,lock", TEGRA_PINCONF_PARAM_LOCK}, 202 {"nvidia,lock", TEGRA_PINCONF_PARAM_LOCK},
203 {"nvidia,io-reset", TEGRA_PINCONF_PARAM_IORESET}, 203 {"nvidia,io-reset", TEGRA_PINCONF_PARAM_IORESET},
204 {"nvidia,rcv-sel", TEGRA_PINCONF_PARAM_RCV_SEL},
204 {"nvidia,high-speed-mode", TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE}, 205 {"nvidia,high-speed-mode", TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},
205 {"nvidia,schmitt", TEGRA_PINCONF_PARAM_SCHMITT}, 206 {"nvidia,schmitt", TEGRA_PINCONF_PARAM_SCHMITT},
206 {"nvidia,low-power-mode", TEGRA_PINCONF_PARAM_LOW_POWER_MODE}, 207 {"nvidia,low-power-mode", TEGRA_PINCONF_PARAM_LOW_POWER_MODE},
@@ -208,6 +209,7 @@ static const struct cfg_param {
208 {"nvidia,pull-up-strength", TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH}, 209 {"nvidia,pull-up-strength", TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH},
209 {"nvidia,slew-rate-falling", TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING}, 210 {"nvidia,slew-rate-falling", TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
210 {"nvidia,slew-rate-rising", TEGRA_PINCONF_PARAM_SLEW_RATE_RISING}, 211 {"nvidia,slew-rate-rising", TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
212 {"nvidia,drive-type", TEGRA_PINCONF_PARAM_DRIVE_TYPE},
211}; 213};
212 214
213static int tegra_pinctrl_dt_subnode_to_map(struct device *dev, 215static int tegra_pinctrl_dt_subnode_to_map(struct device *dev,
@@ -450,6 +452,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
450 *bit = g->ioreset_bit; 452 *bit = g->ioreset_bit;
451 *width = 1; 453 *width = 1;
452 break; 454 break;
455 case TEGRA_PINCONF_PARAM_RCV_SEL:
456 *bank = g->rcv_sel_bank;
457 *reg = g->rcv_sel_reg;
458 *bit = g->rcv_sel_bit;
459 *width = 1;
460 break;
453 case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE: 461 case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE:
454 *bank = g->drv_bank; 462 *bank = g->drv_bank;
455 *reg = g->drv_reg; 463 *reg = g->drv_reg;
@@ -492,6 +500,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
492 *bit = g->slwr_bit; 500 *bit = g->slwr_bit;
493 *width = g->slwr_width; 501 *width = g->slwr_width;
494 break; 502 break;
503 case TEGRA_PINCONF_PARAM_DRIVE_TYPE:
504 *bank = g->drvtype_bank;
505 *reg = g->drvtype_reg;
506 *bit = g->drvtype_bit;
507 *width = 2;
508 break;
495 default: 509 default:
496 dev_err(pmx->dev, "Invalid config param %04x\n", param); 510 dev_err(pmx->dev, "Invalid config param %04x\n", param);
497 return -ENOTSUPP; 511 return -ENOTSUPP;