diff options
author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-03-06 10:12:45 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-03-07 03:05:14 -0500 |
commit | ee341a99de7386434a0d5cf4bc4329c3ab972a13 (patch) | |
tree | 2012f1bf2c2eb20947f380f13768dc71df173898 /drivers/pinctrl/pinctrl-sunxi.c | |
parent | b5f50bf923edfb1ab1dc3620db90989d5a9dafa5 (diff) |
pinctrl: sunxi: Add Allwinner A13 pin functions
The initial driver contained only a limited set of pins functions
because we lacked of documentation on it.
Now that we have such documentation, finish to fill the array.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-sunxi.c')
-rw-r--r-- | drivers/pinctrl/pinctrl-sunxi.c | 239 |
1 files changed, 169 insertions, 70 deletions
diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c index 74f6d59790fe..cb491d6ba601 100644 --- a/drivers/pinctrl/pinctrl-sunxi.c +++ b/drivers/pinctrl/pinctrl-sunxi.c | |||
@@ -988,216 +988,305 @@ static const struct sunxi_desc_pin sun5i_a13_pins[] = { | |||
988 | /* Hole */ | 988 | /* Hole */ |
989 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0, | 989 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0, |
990 | SUNXI_FUNCTION(0x0, "gpio_in"), | 990 | SUNXI_FUNCTION(0x0, "gpio_in"), |
991 | SUNXI_FUNCTION(0x1, "gpio_out")), | 991 | SUNXI_FUNCTION(0x1, "gpio_out"), |
992 | SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ | ||
992 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB1, | 993 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB1, |
993 | SUNXI_FUNCTION(0x0, "gpio_in"), | 994 | SUNXI_FUNCTION(0x0, "gpio_in"), |
994 | SUNXI_FUNCTION(0x1, "gpio_out")), | 995 | SUNXI_FUNCTION(0x1, "gpio_out"), |
996 | SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ | ||
995 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB2, | 997 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB2, |
996 | SUNXI_FUNCTION(0x0, "gpio_in"), | 998 | SUNXI_FUNCTION(0x0, "gpio_in"), |
997 | SUNXI_FUNCTION(0x1, "gpio_out")), | 999 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1000 | SUNXI_FUNCTION(0x2, "pwm")), | ||
998 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB3, | 1001 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB3, |
999 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1002 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1000 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1003 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1004 | SUNXI_FUNCTION(0x2, "ir0")), /* TX */ | ||
1001 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB4, | 1005 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB4, |
1002 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1006 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1003 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1007 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1008 | SUNXI_FUNCTION(0x2, "ir0")), /* RX */ | ||
1004 | /* Hole */ | 1009 | /* Hole */ |
1005 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB10, | 1010 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB10, |
1006 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1011 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1007 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1012 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1013 | SUNXI_FUNCTION(0x2, "spi2")), /* CS1 */ | ||
1008 | /* Hole */ | 1014 | /* Hole */ |
1009 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB15, | 1015 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB15, |
1010 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1016 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1011 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1017 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1018 | SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ | ||
1012 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB16, | 1019 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB16, |
1013 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1020 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1014 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1021 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1022 | SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ | ||
1015 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB17, | 1023 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB17, |
1016 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1024 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1017 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1025 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1026 | SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */ | ||
1018 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB18, | 1027 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PB18, |
1019 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1028 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1020 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1029 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1030 | SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */ | ||
1021 | /* Hole */ | 1031 | /* Hole */ |
1022 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC0, | 1032 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC0, |
1023 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1033 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1024 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1034 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1035 | SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ | ||
1036 | SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ | ||
1025 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC1, | 1037 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC1, |
1026 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1038 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1027 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1039 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1040 | SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ | ||
1041 | SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ | ||
1028 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC2, | 1042 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC2, |
1029 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1043 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1030 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1044 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1045 | SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ | ||
1046 | SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ | ||
1031 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC3, | 1047 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC3, |
1032 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1048 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1033 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1049 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1050 | SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */ | ||
1051 | SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ | ||
1034 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC4, | 1052 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC4, |
1035 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1053 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1036 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1054 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1055 | SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ | ||
1037 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC5, | 1056 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC5, |
1038 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1057 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1039 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1058 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1059 | SUNXI_FUNCTION(0x2, "nand0")), /* NRE */ | ||
1040 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC6, | 1060 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC6, |
1041 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1061 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1042 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1062 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1063 | SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ | ||
1064 | SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ | ||
1043 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC7, | 1065 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC7, |
1044 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1066 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1045 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1067 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1068 | SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */ | ||
1069 | SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ | ||
1046 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC8, | 1070 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC8, |
1047 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1071 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1048 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1072 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1073 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ | ||
1074 | SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ | ||
1049 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC9, | 1075 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC9, |
1050 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1076 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1051 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1077 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1078 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ | ||
1079 | SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ | ||
1052 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC10, | 1080 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC10, |
1053 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1081 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1054 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1082 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1083 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ | ||
1084 | SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ | ||
1055 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC11, | 1085 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC11, |
1056 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1086 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1057 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1087 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1088 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ | ||
1089 | SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ | ||
1058 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC12, | 1090 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC12, |
1059 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1091 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1060 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1092 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1093 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ | ||
1094 | SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ | ||
1061 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC13, | 1095 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC13, |
1062 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1096 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1063 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1097 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1098 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ | ||
1099 | SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ | ||
1064 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC14, | 1100 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC14, |
1065 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1101 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1066 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1102 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1103 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ | ||
1104 | SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ | ||
1067 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC15, | 1105 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC15, |
1068 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1106 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1069 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1107 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1108 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ | ||
1109 | SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ | ||
1070 | /* Hole */ | 1110 | /* Hole */ |
1071 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC19, | 1111 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PC19, |
1072 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1112 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1073 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1113 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1114 | SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */ | ||
1115 | SUNXI_FUNCTION(0x4, "uart3")), /* RTS */ | ||
1074 | /* Hole */ | 1116 | /* Hole */ |
1075 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD2, | 1117 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD2, |
1076 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1118 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1077 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1119 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1120 | SUNXI_FUNCTION(0x2, "lcd0")), /* D2 */ | ||
1078 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD3, | 1121 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD3, |
1079 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1122 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1080 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1123 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1124 | SUNXI_FUNCTION(0x2, "lcd0")), /* D3 */ | ||
1081 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD4, | 1125 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD4, |
1082 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1126 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1083 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1127 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1128 | SUNXI_FUNCTION(0x2, "lcd0")), /* D4 */ | ||
1084 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD5, | 1129 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD5, |
1085 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1130 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1086 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1131 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1132 | SUNXI_FUNCTION(0x2, "lcd0")), /* D5 */ | ||
1087 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD6, | 1133 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD6, |
1088 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1134 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1089 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1135 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1136 | SUNXI_FUNCTION(0x2, "lcd0")), /* D6 */ | ||
1090 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD7, | 1137 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD7, |
1091 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1138 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1092 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1139 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1140 | SUNXI_FUNCTION(0x2, "lcd0")), /* D7 */ | ||
1093 | /* Hole */ | 1141 | /* Hole */ |
1094 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD10, | 1142 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD10, |
1095 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1143 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1096 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1144 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1145 | SUNXI_FUNCTION(0x2, "lcd0")), /* D10 */ | ||
1097 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD11, | 1146 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD11, |
1098 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1147 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1099 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1148 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1149 | SUNXI_FUNCTION(0x2, "lcd0")), /* D11 */ | ||
1100 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD12, | 1150 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD12, |
1101 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1151 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1102 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1152 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1153 | SUNXI_FUNCTION(0x2, "lcd0")), /* D12 */ | ||
1103 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD13, | 1154 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD13, |
1104 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1155 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1105 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1156 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1157 | SUNXI_FUNCTION(0x2, "lcd0")), /* D13 */ | ||
1106 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD14, | 1158 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD14, |
1107 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1159 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1108 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1160 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1161 | SUNXI_FUNCTION(0x2, "lcd0")), /* D14 */ | ||
1109 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD15, | 1162 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD15, |
1110 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1163 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1111 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1164 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1165 | SUNXI_FUNCTION(0x2, "lcd0")), /* D15 */ | ||
1112 | /* Hole */ | 1166 | /* Hole */ |
1113 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD18, | 1167 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD18, |
1114 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1168 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1115 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1169 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1170 | SUNXI_FUNCTION(0x2, "lcd0")), /* D18 */ | ||
1116 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD19, | 1171 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD19, |
1117 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1172 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1118 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1173 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1174 | SUNXI_FUNCTION(0x2, "lcd0")), /* D19 */ | ||
1119 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD20, | 1175 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD20, |
1120 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1176 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1121 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1177 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1178 | SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */ | ||
1122 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD21, | 1179 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD21, |
1123 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1180 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1124 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1181 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1182 | SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */ | ||
1125 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD22, | 1183 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD22, |
1126 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1184 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1127 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1185 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1186 | SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */ | ||
1128 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD23, | 1187 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD23, |
1129 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1188 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1130 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1189 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1190 | SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */ | ||
1131 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD24, | 1191 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD24, |
1132 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1192 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1133 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1193 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1194 | SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */ | ||
1134 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD25, | 1195 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD25, |
1135 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1196 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1136 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1197 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1198 | SUNXI_FUNCTION(0x2, "lcd0")), /* DE */ | ||
1137 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD26, | 1199 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD26, |
1138 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1200 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1139 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1201 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1202 | SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */ | ||
1140 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD27, | 1203 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PD27, |
1141 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1204 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1142 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1205 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1206 | SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */ | ||
1143 | /* Hole */ | 1207 | /* Hole */ |
1144 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE0, | 1208 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE0, |
1145 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1209 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1146 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1210 | SUNXI_FUNCTION(0x3, "csi0"), /* PCLK */ |
1211 | SUNXI_FUNCTION(0x4, "spi2")), /* CS0 */ | ||
1147 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE1, | 1212 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE1, |
1148 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1213 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1149 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1214 | SUNXI_FUNCTION(0x3, "csi0"), /* MCLK */ |
1215 | SUNXI_FUNCTION(0x4, "spi2")), /* CLK */ | ||
1150 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE2, | 1216 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE2, |
1151 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1217 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1152 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1218 | SUNXI_FUNCTION(0x3, "csi0"), /* HSYNC */ |
1219 | SUNXI_FUNCTION(0x4, "spi2")), /* MOSI */ | ||
1153 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE3, | 1220 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE3, |
1154 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1221 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1155 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1222 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1223 | SUNXI_FUNCTION(0x3, "csi0"), /* VSYNC */ | ||
1224 | SUNXI_FUNCTION(0x4, "spi2")), /* MISO */ | ||
1156 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE4, | 1225 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE4, |
1157 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1226 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1158 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1227 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1228 | SUNXI_FUNCTION(0x3, "csi0"), /* D0 */ | ||
1229 | SUNXI_FUNCTION(0x4, "mmc2")), /* D0 */ | ||
1159 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE5, | 1230 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE5, |
1160 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1231 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1161 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1232 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1233 | SUNXI_FUNCTION(0x3, "csi0"), /* D1 */ | ||
1234 | SUNXI_FUNCTION(0x4, "mmc2")), /* D1 */ | ||
1162 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE6, | 1235 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE6, |
1163 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1236 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1164 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1237 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1238 | SUNXI_FUNCTION(0x3, "csi0"), /* D2 */ | ||
1239 | SUNXI_FUNCTION(0x4, "mmc2")), /* D2 */ | ||
1165 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE7, | 1240 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE7, |
1166 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1241 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1167 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1242 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1243 | SUNXI_FUNCTION(0x3, "csi0"), /* D3 */ | ||
1244 | SUNXI_FUNCTION(0x4, "mmc2")), /* D3 */ | ||
1168 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE8, | 1245 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE8, |
1169 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1246 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1170 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1247 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1248 | SUNXI_FUNCTION(0x3, "csi0"), /* D4 */ | ||
1249 | SUNXI_FUNCTION(0x4, "mmc2")), /* CMD */ | ||
1171 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE9, | 1250 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE9, |
1172 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1251 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1173 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1252 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1253 | SUNXI_FUNCTION(0x3, "csi0"), /* D5 */ | ||
1254 | SUNXI_FUNCTION(0x4, "mmc2")), /* CLK */ | ||
1174 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE10, | 1255 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE10, |
1175 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1256 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1176 | SUNXI_FUNCTION(0x1, "gpio_out"), | 1257 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1258 | SUNXI_FUNCTION(0x3, "csi0"), /* D6 */ | ||
1177 | SUNXI_FUNCTION(0x4, "uart1")), /* TX */ | 1259 | SUNXI_FUNCTION(0x4, "uart1")), /* TX */ |
1178 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE11, | 1260 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PE11, |
1179 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1261 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1180 | SUNXI_FUNCTION(0x1, "gpio_out"), | 1262 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1263 | SUNXI_FUNCTION(0x3, "csi0"), /* D7 */ | ||
1181 | SUNXI_FUNCTION(0x4, "uart1")), /* RX */ | 1264 | SUNXI_FUNCTION(0x4, "uart1")), /* RX */ |
1182 | /* Hole */ | 1265 | /* Hole */ |
1183 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0, | 1266 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0, |
1184 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1267 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1185 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1268 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1269 | SUNXI_FUNCTION(0x4, "mmc0")), /* D1 */ | ||
1186 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1, | 1270 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1, |
1187 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1271 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1188 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1272 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1273 | SUNXI_FUNCTION(0x4, "mmc0")), /* D0 */ | ||
1189 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2, | 1274 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2, |
1190 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1275 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1191 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1276 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1277 | SUNXI_FUNCTION(0x4, "mmc0")), /* CLK */ | ||
1192 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3, | 1278 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3, |
1193 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1279 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1194 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1280 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1281 | SUNXI_FUNCTION(0x4, "mmc0")), /* CMD */ | ||
1195 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4, | 1282 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4, |
1196 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1283 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1197 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1284 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1285 | SUNXI_FUNCTION(0x4, "mmc0")), /* D3 */ | ||
1198 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5, | 1286 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5, |
1199 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1287 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1200 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1288 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1289 | SUNXI_FUNCTION(0x4, "mmc0")), /* D2 */ | ||
1201 | /* Hole */ | 1290 | /* Hole */ |
1202 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0, | 1291 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0, |
1203 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1292 | SUNXI_FUNCTION(0x0, "gpio_in"), |
@@ -1211,24 +1300,34 @@ static const struct sunxi_desc_pin sun5i_a13_pins[] = { | |||
1211 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG3, | 1300 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG3, |
1212 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1301 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1213 | SUNXI_FUNCTION(0x1, "gpio_out"), | 1302 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1303 | SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ | ||
1214 | SUNXI_FUNCTION(0x4, "uart1")), /* TX */ | 1304 | SUNXI_FUNCTION(0x4, "uart1")), /* TX */ |
1215 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG4, | 1305 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG4, |
1216 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1306 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1217 | SUNXI_FUNCTION(0x1, "gpio_out"), | 1307 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1308 | SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ | ||
1218 | SUNXI_FUNCTION(0x4, "uart1")), /* RX */ | 1309 | SUNXI_FUNCTION(0x4, "uart1")), /* RX */ |
1219 | /* Hole */ | 1310 | /* Hole */ |
1220 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG9, | 1311 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG9, |
1221 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1312 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1222 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1313 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1314 | SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ | ||
1315 | SUNXI_FUNCTION(0x3, "uart3")), /* TX */ | ||
1223 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG10, | 1316 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG10, |
1224 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1317 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1225 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1318 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1319 | SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ | ||
1320 | SUNXI_FUNCTION(0x3, "uart3")), /* RX */ | ||
1226 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG11, | 1321 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG11, |
1227 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1322 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1228 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1323 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1324 | SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ | ||
1325 | SUNXI_FUNCTION(0x3, "uart3")), /* CTS */ | ||
1229 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG12, | 1326 | SUNXI_PIN(SUNXI_PINCTRL_PIN_PG12, |
1230 | SUNXI_FUNCTION(0x0, "gpio_in"), | 1327 | SUNXI_FUNCTION(0x0, "gpio_in"), |
1231 | SUNXI_FUNCTION(0x1, "gpio_out")), | 1328 | SUNXI_FUNCTION(0x1, "gpio_out"), |
1329 | SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ | ||
1330 | SUNXI_FUNCTION(0x3, "uart3")), /* RTS */ | ||
1232 | }; | 1331 | }; |
1233 | 1332 | ||
1234 | static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = { | 1333 | static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = { |