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authorTomasz Figa <t.figa@samsung.com>2012-10-11 04:11:17 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-10-15 03:10:12 -0400
commitd3a7b9e3a168df881a0ae3bd0d582f44a5d5aca3 (patch)
treea6942be03dde1b58d2fe49f3c246f97ed3739d93 /drivers/pinctrl/pinctrl-samsung.h
parent595be7268a85735d229451821b56f122d09d7bdc (diff)
pinctrl: samsung: Use one GPIO chip per pin bank
This patch modifies the pinctrl-samsung driver to register one GPIO chip per pin bank, instead of a single chip for all pin banks of the controller. It simplifies GPIO accesses a lot (constant time instead of looping through the list of banks to find the right one) and should have a good effect on performance of any bit-banging driver. In addition it allows to reference GPIO pins by a phandle to the bank node and a local pin offset inside of the bank (similar to previous gpiolib driver), which is more clear and readable than using indices relative to the whole pin controller. Example: device { /* ... */ gpios = <&gpk0 4 0>; /* ... */ }; Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-samsung.h')
-rw-r--r--drivers/pinctrl/pinctrl-samsung.h11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/pinctrl/pinctrl-samsung.h b/drivers/pinctrl/pinctrl-samsung.h
index e56be22302cd..dac40ffd5e67 100644
--- a/drivers/pinctrl/pinctrl-samsung.h
+++ b/drivers/pinctrl/pinctrl-samsung.h
@@ -23,6 +23,8 @@
23#include <linux/pinctrl/consumer.h> 23#include <linux/pinctrl/consumer.h>
24#include <linux/pinctrl/machine.h> 24#include <linux/pinctrl/machine.h>
25 25
26#include <linux/gpio.h>
27
26/* register offsets within a pin bank */ 28/* register offsets within a pin bank */
27#define DAT_REG 0x4 29#define DAT_REG 0x4
28#define PUD_REG 0x8 30#define PUD_REG 0x8
@@ -113,6 +115,8 @@ struct samsung_pinctrl_drv_data;
113 * @of_node: OF node of the bank. 115 * @of_node: OF node of the bank.
114 * @drvdata: link to controller driver data 116 * @drvdata: link to controller driver data
115 * @irq_domain: IRQ domain of the bank. 117 * @irq_domain: IRQ domain of the bank.
118 * @gpio_chip: GPIO chip of the bank.
119 * @grange: linux gpio pin range supported by this bank.
116 */ 120 */
117struct samsung_pin_bank { 121struct samsung_pin_bank {
118 u32 pctl_offset; 122 u32 pctl_offset;
@@ -129,6 +133,8 @@ struct samsung_pin_bank {
129 struct device_node *of_node; 133 struct device_node *of_node;
130 struct samsung_pinctrl_drv_data *drvdata; 134 struct samsung_pinctrl_drv_data *drvdata;
131 struct irq_domain *irq_domain; 135 struct irq_domain *irq_domain;
136 struct gpio_chip gpio_chip;
137 struct pinctrl_gpio_range grange;
132}; 138};
133 139
134/** 140/**
@@ -186,8 +192,6 @@ struct samsung_pin_ctrl {
186 * @nr_groups: number of such pin groups. 192 * @nr_groups: number of such pin groups.
187 * @pmx_functions: list of pin functions available to the driver. 193 * @pmx_functions: list of pin functions available to the driver.
188 * @nr_function: number of such pin functions. 194 * @nr_function: number of such pin functions.
189 * @gc: gpio_chip instance registered with gpiolib.
190 * @grange: linux gpio pin range supported by this controller.
191 */ 195 */
192struct samsung_pinctrl_drv_data { 196struct samsung_pinctrl_drv_data {
193 void __iomem *virt_base; 197 void __iomem *virt_base;
@@ -204,9 +208,6 @@ struct samsung_pinctrl_drv_data {
204 unsigned int nr_functions; 208 unsigned int nr_functions;
205 209
206 struct irq_domain *wkup_irqd; 210 struct irq_domain *wkup_irqd;
207
208 struct gpio_chip *gc;
209 struct pinctrl_gpio_range grange;
210}; 211};
211 212
212/** 213/**