diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2012-04-28 01:00:50 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2012-05-01 19:18:27 -0400 |
commit | 17723111e64fbcc327846ff0b33532bcf1d40f56 (patch) | |
tree | 08b6f0609a59dab9f47a59ee339c54b4170405b2 /drivers/pinctrl/pinctrl-mxs.h | |
parent | d8fe35727a3c7e0f2c4ff0a579aab1d7ce252df8 (diff) |
pinctrl: add pinctrl-mxs support
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28.
The driver supports device tree probe only.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-mxs.h')
-rw-r--r-- | drivers/pinctrl/pinctrl-mxs.h | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-mxs.h b/drivers/pinctrl/pinctrl-mxs.h new file mode 100644 index 000000000000..fdd88d0bae22 --- /dev/null +++ b/drivers/pinctrl/pinctrl-mxs.h | |||
@@ -0,0 +1,91 @@ | |||
1 | /* | ||
2 | * Copyright 2012 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * The code contained herein is licensed under the GNU General Public | ||
5 | * License. You may obtain a copy of the GNU General Public License | ||
6 | * Version 2 or later at the following locations: | ||
7 | * | ||
8 | * http://www.opensource.org/licenses/gpl-license.html | ||
9 | * http://www.gnu.org/copyleft/gpl.html | ||
10 | */ | ||
11 | |||
12 | #ifndef __PINCTRL_MXS_H | ||
13 | #define __PINCTRL_MXS_H | ||
14 | |||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/pinctrl/pinctrl.h> | ||
17 | |||
18 | #define SET 0x4 | ||
19 | #define CLR 0x8 | ||
20 | #define TOG 0xc | ||
21 | |||
22 | #define MXS_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) | ||
23 | #define PINID(bank, pin) ((bank) * 32 + (pin)) | ||
24 | |||
25 | /* | ||
26 | * pinmux-id bit field definitions | ||
27 | * | ||
28 | * bank: 15..12 (4) | ||
29 | * pin: 11..4 (8) | ||
30 | * muxsel: 3..0 (4) | ||
31 | */ | ||
32 | #define MUXID_TO_PINID(m) PINID((m) >> 12 & 0xf, (m) >> 4 & 0xff) | ||
33 | #define MUXID_TO_MUXSEL(m) ((m) & 0xf) | ||
34 | |||
35 | #define PINID_TO_BANK(p) ((p) >> 5) | ||
36 | #define PINID_TO_PIN(p) ((p) % 32) | ||
37 | |||
38 | /* | ||
39 | * pin config bit field definitions | ||
40 | * | ||
41 | * pull-up: 6..5 (2) | ||
42 | * voltage: 4..3 (2) | ||
43 | * mA: 2..0 (3) | ||
44 | * | ||
45 | * MSB of each field is presence bit for the config. | ||
46 | */ | ||
47 | #define PULL_PRESENT (1 << 6) | ||
48 | #define PULL_SHIFT 5 | ||
49 | #define VOL_PRESENT (1 << 4) | ||
50 | #define VOL_SHIFT 3 | ||
51 | #define MA_PRESENT (1 << 2) | ||
52 | #define MA_SHIFT 0 | ||
53 | #define CONFIG_TO_PULL(c) ((c) >> PULL_SHIFT & 0x1) | ||
54 | #define CONFIG_TO_VOL(c) ((c) >> VOL_SHIFT & 0x1) | ||
55 | #define CONFIG_TO_MA(c) ((c) >> MA_SHIFT & 0x3) | ||
56 | |||
57 | struct mxs_function { | ||
58 | const char *name; | ||
59 | const char **groups; | ||
60 | unsigned ngroups; | ||
61 | }; | ||
62 | |||
63 | struct mxs_group { | ||
64 | const char *name; | ||
65 | unsigned int *pins; | ||
66 | unsigned npins; | ||
67 | u8 *muxsel; | ||
68 | u8 config; | ||
69 | }; | ||
70 | |||
71 | struct mxs_regs { | ||
72 | u16 muxsel; | ||
73 | u16 drive; | ||
74 | u16 pull; | ||
75 | }; | ||
76 | |||
77 | struct mxs_pinctrl_soc_data { | ||
78 | const struct mxs_regs *regs; | ||
79 | const struct pinctrl_pin_desc *pins; | ||
80 | unsigned npins; | ||
81 | struct mxs_function *functions; | ||
82 | unsigned nfunctions; | ||
83 | struct mxs_group *groups; | ||
84 | unsigned ngroups; | ||
85 | }; | ||
86 | |||
87 | int mxs_pinctrl_probe(struct platform_device *pdev, | ||
88 | struct mxs_pinctrl_soc_data *soc); | ||
89 | int mxs_pinctrl_remove(struct platform_device *pdev); | ||
90 | |||
91 | #endif /* __PINCTRL_MXS_H */ | ||