pinctrl: imx: move hard-coding data into device tree

Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function.  Every time a new imx SoC support is
added, we need to add such a big mount of data.  With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.

With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.

The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.

As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

1 files changed, 7 insertions, 22 deletions

diff --git a/drivers/pinctrl/pinctrl-imx.h b/drivers/pinctrl/pinctrl-imx.h
index 9b65e7828f1d..607ef5497552 100644
--- a/drivers/pinctrl/pinctrl-imx.h
+++ b/drivers/pinctrl/pinctrl-imx.h
@@ -26,6 +26,10 @@ struct platform_device;
  *      elements in .pins so we can iterate over that array
  * @mux_mode: the mux mode for each pin in this group. The size of this
  *      array is the same as pins.
+ * @input_reg: select input register offset for this mux if any
+ *      0 if no select input setting needed.
+ * @input_val: the select input value for each pin in this group. The size of
+ *      this array is the same as pins.
  * @configs: the config for each pin in this group. The size of this
  *      array is the same as pins.
  */
@@ -34,6 +38,8 @@ struct imx_pin_group {
         unsigned int *pins;
         unsigned npins;
         unsigned int *mux_mode;
+        u16 *input_reg;
+        unsigned int *input_val;
         unsigned long *configs;
 };
 
@@ -51,30 +57,19 @@ struct imx_pmx_func {
 
 /**
  * struct imx_pin_reg - describe a pin reg map
- * The last 3 members are used for select input setting
- * @pid: pin id
  * @mux_reg: mux register offset
  * @conf_reg: config register offset
- * @mux_mode: mux mode
- * @input_reg: select input register offset for this mux if any
- *  0 if no select input setting needed.
- * @input_val: the value set to select input register
  */
 struct imx_pin_reg {
-        u16 pid;
         u16 mux_reg;
         u16 conf_reg;
-        u8 mux_mode;
-        u16 input_reg;
-        u8 input_val;
 };
 
 struct imx_pinctrl_soc_info {
         struct device *dev;
         const struct pinctrl_pin_desc *pins;
         unsigned int npins;
-        const struct imx_pin_reg *pin_regs;
-        unsigned int npin_regs;
+        struct imx_pin_reg *pin_regs;
         struct imx_pin_group *groups;
         unsigned int ngroups;
         struct imx_pmx_func *functions;
@@ -84,16 +79,6 @@ struct imx_pinctrl_soc_info {
 #define NO_MUX          0x0
 #define NO_PAD          0x0
 
-#define IMX_PIN_REG(id, conf, mux, mode, input, val)    \
-        {                                               \
-                .pid = id,                              \
-                .conf_reg = conf,                       \
-                .mux_reg = mux,                         \
-                .mux_mode  = mode,                      \
-                .input_reg = input,                     \
-                .input_val = val,                       \
-        }
-
 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
 
 #define PAD_CTL_MASK(len)       ((1 << len) - 1)