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authorThomas Langer <thomas.langer@lantiq.com>2013-08-09 14:38:14 -0400
committerLinus Walleij <linus.walleij@linaro.org>2013-08-14 16:49:24 -0400
commit89ebefe3890e44516a99fb3d21d015ec3b75e50c (patch)
treefee80c23d422c9b17a6e3af0ce5af182f25fd57c /drivers/pinctrl/pinctrl-falcon.c
parent6f73349d7960c853130276cd1074d597a6e8c230 (diff)
pinctrl/lantiq: add missing pin definition to falcon pinctrl driver
The pps pin definition is missing in the current code. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Acked-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-falcon.c')
-rw-r--r--drivers/pinctrl/pinctrl-falcon.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index f9b2a1d4854f..4e731f24df85 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -75,6 +75,7 @@ enum falcon_mux {
75 FALCON_MUX_GPIO = 0, 75 FALCON_MUX_GPIO = 0,
76 FALCON_MUX_RST, 76 FALCON_MUX_RST,
77 FALCON_MUX_NTR, 77 FALCON_MUX_NTR,
78 FALCON_MUX_PPS,
78 FALCON_MUX_MDIO, 79 FALCON_MUX_MDIO,
79 FALCON_MUX_LED, 80 FALCON_MUX_LED,
80 FALCON_MUX_SPI, 81 FALCON_MUX_SPI,
@@ -114,7 +115,7 @@ static struct ltq_mfp_pin falcon_mfp[] = {
114 MFP_FALCON(GPIO2, GPIO, GPIO, NONE, NONE), 115 MFP_FALCON(GPIO2, GPIO, GPIO, NONE, NONE),
115 MFP_FALCON(GPIO3, GPIO, GPIO, NONE, NONE), 116 MFP_FALCON(GPIO3, GPIO, GPIO, NONE, NONE),
116 MFP_FALCON(GPIO4, NTR, GPIO, NONE, NONE), 117 MFP_FALCON(GPIO4, NTR, GPIO, NONE, NONE),
117 MFP_FALCON(GPIO5, NTR, GPIO, NONE, NONE), 118 MFP_FALCON(GPIO5, NTR, GPIO, PPS, NONE),
118 MFP_FALCON(GPIO6, RST, GPIO, NONE, NONE), 119 MFP_FALCON(GPIO6, RST, GPIO, NONE, NONE),
119 MFP_FALCON(GPIO7, MDIO, GPIO, NONE, NONE), 120 MFP_FALCON(GPIO7, MDIO, GPIO, NONE, NONE),
120 MFP_FALCON(GPIO8, MDIO, GPIO, NONE, NONE), 121 MFP_FALCON(GPIO8, MDIO, GPIO, NONE, NONE),
@@ -168,6 +169,7 @@ static struct ltq_mfp_pin falcon_mfp[] = {
168static const unsigned pins_por[] = {GPIO0}; 169static const unsigned pins_por[] = {GPIO0};
169static const unsigned pins_ntr[] = {GPIO4}; 170static const unsigned pins_ntr[] = {GPIO4};
170static const unsigned pins_ntr8k[] = {GPIO5}; 171static const unsigned pins_ntr8k[] = {GPIO5};
172static const unsigned pins_pps[] = {GPIO5};
171static const unsigned pins_hrst[] = {GPIO6}; 173static const unsigned pins_hrst[] = {GPIO6};
172static const unsigned pins_mdio[] = {GPIO7, GPIO8}; 174static const unsigned pins_mdio[] = {GPIO7, GPIO8};
173static const unsigned pins_bled[] = {GPIO9, GPIO10, GPIO11, 175static const unsigned pins_bled[] = {GPIO9, GPIO10, GPIO11,
@@ -186,6 +188,7 @@ static struct ltq_pin_group falcon_grps[] = {
186 GRP_MUX("por", RST, pins_por), 188 GRP_MUX("por", RST, pins_por),
187 GRP_MUX("ntr", NTR, pins_ntr), 189 GRP_MUX("ntr", NTR, pins_ntr),
188 GRP_MUX("ntr8k", NTR, pins_ntr8k), 190 GRP_MUX("ntr8k", NTR, pins_ntr8k),
191 GRP_MUX("pps", PPS, pins_pps),
189 GRP_MUX("hrst", RST, pins_hrst), 192 GRP_MUX("hrst", RST, pins_hrst),
190 GRP_MUX("mdio", MDIO, pins_mdio), 193 GRP_MUX("mdio", MDIO, pins_mdio),
191 GRP_MUX("bootled", LED, pins_bled), 194 GRP_MUX("bootled", LED, pins_bled),
@@ -201,7 +204,7 @@ static struct ltq_pin_group falcon_grps[] = {
201}; 204};
202 205
203static const char * const ltq_rst_grps[] = {"por", "hrst"}; 206static const char * const ltq_rst_grps[] = {"por", "hrst"};
204static const char * const ltq_ntr_grps[] = {"ntr", "ntr8k"}; 207static const char * const ltq_ntr_grps[] = {"ntr", "ntr8k", "pps"};
205static const char * const ltq_mdio_grps[] = {"mdio"}; 208static const char * const ltq_mdio_grps[] = {"mdio"};
206static const char * const ltq_bled_grps[] = {"bootled"}; 209static const char * const ltq_bled_grps[] = {"bootled"};
207static const char * const ltq_asc_grps[] = {"asc0", "asc1"}; 210static const char * const ltq_asc_grps[] = {"asc0", "asc1"};