pinctrl: exynos: Set pin function to EINT in irq_set_type of GPIO EINTa

Pins used as GPIO interrupts need to be configured as EINTs. This patch
adds the required configuration code to exynos_gpio_irq_set_type,
to set the pin as EINT when its interrupt trigger is configured.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 12 insertions, 0 deletions

diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 447818d9851b..c2fa85f18764 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -76,9 +76,11 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
         struct samsung_pinctrl_drv_data *d = irqd->domain->host_data;
         struct samsung_pin_ctrl *ctrl = d->ctrl;
         struct exynos_geint_data *edata = irq_data_get_irq_handler_data(irqd);
+        struct samsung_pin_bank *bank = edata->bank;
         unsigned int shift = EXYNOS_EINT_CON_LEN * edata->pin;
         unsigned int con, trig_type;
         unsigned long reg_con = ctrl->geint_con + edata->eint_offset;
+        unsigned int mask;
 
         switch (type) {
         case IRQ_TYPE_EDGE_RISING:
@@ -110,6 +112,16 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type)
         con &= ~(EXYNOS_EINT_CON_MASK << shift);
         con |= trig_type << shift;
         writel(con, d->virt_base + reg_con);
+
+        reg_con = bank->pctl_offset;
+        shift = edata->pin * bank->func_width;
+        mask = (1 << bank->func_width) - 1;
+
+        con = readl(d->virt_base + reg_con);
+        con &= ~(mask << shift);
+        con |= EXYNOS_EINT_FUNC << shift;
+        writel(con, d->virt_base + reg_con);
+
         return 0;
 }