Merge tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull bulk pin control changes from Linus Walleij:
 "This has been queued and tested for a while.  Lots of action here,
  like in the GPIO tree, embedded stuff like this is really hot now it
  seems.  Details in the signed tag.  I'm especially happy about the
  Qualcomm driver as it is used in such a huge subset of mobile handsets
  out there, and these platforms in general need better upstream support

   - New driver for the Qualcomm TLMM pin controller and its msm8x74
     subdriver.

   - New driver for the Broadcom Capri BCM281xx SoC.

   - New subdriver for the imx25 pin controller.

   - New subdriver for the Tegra124 pin controller.

   - Lock GPIO lines as IRQs for select combined pin control and GPIO
     drivers for baytrail and sirf.

   - Some semi-big refactorings and extenstions to the sirf driver.

   - Lots of patching, cleanup and fixing in the Renesas "PFC" driver
     and associated subdrivers as usual.  It is settling down a little
     bit now it seems.

   - Minor fixes and incremental updates here and there as usual"

* tag 'pinctrl-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (72 commits)
  pinctrl: sunxi: Honor GPIO output initial vaules
  pinctrl: capri: add dependency on OF
  ARM: bcm11351: Enable pinctrl for Broadcom Capri SoCs
  ARM: pinctrl: Add Broadcom Capri pinctrl driver
  pinctrl: Add pinctrl binding for Broadcom Capri SoCs
  pinctrl: Add void * to pinctrl_pin_desc
  pinctrl: st: Fix a typo in probe
  pinctrl: Fix some typos and grammar issues in the documentation
  pinctrl: sirf: lock IRQs when starting them
  pinctrl: sirf: put gpio interrupt pin into input status automatically
  pinctrl: sirf: use only one irq_domain for the whole device node
  pinctrl: single: fix infinite loop caused by bad mask
  pinctrl: single: fix pcs_disable with bits_per_mux
  pinctrl: single: fix DT bindings documentation
  pinctrl: as3722: Set pin to output mode for some function
  pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
  pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
  pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
  pinctrl: sunxi: Add Allwinner A20 clock output pin functions
  pinctrl/lantiq: fix typo
  ...

1 files changed, 29 insertions, 1 deletions

diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
index 72e6a298a1e9..665b96bc0c3a 100644
--- a/drivers/pinctrl/pinctrl-baytrail.c
+++ b/drivers/pinctrl/pinctrl-baytrail.c
@@ -285,13 +285,19 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
         spin_lock_irqsave(&vg->lock, flags);
 
         for (i = 0; i < vg->chip.ngpio; i++) {
+                const char *label;
                 offs = vg->range->pins[i] * 16;
                 conf0 = readl(vg->reg_base + offs + BYT_CONF0_REG);
                 val = readl(vg->reg_base + offs + BYT_VAL_REG);
 
+                label = gpiochip_is_requested(chip, i);
+                if (!label)
+                        label = "Unrequested";
+
                 seq_printf(s,
-                           " gpio-%-3d %s %s %s pad-%-3d offset:0x%03x mux:%d %s%s%s\n",
+                           " gpio-%-3d (%-20.20s) %s %s %s pad-%-3d offset:0x%03x mux:%d %s%s%s\n",
                            i,
+                           label,
                            val & BYT_INPUT_EN ? "  " : "in",
                            val & BYT_OUTPUT_EN ? "   " : "out",
                            val & BYT_LEVEL ? "hi" : "lo",
@@ -365,11 +371,33 @@ static void byt_irq_mask(struct irq_data *d)
 {
 }
 
+static unsigned int byt_irq_startup(struct irq_data *d)
+{
+        struct byt_gpio *vg = irq_data_get_irq_chip_data(d);
+
+        if (gpio_lock_as_irq(&vg->chip, irqd_to_hwirq(d)))
+                dev_err(vg->chip.dev,
+                        "unable to lock HW IRQ %lu for IRQ\n",
+                        irqd_to_hwirq(d));
+        byt_irq_unmask(d);
+        return 0;
+}
+
+static void byt_irq_shutdown(struct irq_data *d)
+{
+        struct byt_gpio *vg = irq_data_get_irq_chip_data(d);
+
+        byt_irq_mask(d);
+        gpio_unlock_as_irq(&vg->chip, irqd_to_hwirq(d));
+}
+
 static struct irq_chip byt_irqchip = {
         .name = "BYT-GPIO",
         .irq_mask = byt_irq_mask,
         .irq_unmask = byt_irq_unmask,
         .irq_set_type = byt_irq_type,
+        .irq_startup = byt_irq_startup,
+        .irq_shutdown = byt_irq_shutdown,
 };
 
 static void byt_gpio_irq_init_hw(struct byt_gpio *vg)