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authorMallikarjun Kasoju <mkasoju@nvidia.com>2014-01-07 03:40:56 -0500
committerLinus Walleij <linus.walleij@linaro.org>2014-01-14 04:34:18 -0500
commitf8720e5ec752c33259c7c14349945d5feb069229 (patch)
treed42dcaae87d2b6f1cd04ca2b865fe40eb8c6b92e /drivers/pinctrl/pinctrl-as3722.c
parent8385af02bad1724a720f6ba4c1ec590d4f082229 (diff)
pinctrl: as3722: Set pin to output mode for some function
If pins are used for function output like pwm, clk32k, power good etc then set it as output mode default. Signed-off-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-as3722.c')
-rw-r--r--drivers/pinctrl/pinctrl-as3722.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-as3722.c b/drivers/pinctrl/pinctrl-as3722.c
index 01bffc1d52fd..3be47ae34d3a 100644
--- a/drivers/pinctrl/pinctrl-as3722.c
+++ b/drivers/pinctrl/pinctrl-as3722.c
@@ -250,6 +250,26 @@ static int as3722_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function,
250 return ret; 250 return ret;
251 } 251 }
252 as_pci->gpio_control[group].io_function = function; 252 as_pci->gpio_control[group].io_function = function;
253
254 switch (val) {
255 case AS3722_GPIO_IOSF_SD0_OUT:
256 case AS3722_GPIO_IOSF_PWR_GOOD_OUT:
257 case AS3722_GPIO_IOSF_Q32K_OUT:
258 case AS3722_GPIO_IOSF_PWM_OUT:
259 case AS3722_GPIO_IOSF_SD6_LOW_VOLT_LOW:
260 ret = as3722_update_bits(as_pci->as3722, gpio_cntr_reg,
261 AS3722_GPIO_MODE_MASK, AS3722_GPIO_MODE_OUTPUT_VDDH);
262 if (ret < 0) {
263 dev_err(as_pci->dev, "GPIO%d_CTRL update failed %d\n",
264 group, ret);
265 return ret;
266 }
267 as_pci->gpio_control[group].mode_prop =
268 AS3722_GPIO_MODE_OUTPUT_VDDH;
269 break;
270 default:
271 break;
272 }
253 return ret; 273 return ret;
254} 274}
255 275