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authorLee Jones <lee.jones@linaro.org>2013-01-31 04:57:52 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-02-10 09:44:33 -0500
commita6a16d274e734afa769a9651dfaf8315d404c116 (patch)
tree123e91e276d7b6b77f362cc1b59fb0fe78447bb5 /drivers/pinctrl/pinctrl-abx500.c
parentac652d7941f84c24cb27378aefbb4015f4c1da67 (diff)
pinctrl/abx500: replace IRQ offsets with table read-in values
The ABx500 GPIO controller used to provide a set of virtual contiguous IRQs for use by sub-devices, but they have been removed after a request from Mainline Maintainers. Now the AB8500 core driver deals with almost all IRQ related issues instead. The ABx500 GPIO driver is now only used to convert between GPIO and IRQ numbers which is actually quite difficult, as the ABx500 GPIO's associated IRQs are clustered together throughout the interrupt number space at irregular intervals. To solve this quandary, we have placed the read-in values into the existing cluster information table to use during conversion. Signed-off-by: Lee Jones <lee.jones@linaro.org> [Moved irq_base removal into this patch] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-abx500.c')
-rw-r--r--drivers/pinctrl/pinctrl-abx500.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c
index b8f6c7597d53..720e77998e64 100644
--- a/drivers/pinctrl/pinctrl-abx500.c
+++ b/drivers/pinctrl/pinctrl-abx500.c
@@ -100,7 +100,6 @@ struct abx500_pinctrl {
100 struct gpio_chip chip; 100 struct gpio_chip chip;
101 struct ab8500 *parent; 101 struct ab8500 *parent;
102 struct mutex lock; 102 struct mutex lock;
103 u32 irq_base;
104 struct abx500_gpio_irq_cluster *irq_cluster; 103 struct abx500_gpio_irq_cluster *irq_cluster;
105 int irq_cluster_size; 104 int irq_cluster_size;
106}; 105};
@@ -262,18 +261,24 @@ static int abx500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
262 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 261 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip);
263 /* The AB8500 GPIO numbers are off by one */ 262 /* The AB8500 GPIO numbers are off by one */
264 int gpio = offset + 1; 263 int gpio = offset + 1;
265 int base = pct->irq_base; 264 int hwirq;
266 int i; 265 int i;
267 266
268 for (i = 0; i < pct->irq_cluster_size; i++) { 267 for (i = 0; i < pct->irq_cluster_size; i++) {
269 struct abx500_gpio_irq_cluster *cluster = 268 struct abx500_gpio_irq_cluster *cluster =
270 &pct->irq_cluster[i]; 269 &pct->irq_cluster[i];
271 270
272 if (gpio >= cluster->start && gpio <= cluster->end) 271 if (gpio >= cluster->start && gpio <= cluster->end) {
273 return base + gpio - cluster->start; 272 /*
273 * The ABx500 GPIO's associated IRQs are clustered together
274 * throughout the interrupt numbers at irregular intervals.
275 * To solve this quandry, we have placed the read-in values
276 * into the cluster information table.
277 */
278 hwirq = gpio + cluster->to_irq;
274 279
275 /* Advance by the number of gpios in this cluster */ 280 return irq_create_mapping(pct->parent->domain, hwirq);
276 base += cluster->end + cluster->offset - cluster->start + 1; 281 }
277 } 282 }
278 283
279 return -EINVAL; 284 return -EINVAL;
@@ -876,7 +881,6 @@ static int abx500_gpio_probe(struct platform_device *pdev)
876 pct->chip = abx500gpio_chip; 881 pct->chip = abx500gpio_chip;
877 pct->chip.dev = &pdev->dev; 882 pct->chip.dev = &pdev->dev;
878 pct->chip.base = pdata->gpio_base; 883 pct->chip.base = pdata->gpio_base;
879 pct->irq_base = pdata->irq_base;
880 pct->chip.base = (np) ? -1 : pdata->gpio_base; 884 pct->chip.base = (np) ? -1 : pdata->gpio_base;
881 885
882 /* initialize the lock */ 886 /* initialize the lock */