diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2013-02-05 14:10:57 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2013-02-07 11:26:53 -0500 |
commit | a950cb741bb62d5f23860755388ad4e93dd2a185 (patch) | |
tree | def8812814c93a59f83160031db0e67249806908 /drivers/pinctrl/pinctrl-abx500.c | |
parent | f30a3839b33c560b374c69be9ba2621d3d6a3d10 (diff) |
pinctrl/abx500: adjust offset for get_mode()
The set_mode() and get_mode() functions in the abx500 were
not mirrored, leading to the wrong GPIO control bits being
read out.
Cc: Lee Jones <lee.jones@linaro.org>
Reported-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-abx500.c')
-rw-r--r-- | drivers/pinctrl/pinctrl-abx500.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c index 17508b5820f5..0b3aa1c28fba 100644 --- a/drivers/pinctrl/pinctrl-abx500.c +++ b/drivers/pinctrl/pinctrl-abx500.c | |||
@@ -401,6 +401,8 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, | |||
401 | bool alt_bit2; | 401 | bool alt_bit2; |
402 | struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); | 402 | struct abx500_pinctrl *pct = pinctrl_dev_get_drvdata(pctldev); |
403 | struct alternate_functions af = pct->soc->alternate_functions[gpio]; | 403 | struct alternate_functions af = pct->soc->alternate_functions[gpio]; |
404 | /* on ABx5xx, there is no GPIO0, so adjust the offset */ | ||
405 | unsigned offset = gpio - 1; | ||
404 | 406 | ||
405 | /* | 407 | /* |
406 | * if gpiosel_bit is set to unused, | 408 | * if gpiosel_bit is set to unused, |
@@ -410,7 +412,7 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, | |||
410 | return ABX500_DEFAULT; | 412 | return ABX500_DEFAULT; |
411 | 413 | ||
412 | /* read GpioSelx register */ | 414 | /* read GpioSelx register */ |
413 | abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (gpio / 8), | 415 | abx500_gpio_get_bit(chip, AB8500_GPIO_SEL1_REG + (offset / 8), |
414 | af.gpiosel_bit, &bit_mode); | 416 | af.gpiosel_bit, &bit_mode); |
415 | mode = bit_mode; | 417 | mode = bit_mode; |
416 | 418 | ||