Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform changes from Olof Johansson:
 "This is the bulk of new SoC enablement and other platform changes for
  3.17:

   - Samsung S5PV210 has been converted to DT and multiplatform
   - Clock drivers and bindings for some of the lower-end i.MX 1/2
     platforms
   - Kirkwood, one of the popular Marvell platforms, is folded into the
     mvebu platform code, removing mach-kirkwood
   - Hwmod data for TI AM43xx and DRA7 platforms
   - More additions of Renesas shmobile platform support
   - Removal of plat-samsung contents that can be removed with S5PV210
     being multiplatform/DT-enabled and the other two old platforms
     being removed

  New platforms (most with only basic support right now):

   - Hisilicon X5HD2 settop box chipset is introduced
   - Mediatek MT6589 (mobile chipset) is introduced
   - Broadcom BCM7xxx settop box chipset is introduced

  + as usual a lot other pieces all over the platform code"

* tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits)
  ARM: hisi: remove smp from machine descriptor
  power: reset: move hisilicon reboot code
  ARM: dts: Add hix5hd2-dkb dts file.
  ARM: debug: Rename Hi3716 to HIX5HD2
  ARM: hisi: enable hix5hd2 SoC
  ARM: hisi: add ARCH_HISI
  MAINTAINERS: add entry for Broadcom ARM STB architecture
  ARM: brcmstb: select GISB arbiter and interrupt drivers
  ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
  ARM: configs: enable SMP in bcm_defconfig
  ARM: add SMP support for Broadcom mobile SoCs
  Documentation: arm: misc updates to Marvell EBU SoC status
  Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
  ARM: mvebu: fix build without platforms selected
  ARM: mvebu: add cpuidle support for Armada 38x
  ARM: mvebu: add cpuidle support for Armada 370
  cpuidle: mvebu: add Armada 38x support
  cpuidle: mvebu: add Armada 370 support
  cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
  ARM: mvebu: export the SCU address
  ...

5 files changed, 205 insertions, 0 deletions

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index cc97c897945a..d1f5fc924c93 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -159,6 +159,16 @@ config PHY_SAMSUNG_USB2
           for particular PHYs will be enabled based on the SoC type in addition
           to this driver.
 
+config PHY_S5PV210_USB2
+        bool "Support for S5PV210"
+        depends on PHY_SAMSUNG_USB2
+        depends on ARCH_S5PV210
+        help
+          Enable USB PHY support for S5PV210. This option requires that Samsung
+          USB 2.0 PHY driver is enabled and means that support for this
+          particular SoC is compiled in the driver. In case of S5PV210 two phys
+          are available - device and host.
+
 config PHY_EXYNOS4210_USB2
         bool
         depends on PHY_SAMSUNG_USB2
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 971ad0aac388..ec24e915349b 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -21,6 +21,7 @@ phy-exynos-usb2-y			+= phy-samsung-usb2.o
 phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4210_USB2)   += phy-exynos4210-usb2.o
 phy-exynos-usb2-$(CONFIG_PHY_EXYNOS4X12_USB2)   += phy-exynos4x12-usb2.o
 phy-exynos-usb2-$(CONFIG_PHY_EXYNOS5250_USB2)   += phy-exynos5250-usb2.o
+phy-exynos-usb2-$(CONFIG_PHY_S5PV210_USB2)      += phy-s5pv210-usb2.o
 obj-$(CONFIG_PHY_EXYNOS5_USBDRD)        += phy-exynos5-usbdrd.o
 obj-$(CONFIG_PHY_XGENE)                 += phy-xgene.o
 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)     += phy-qcom-apq8064-sata.o
diff --git a/drivers/phy/phy-s5pv210-usb2.c b/drivers/phy/phy-s5pv210-usb2.c
new file mode 100644
index 000000000000..004d320767e4
--- /dev/null
+++ b/drivers/phy/phy-s5pv210-usb2.c
@@ -0,0 +1,187 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Authors: Kamil Debski <k.debski@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/phy/phy.h>
+#include "phy-samsung-usb2.h"
+
+/* Exynos USB PHY registers */
+
+/* PHY power control */
+#define S5PV210_UPHYPWR                 0x0
+
+#define S5PV210_UPHYPWR_PHY0_SUSPEND    BIT(0)
+#define S5PV210_UPHYPWR_PHY0_PWR        BIT(3)
+#define S5PV210_UPHYPWR_PHY0_OTG_PWR    BIT(4)
+#define S5PV210_UPHYPWR_PHY0    ( \
+        S5PV210_UPHYPWR_PHY0_SUSPEND | \
+        S5PV210_UPHYPWR_PHY0_PWR | \
+        S5PV210_UPHYPWR_PHY0_OTG_PWR)
+
+#define S5PV210_UPHYPWR_PHY1_SUSPEND    BIT(6)
+#define S5PV210_UPHYPWR_PHY1_PWR        BIT(7)
+#define S5PV210_UPHYPWR_PHY1 ( \
+        S5PV210_UPHYPWR_PHY1_SUSPEND | \
+        S5PV210_UPHYPWR_PHY1_PWR)
+
+/* PHY clock control */
+#define S5PV210_UPHYCLK                 0x4
+
+#define S5PV210_UPHYCLK_PHYFSEL_MASK    (0x3 << 0)
+#define S5PV210_UPHYCLK_PHYFSEL_48MHZ   (0x0 << 0)
+#define S5PV210_UPHYCLK_PHYFSEL_24MHZ   (0x3 << 0)
+#define S5PV210_UPHYCLK_PHYFSEL_12MHZ   (0x2 << 0)
+
+#define S5PV210_UPHYCLK_PHY0_ID_PULLUP  BIT(2)
+#define S5PV210_UPHYCLK_PHY0_COMMON_ON  BIT(4)
+#define S5PV210_UPHYCLK_PHY1_COMMON_ON  BIT(7)
+
+/* PHY reset control */
+#define S5PV210_UPHYRST                 0x8
+
+#define S5PV210_URSTCON_PHY0            BIT(0)
+#define S5PV210_URSTCON_OTG_HLINK       BIT(1)
+#define S5PV210_URSTCON_OTG_PHYLINK     BIT(2)
+#define S5PV210_URSTCON_PHY1_ALL        BIT(3)
+#define S5PV210_URSTCON_HOST_LINK_ALL   BIT(4)
+
+/* Isolation, configured in the power management unit */
+#define S5PV210_USB_ISOL_OFFSET         0x680c
+#define S5PV210_USB_ISOL_DEVICE         BIT(0)
+#define S5PV210_USB_ISOL_HOST           BIT(1)
+
+
+enum s5pv210_phy_id {
+        S5PV210_DEVICE,
+        S5PV210_HOST,
+        S5PV210_NUM_PHYS,
+};
+
+/*
+ * s5pv210_rate_to_clk() converts the supplied clock rate to the value that
+ * can be written to the phy register.
+ */
+static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg)
+{
+        switch (rate) {
+        case 12 * MHZ:
+                *reg = S5PV210_UPHYCLK_PHYFSEL_12MHZ;
+                break;
+        case 24 * MHZ:
+                *reg = S5PV210_UPHYCLK_PHYFSEL_24MHZ;
+                break;
+        case 48 * MHZ:
+                *reg = S5PV210_UPHYCLK_PHYFSEL_48MHZ;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+static void s5pv210_isol(struct samsung_usb2_phy_instance *inst, bool on)
+{
+        struct samsung_usb2_phy_driver *drv = inst->drv;
+        u32 mask;
+
+        switch (inst->cfg->id) {
+        case S5PV210_DEVICE:
+                mask = S5PV210_USB_ISOL_DEVICE;
+                break;
+        case S5PV210_HOST:
+                mask = S5PV210_USB_ISOL_HOST;
+                break;
+        default:
+                return;
+        };
+
+        regmap_update_bits(drv->reg_pmu, S5PV210_USB_ISOL_OFFSET,
+                                                        mask, on ? 0 : mask);
+}
+
+static void s5pv210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on)
+{
+        struct samsung_usb2_phy_driver *drv = inst->drv;
+        u32 rstbits = 0;
+        u32 phypwr = 0;
+        u32 rst;
+        u32 pwr;
+
+        switch (inst->cfg->id) {
+        case S5PV210_DEVICE:
+                phypwr =        S5PV210_UPHYPWR_PHY0;
+                rstbits =       S5PV210_URSTCON_PHY0;
+                break;
+        case S5PV210_HOST:
+                phypwr =        S5PV210_UPHYPWR_PHY1;
+                rstbits =       S5PV210_URSTCON_PHY1_ALL |
+                                S5PV210_URSTCON_HOST_LINK_ALL;
+                break;
+        };
+
+        if (on) {
+                writel(drv->ref_reg_val, drv->reg_phy + S5PV210_UPHYCLK);
+
+                pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
+                pwr &= ~phypwr;
+                writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
+
+                rst = readl(drv->reg_phy + S5PV210_UPHYRST);
+                rst |= rstbits;
+                writel(rst, drv->reg_phy + S5PV210_UPHYRST);
+                udelay(10);
+                rst &= ~rstbits;
+                writel(rst, drv->reg_phy + S5PV210_UPHYRST);
+        } else {
+                pwr = readl(drv->reg_phy + S5PV210_UPHYPWR);
+                pwr |= phypwr;
+                writel(pwr, drv->reg_phy + S5PV210_UPHYPWR);
+        }
+}
+
+static int s5pv210_power_on(struct samsung_usb2_phy_instance *inst)
+{
+        s5pv210_isol(inst, 0);
+        s5pv210_phy_pwr(inst, 1);
+
+        return 0;
+}
+
+static int s5pv210_power_off(struct samsung_usb2_phy_instance *inst)
+{
+        s5pv210_phy_pwr(inst, 0);
+        s5pv210_isol(inst, 1);
+
+        return 0;
+}
+
+static const struct samsung_usb2_common_phy s5pv210_phys[S5PV210_NUM_PHYS] = {
+        [S5PV210_DEVICE] = {
+                .label          = "device",
+                .id             = S5PV210_DEVICE,
+                .power_on       = s5pv210_power_on,
+                .power_off      = s5pv210_power_off,
+        },
+        [S5PV210_HOST] = {
+                .label          = "host",
+                .id             = S5PV210_HOST,
+                .power_on       = s5pv210_power_on,
+                .power_off      = s5pv210_power_off,
+        },
+};
+
+const struct samsung_usb2_phy_config s5pv210_usb2_phy_config = {
+        .num_phys       = ARRAY_SIZE(s5pv210_phys),
+        .phys           = s5pv210_phys,
+        .rate_to_clk    = s5pv210_rate_to_clk,
+};
diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-samsung-usb2.c
index ae30640a411d..3732ca25e09f 100644
--- a/drivers/phy/phy-samsung-usb2.c
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -111,6 +111,12 @@ static const struct of_device_id samsung_usb2_phy_of_match[] = {
                 .data = &exynos5250_usb2_phy_config,
         },
 #endif
+#ifdef CONFIG_PHY_S5PV210_USB2
+        {
+                .compatible = "samsung,s5pv210-usb2-phy",
+                .data = &s5pv210_usb2_phy_config,
+        },
+#endif
         { },
 };
 MODULE_DEVICE_TABLE(of, samsung_usb2_phy_of_match);
diff --git a/drivers/phy/phy-samsung-usb2.h b/drivers/phy/phy-samsung-usb2.h
index b03da0ef39ac..44bead9b8f34 100644
--- a/drivers/phy/phy-samsung-usb2.h
+++ b/drivers/phy/phy-samsung-usb2.h
@@ -67,4 +67,5 @@ extern const struct samsung_usb2_phy_config exynos3250_usb2_phy_config;
 extern const struct samsung_usb2_phy_config exynos4210_usb2_phy_config;
 extern const struct samsung_usb2_phy_config exynos4x12_usb2_phy_config;
 extern const struct samsung_usb2_phy_config exynos5250_usb2_phy_config;
+extern const struct samsung_usb2_phy_config s5pv210_usb2_phy_config;
 #endif