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authorVitaly Bordug <vbordug@ru.mvista.com>2005-12-08 10:56:12 -0500
committerDominik Brodowski <linux@dominikbrodowski.net>2006-01-05 18:27:53 -0500
commit1371d3be045a6a1a8b828b838069b5fe6e0ab4c6 (patch)
tree418c16b1381aa3f1a14d6b48600f4b2db3ce891c /drivers/pcmcia
parenta94515fa1f1609249dbebcfb93181ad0ba4b285a (diff)
[PATCH] 8xx PCMCIA: support for MPC885ADS and MPC866ADS
This adds PCMCIA support for both MPC885ADS and MPC866ADS. This is established not together with FADS, because 885 does not have io_block_mapping() for BCSR area. Also, some cleanups done both for 885ADS and MBX. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Diffstat (limited to 'drivers/pcmcia')
-rw-r--r--drivers/pcmcia/m8xx_pcmcia.c97
1 files changed, 91 insertions, 6 deletions
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c
index ddaab13d21bd..0e07d9535116 100644
--- a/drivers/pcmcia/m8xx_pcmcia.c
+++ b/drivers/pcmcia/m8xx_pcmcia.c
@@ -9,6 +9,9 @@
9 * <oliver.kurth@cyclades.de> 9 * <oliver.kurth@cyclades.de>
10 * Further fixes, v2.6 kernel port 10 * Further fixes, v2.6 kernel port
11 * <marcelo.tosatti@cyclades.com> 11 * <marcelo.tosatti@cyclades.com>
12 *
13 * Some fixes, additions (C) 2005 Montavista Software, Inc.
14 * <vbordug@ru.mvista.com>
12 * 15 *
13 * "The ExCA standard specifies that socket controllers should provide 16 * "The ExCA standard specifies that socket controllers should provide
14 * two IO and five memory windows per socket, which can be independently 17 * two IO and five memory windows per socket, which can be independently
@@ -97,6 +100,11 @@ MODULE_LICENSE("Dual MPL/GPL");
97#endif 100#endif
98#endif 101#endif
99 102
103#if defined(CONFIG_MPC885ADS)
104#define CONFIG_PCMCIA_SLOT_A
105#define PCMCIA_GLITCHY_CD
106#endif
107
100/* Cyclades ACS uses both slots */ 108/* Cyclades ACS uses both slots */
101#ifdef CONFIG_PRxK 109#ifdef CONFIG_PRxK
102#define CONFIG_PCMCIA_SLOT_A 110#define CONFIG_PCMCIA_SLOT_A
@@ -374,11 +382,80 @@ static int voltage_set(int slot, int vcc, int vpp)
374 } 382 }
375 383
376 /* first, turn off all power */ 384 /* first, turn off all power */
377 out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK)); 385 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));
386
387 /* enable new powersettings */
388 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | reg);
389
390 return 0;
391}
392
393#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V
394
395static void hardware_enable(int slot)
396{
397 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~BCSR1_PCCEN);
398}
399
400static void hardware_disable(int slot)
401{
402 out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | BCSR1_PCCEN);
403}
404
405#endif
406
407/* MPC885ADS Boards */
408
409#if defined(CONFIG_MPC885ADS)
410
411#define PCMCIA_BOARD_MSG "MPC885ADS"
412
413static int voltage_set(int slot, int vcc, int vpp)
414{
415 u32 reg = 0;
416 unsigned *bcsr_io;
417
418 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
419
420 switch(vcc) {
421 case 0:
422 break;
423 case 33:
424 reg |= BCSR1_PCCVCC0;
425 break;
426 case 50:
427 reg |= BCSR1_PCCVCC1;
428 break;
429 default:
430 return 1;
431 }
432
433 switch(vpp) {
434 case 0:
435 break;
436 case 33:
437 case 50:
438 if(vcc == vpp)
439 reg |= BCSR1_PCCVPP1;
440 else
441 return 1;
442 break;
443 case 120:
444 if ((vcc == 33) || (vcc == 50))
445 reg |= BCSR1_PCCVPP0;
446 else
447 return 1;
448 default:
449 return 1;
450 }
451
452 /* first, turn off all power */
453 out_be32(bcsr_io, in_be32(bcsr_io) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));
378 454
379 /* enable new powersettings */ 455 /* enable new powersettings */
380 out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) | reg); 456 out_be32(bcsr_io, in_be32(bcsr_io) | reg);
381 457
458 iounmap(bcsr_io);
382 return 0; 459 return 0;
383} 460}
384 461
@@ -386,12 +463,20 @@ static int voltage_set(int slot, int vcc, int vpp)
386 463
387static void hardware_enable(int slot) 464static void hardware_enable(int slot)
388{ 465{
389 out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) & ~BCSR1_PCCEN); 466 unsigned *bcsr_io;
467
468 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
469 out_be32(bcsr_io, in_be32(bcsr_io) & ~BCSR1_PCCEN);
470 iounmap(bcsr_io);
390} 471}
391 472
392static void hardware_disable(int slot) 473static void hardware_disable(int slot)
393{ 474{
394 out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) | BCSR1_PCCEN); 475 unsigned *bcsr_io;
476
477 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
478 out_be32(bcsr_io, in_be32(bcsr_io) | BCSR1_PCCEN);
479 iounmap(bcsr_io);
395} 480}
396 481
397#endif 482#endif
@@ -440,10 +525,10 @@ static int voltage_set(int slot, int vcc, int vpp)
440 } 525 }
441 526
442 /* first, turn off all power */ 527 /* first, turn off all power */
443 out_8(&((u8 *)MBX_CSR2_ADDR), in_8(&((u8 *)MBX_CSR2_ADDR)) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK)); 528 out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));
444 529
445 /* enable new powersettings */ 530 /* enable new powersettings */
446 out_8(&((u8 *)MBX_CSR2_ADDR), in_8(&((u8 *)MBX_CSR2_ADDR)) | reg); 531 out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) | reg);
447 532
448 return 0; 533 return 0;
449} 534}