diff options
author | Marek Vasut <marek.vasut@gmail.com> | 2010-11-03 11:29:35 -0400 |
---|---|---|
committer | Eric Miao <eric.y.miao@gmail.com> | 2010-12-16 01:31:16 -0500 |
commit | ad68bb9f7a3cd47396635a5e3895215af57579da (patch) | |
tree | 6d9890bc0112b637e95afa0129a08fc20e325234 /drivers/pcmcia/pxa2xx_base.c | |
parent | 851982c1b6ca18cedf6d01e4529a0c1ddb30771e (diff) |
ARM: pxa: Access SMEMC via virtual addresses
This is important because on PXA3xx, the physical mapping of SMEMC registers
differs from the one on PXA2xx. In order to get PCMCIA working on both PXA2xx
and PXA320, the PCMCIA driver was adjusted accordingly as well.
Also, various places in the kernel had to be patched to use
__raw_read/__raw_write.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'drivers/pcmcia/pxa2xx_base.c')
-rw-r--r-- | drivers/pcmcia/pxa2xx_base.c | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index ae07b4db8a6e..55a7d0b045b1 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | 27 | ||
28 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
29 | #include <mach/smemc.h> | ||
29 | #include <asm/io.h> | 30 | #include <asm/io.h> |
30 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
31 | #include <asm/system.h> | 32 | #include <asm/system.h> |
@@ -116,37 +117,49 @@ static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, | |||
116 | 117 | ||
117 | static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) | 118 | static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) |
118 | { | 119 | { |
119 | MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock) | 120 | uint32_t val; |
121 | |||
122 | val = ((pxa2xx_mcxx_setup(speed, clock) | ||
120 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | 123 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) |
121 | | ((pxa2xx_mcxx_asst(speed, clock) | 124 | | ((pxa2xx_mcxx_asst(speed, clock) |
122 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | 125 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) |
123 | | ((pxa2xx_mcxx_hold(speed, clock) | 126 | | ((pxa2xx_mcxx_hold(speed, clock) |
124 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); | 127 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); |
125 | 128 | ||
129 | __raw_writel(val, MCMEM(sock)); | ||
130 | |||
126 | return 0; | 131 | return 0; |
127 | } | 132 | } |
128 | 133 | ||
129 | static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) | 134 | static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) |
130 | { | 135 | { |
131 | MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock) | 136 | uint32_t val; |
137 | |||
138 | val = ((pxa2xx_mcxx_setup(speed, clock) | ||
132 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | 139 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) |
133 | | ((pxa2xx_mcxx_asst(speed, clock) | 140 | | ((pxa2xx_mcxx_asst(speed, clock) |
134 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | 141 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) |
135 | | ((pxa2xx_mcxx_hold(speed, clock) | 142 | | ((pxa2xx_mcxx_hold(speed, clock) |
136 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); | 143 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); |
137 | 144 | ||
145 | __raw_writel(val, MCIO(sock)); | ||
146 | |||
138 | return 0; | 147 | return 0; |
139 | } | 148 | } |
140 | 149 | ||
141 | static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) | 150 | static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) |
142 | { | 151 | { |
143 | MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock) | 152 | uint32_t val; |
153 | |||
154 | val = ((pxa2xx_mcxx_setup(speed, clock) | ||
144 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | 155 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) |
145 | | ((pxa2xx_mcxx_asst(speed, clock) | 156 | | ((pxa2xx_mcxx_asst(speed, clock) |
146 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | 157 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) |
147 | | ((pxa2xx_mcxx_hold(speed, clock) | 158 | | ((pxa2xx_mcxx_hold(speed, clock) |
148 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); | 159 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); |
149 | 160 | ||
161 | __raw_writel(val, MCATT(sock)); | ||
162 | |||
150 | return 0; | 163 | return 0; |
151 | } | 164 | } |
152 | 165 | ||
@@ -205,19 +218,18 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | |||
205 | static void pxa2xx_configure_sockets(struct device *dev) | 218 | static void pxa2xx_configure_sockets(struct device *dev) |
206 | { | 219 | { |
207 | struct pcmcia_low_level *ops = dev->platform_data; | 220 | struct pcmcia_low_level *ops = dev->platform_data; |
208 | |||
209 | /* | 221 | /* |
210 | * We have at least one socket, so set MECR:CIT | 222 | * We have at least one socket, so set MECR:CIT |
211 | * (Card Is There) | 223 | * (Card Is There) |
212 | */ | 224 | */ |
213 | MECR |= MECR_CIT; | 225 | uint32_t mecr = MECR_CIT; |
214 | 226 | ||
215 | /* Set MECR:NOS (Number Of Sockets) */ | 227 | /* Set MECR:NOS (Number Of Sockets) */ |
216 | if ((ops->first + ops->nr) > 1 || | 228 | if ((ops->first + ops->nr) > 1 || |
217 | machine_is_viper() || machine_is_arcom_zeus()) | 229 | machine_is_viper() || machine_is_arcom_zeus()) |
218 | MECR |= MECR_NOS; | 230 | mecr |= MECR_NOS; |
219 | else | 231 | |
220 | MECR &= ~MECR_NOS; | 232 | __raw_writel(mecr, MECR); |
221 | } | 233 | } |
222 | 234 | ||
223 | static const char *skt_names[] = { | 235 | static const char *skt_names[] = { |