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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/pcmcia/m32r_pcc.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/pcmcia/m32r_pcc.h')
-rw-r--r--drivers/pcmcia/m32r_pcc.h65
1 files changed, 65 insertions, 0 deletions
diff --git a/drivers/pcmcia/m32r_pcc.h b/drivers/pcmcia/m32r_pcc.h
new file mode 100644
index 000000000000..e4fffe417ba9
--- /dev/null
+++ b/drivers/pcmcia/m32r_pcc.h
@@ -0,0 +1,65 @@
1/*
2 * Copyright (C) 2001 by Hiroyuki Kondo
3 */
4
5#define M32R_MAX_PCC 2
6
7/*
8 * M32R PC Card Controler
9 */
10#define M32R_PCC0_BASE 0x00ef7000
11#define M32R_PCC1_BASE 0x00ef7020
12
13/*
14 * Register offsets
15 */
16#define PCCR 0x00
17#define PCADR 0x04
18#define PCMOD 0x08
19#define PCIRC 0x0c
20#define PCCSIGCR 0x10
21#define PCATCR 0x14
22
23/*
24 * PCCR
25 */
26#define PCCR_PCEN (1UL<<(31-31))
27
28/*
29 * PCIRC
30 */
31#define PCIRC_BWERR (1UL<<(31-7))
32#define PCIRC_CDIN1 (1UL<<(31-14))
33#define PCIRC_CDIN2 (1UL<<(31-15))
34#define PCIRC_BEIEN (1UL<<(31-23))
35#define PCIRC_CIIEN (1UL<<(31-30))
36#define PCIRC_COIEN (1UL<<(31-31))
37
38/*
39 * PCCSIGCR
40 */
41#define PCCSIGCR_SEN (1UL<<(31-3))
42#define PCCSIGCR_VEN (1UL<<(31-7))
43#define PCCSIGCR_CRST (1UL<<(31-15))
44#define PCCSIGCR_COCR (1UL<<(31-31))
45
46/*
47 *
48 */
49#define PCMOD_AS_ATTRIB (1UL<<(31-19))
50#define PCMOD_AS_IO (1UL<<(31-18))
51
52#define PCMOD_CBSZ (1UL<<(31-23)) /* set for 8bit */
53
54#define PCMOD_DBEX (1UL<<(31-31)) /* set for excahnge */
55
56/*
57 * M32R PCC Map addr
58 */
59#define M32R_PCC0_MAPBASE 0x14000000
60#define M32R_PCC1_MAPBASE 0x16000000
61
62#define M32R_PCC_MAPMAX 0x02000000
63
64#define M32R_PCC_MAPSIZE 0x00001000 /* XXX */
65#define M32R_PCC_MAPMASK (~(M32R_PCC_MAPMAX-1))