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authorDaniel Yeisley <dan.yeisley@unisys.com>2006-12-21 14:34:57 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2007-02-07 18:50:05 -0500
commit15a260d53f7ca026e45109d2c2bec8c4b087780b (patch)
tree6db2fde4b3c8589f94f532e09f4e105c703b7606 /drivers/pcmcia/hd64465_ss.c
parent9f593e30b318719b0e3889c730cc3a2d0729a707 (diff)
PCI Quirk: 1k I/O space IOBL_ADR fix on P64H2
There's an existing quirk for the kernel to use 1k IO space granularity on the Intel P64H2. It turns out however that pci_setup_bridge() in drivers/pci/setup-bus.c reads in the IO base and limit address register masks it off to the nearest 4k, and writes it back. This causes the kernel to be on 1k boundaries and the hardware to be 4k aligned. The patch below fixes the problem. Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pcmcia/hd64465_ss.c')
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