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authorManuel Lauss <manuel.lauss@googlemail.com>2010-02-24 11:40:21 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:53:43 -0500
commit11b897cf84c37e6522db914793677e933ef311fb (patch)
treeb9d69cea86b2c1673f30332ff9b3944dc00bfc9b /drivers/pcmcia/au1000_generic.c
parentb9b37787d24cca9fbd63f767663e9439fa69aa22 (diff)
MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus area. Currently, addresses at the far end of the 32bit area are assumed to belong to the PCMCIA area and fixed up to the real 36bit address before being passed to ioremap(). A previous commit enabled 64 bit physical size for the resource datatype on Alchemy and this allows to use the correct 36bit addresses when registering the PCMCIA sockets. This patch removes the 32-to-36bit address fixup and registers the Alchemy demo board pcmcia socket with the correct 36bit physical addresses. Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet card. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/994/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/pcmcia/au1000_generic.c')
-rw-r--r--drivers/pcmcia/au1000_generic.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/pcmcia/au1000_generic.c b/drivers/pcmcia/au1000_generic.c
index 02088704ac2c..171c8a654887 100644
--- a/drivers/pcmcia/au1000_generic.c
+++ b/drivers/pcmcia/au1000_generic.c
@@ -405,18 +405,16 @@ int au1x00_pcmcia_socket_probe(struct device *dev, struct pcmcia_low_level *ops,
405 skt->virt_io = (void *) 405 skt->virt_io = (void *)
406 (ioremap((phys_t)AU1X_SOCK0_IO, 0x1000) - 406 (ioremap((phys_t)AU1X_SOCK0_IO, 0x1000) -
407 (u32)mips_io_port_base); 407 (u32)mips_io_port_base);
408 skt->phys_attr = AU1X_SOCK0_PSEUDO_PHYS_ATTR; 408 skt->phys_attr = AU1X_SOCK0_PHYS_ATTR;
409 skt->phys_mem = AU1X_SOCK0_PSEUDO_PHYS_MEM; 409 skt->phys_mem = AU1X_SOCK0_PHYS_MEM;
410 } 410 }
411#ifndef CONFIG_MIPS_XXS1500
412 else { 411 else {
413 skt->virt_io = (void *) 412 skt->virt_io = (void *)
414 (ioremap((phys_t)AU1X_SOCK1_IO, 0x1000) - 413 (ioremap((phys_t)AU1X_SOCK1_IO, 0x1000) -
415 (u32)mips_io_port_base); 414 (u32)mips_io_port_base);
416 skt->phys_attr = AU1X_SOCK1_PSEUDO_PHYS_ATTR; 415 skt->phys_attr = AU1X_SOCK1_PHYS_ATTR;
417 skt->phys_mem = AU1X_SOCK1_PSEUDO_PHYS_MEM; 416 skt->phys_mem = AU1X_SOCK1_PHYS_MEM;
418 } 417 }
419#endif
420 pcmcia_base_vaddrs[i] = (u32 *)skt->virt_io; 418 pcmcia_base_vaddrs[i] = (u32 *)skt->virt_io;
421 ret = ops->hw_init(skt); 419 ret = ops->hw_init(skt);
422 420