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authorDaniel Yeisley <dan.yeisley@unisys.com>2005-12-05 07:06:43 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2006-01-09 15:13:18 -0500
commit9d265124d051c2cf6716639239609d83f736dcdb (patch)
tree24f84b02d4a4506606af4f6d17c3a90fd914e825 /drivers/pci
parent81f154427c0c50b6492d454abf98e15c1c2e354e (diff)
[PATCH] PCI Quirk: 1K I/O space granularity on Intel P64H2
I've implemented a quirk to take advantage of the 1KB I/O space granularity option on the Intel P64H2 PCI Bridge. I had to change probe.c because it sets the resource start and end to be aligned on 4k boundaries (after the quirk sets them to 1k boundaries). I've tested this patch on a Unisys ES7000-600 both with and without the 1KB option enabled. I also tested this on a 2 processor Dell box that doesn't have a P64H2 to make sure there were no negative affects there. Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/probe.c6
-rw-r--r--drivers/pci/quirks.c26
2 files changed, 30 insertions, 2 deletions
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 79be37a53397..00ba6a03dca5 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -264,8 +264,10 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
264 264
265 if (base <= limit) { 265 if (base <= limit) {
266 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; 266 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
267 res->start = base; 267 if (!res->start)
268 res->end = limit + 0xfff; 268 res->start = base;
269 if (!res->end)
270 res->end = limit + 0xfff;
269 } 271 }
270 272
271 res = child->resource[1]; 273 res = child->resource[1];
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f28ebdd3958a..605f0df0bfba 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1342,6 +1342,32 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
1342 pci_do_fixups(dev, start, end); 1342 pci_do_fixups(dev, start, end);
1343} 1343}
1344 1344
1345/* Enable 1k I/O space granularity on the Intel P64H2 */
1346static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
1347{
1348 u16 en1k;
1349 u8 io_base_lo, io_limit_lo;
1350 unsigned long base, limit;
1351 struct resource *res = dev->resource + PCI_BRIDGE_RESOURCES;
1352
1353 pci_read_config_word(dev, 0x40, &en1k);
1354
1355 if (en1k & 0x200) {
1356 printk(KERN_INFO "PCI: Enable I/O Space to 1 KB Granularity\n");
1357
1358 pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo);
1359 pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo);
1360 base = (io_base_lo & (PCI_IO_RANGE_MASK | 0x0c)) << 8;
1361 limit = (io_limit_lo & (PCI_IO_RANGE_MASK | 0x0c)) << 8;
1362
1363 if (base <= limit) {
1364 res->start = base;
1365 res->end = limit + 0x3ff;
1366 }
1367 }
1368}
1369DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1460, quirk_p64h2_1k_io);
1370
1345EXPORT_SYMBOL(pcie_mch_quirk); 1371EXPORT_SYMBOL(pcie_mch_quirk);
1346#ifdef CONFIG_HOTPLUG 1372#ifdef CONFIG_HOTPLUG
1347EXPORT_SYMBOL(pci_fixup_device); 1373EXPORT_SYMBOL(pci_fixup_device);