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authorManoj Iyer <manoj.iyer@canonical.com>2011-07-11 17:28:35 -0400
committerChris Ball <cjb@laptop.org>2011-07-21 10:35:04 -0400
commit15bed0f2fa8e1d7db201692532c210a7823d2d21 (patch)
tree6dbfff9a19ed69fac94e5a76f6df10ba13f41d93 /drivers/pci
parent770d7432009c8bc89cf72d47313866adf600c66a (diff)
mmc: Added quirks for Ricoh 1180:e823 lower base clock frequency
Ricoh 1180:e823 does not recognize certain types of SD/MMC cards, as reported at http://launchpad.net/bugs/773524. Lowering the SD base clock frequency from 200Mhz to 50Mhz fixes this issue. This solution was suggest by Koji Matsumuro, Ricoh Company, Ltd. This change has no negative performance effect on standard SD cards, though it's quite possible that there will be one on UHS-1 cards. Signed-off-by: Manoj Iyer <manoj.iyer@canonical.com> Tested-by: Daniel Manrique <daniel.manrique@canonical.com> Cc: Koji Matsumuro <matsumur@nts.ricoh.co.jp> Cc: <stable@kernel.org> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/quirks.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 02145e9697a9..1196f61a4ab6 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2758,6 +2758,29 @@ static void ricoh_mmc_fixup_r5c832(struct pci_dev *dev)
2758 2758
2759 dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via firewire function)\n"); 2759 dev_notice(&dev->dev, "proprietary Ricoh MMC controller disabled (via firewire function)\n");
2760 dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n"); 2760 dev_notice(&dev->dev, "MMC cards are now supported by standard SDHCI controller\n");
2761
2762 /*
2763 * RICOH 0xe823 SD/MMC card reader fails to recognize
2764 * certain types of SD/MMC cards. Lowering the SD base
2765 * clock frequency from 200Mhz to 50Mhz fixes this issue.
2766 *
2767 * 0x150 - SD2.0 mode enable for changing base clock
2768 * frequency to 50Mhz
2769 * 0xe1 - Base clock frequency
2770 * 0x32 - 50Mhz new clock frequency
2771 * 0xf9 - Key register for 0x150
2772 * 0xfc - key register for 0xe1
2773 */
2774 if (dev->device == PCI_DEVICE_ID_RICOH_R5CE823) {
2775 pci_write_config_byte(dev, 0xf9, 0xfc);
2776 pci_write_config_byte(dev, 0x150, 0x10);
2777 pci_write_config_byte(dev, 0xf9, 0x00);
2778 pci_write_config_byte(dev, 0xfc, 0x01);
2779 pci_write_config_byte(dev, 0xe1, 0x32);
2780 pci_write_config_byte(dev, 0xfc, 0x00);
2781
2782 dev_notice(&dev->dev, "MMC controller base frequency changed to 50Mhz.\n");
2783 }
2761} 2784}
2762DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832); 2785DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);
2763DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832); 2786DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, ricoh_mmc_fixup_r5c832);