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authorDavid Woodhouse <dwmw2@infradead.org>2009-02-13 18:18:03 -0500
committerIngo Molnar <mingo@elte.hu>2009-02-14 16:47:09 -0500
commit9af88143b277f52fc6ce0d69137f435c73c39c1a (patch)
treec382fdc5c8a1aa2860c03e52ea9341bb30207a18 /drivers/pci
parent2fff78c784ed97a8e5aa225ef5228f0a6d862d82 (diff)
iommu: fix Intel IOMMU write-buffer flushing
This is the cause of the DMA faults and disk corruption that people have been seeing. Some chipsets neglect to report the RWBF "capability" -- the flag which says that we need to flush the chipset write-buffer when changing the DMA page tables, to ensure that the change is visible to the IOMMU. Override that bit on the affected chipsets, and everything is happy again. Thanks to Chris and Bhavesh and others for helping to debug. Should resolve: https://bugzilla.redhat.com/show_bug.cgi?id=479996 http://bugzilla.kernel.org/show_bug.cgi?id=12578 Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Tested-and-acked-by: Chris Wright <chrisw@sous-sol.org> Reviewed-by: Bhavesh Davda <bhavesh@vmware.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/intel-iommu.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index f4b7c79023ff..f3f686581a90 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -61,6 +61,8 @@
61/* global iommu list, set NULL for ignored DMAR units */ 61/* global iommu list, set NULL for ignored DMAR units */
62static struct intel_iommu **g_iommus; 62static struct intel_iommu **g_iommus;
63 63
64static int rwbf_quirk;
65
64/* 66/*
65 * 0: Present 67 * 0: Present
66 * 1-11: Reserved 68 * 1-11: Reserved
@@ -785,7 +787,7 @@ static void iommu_flush_write_buffer(struct intel_iommu *iommu)
785 u32 val; 787 u32 val;
786 unsigned long flag; 788 unsigned long flag;
787 789
788 if (!cap_rwbf(iommu->cap)) 790 if (!rwbf_quirk && !cap_rwbf(iommu->cap))
789 return; 791 return;
790 val = iommu->gcmd | DMA_GCMD_WBF; 792 val = iommu->gcmd | DMA_GCMD_WBF;
791 793
@@ -3137,3 +3139,15 @@ static struct iommu_ops intel_iommu_ops = {
3137 .unmap = intel_iommu_unmap_range, 3139 .unmap = intel_iommu_unmap_range,
3138 .iova_to_phys = intel_iommu_iova_to_phys, 3140 .iova_to_phys = intel_iommu_iova_to_phys,
3139}; 3141};
3142
3143static void __devinit quirk_iommu_rwbf(struct pci_dev *dev)
3144{
3145 /*
3146 * Mobile 4 Series Chipset neglects to set RWBF capability,
3147 * but needs it:
3148 */
3149 printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n");
3150 rwbf_quirk = 1;
3151}
3152
3153DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);