diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-22 21:16:30 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-22 21:16:30 -0400 |
commit | 934b7024f0ed29003c95cef447d92737ab86dc4f (patch) | |
tree | eade0cdc07dbb8ab46c57244444fc8697e129f66 /drivers/pci | |
parent | 29591b92e19f409d5ad4c099c2b7b5ea56f50dfa (diff) |
Fix cardbus resource allocation
Commit 884525655d07fdee9245716b998ecdc45cdd8007 ("PCI: clean up resource
alignment management") didn't set the alignment information for the
cardbus window resources, causing their subsequent allocations to fail
miserably with a message like
yenta_cardbus 0000:15:00.0: device not available because of BAR 7 [100:1ff] collisions
yenta_cardbus: probe of 0000:15:00.0 failed with error -16
or similar.
This fixes it and clarifies the code a bit too (we used to have to use
the insane PCI bridge alignment logic that put the alignment in the
"start" field, this makes it use the slightly easier-to-understand
size-based alignment, and allows us to set the resource start to zero
until it gets allocated).
Reported-and-tested-by: Jeff Chua <jeff.chua.linux@gmail.com>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/setup-bus.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index f9b7bdd27829..8ddb918f5f57 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c | |||
@@ -416,13 +416,13 @@ static void pci_bus_size_cardbus(struct pci_bus *bus) | |||
416 | * Reserve some resources for CardBus. We reserve | 416 | * Reserve some resources for CardBus. We reserve |
417 | * a fixed amount of bus space for CardBus bridges. | 417 | * a fixed amount of bus space for CardBus bridges. |
418 | */ | 418 | */ |
419 | b_res[0].start = pci_cardbus_io_size; | 419 | b_res[0].start = 0; |
420 | b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1; | 420 | b_res[0].end = pci_cardbus_io_size - 1; |
421 | b_res[0].flags |= IORESOURCE_IO; | 421 | b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN; |
422 | 422 | ||
423 | b_res[1].start = pci_cardbus_io_size; | 423 | b_res[1].start = 0; |
424 | b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1; | 424 | b_res[1].end = pci_cardbus_io_size - 1; |
425 | b_res[1].flags |= IORESOURCE_IO; | 425 | b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN; |
426 | 426 | ||
427 | /* | 427 | /* |
428 | * Check whether prefetchable memory is supported | 428 | * Check whether prefetchable memory is supported |
@@ -441,17 +441,17 @@ static void pci_bus_size_cardbus(struct pci_bus *bus) | |||
441 | * twice the size. | 441 | * twice the size. |
442 | */ | 442 | */ |
443 | if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { | 443 | if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { |
444 | b_res[2].start = pci_cardbus_mem_size; | 444 | b_res[2].start = 0; |
445 | b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1; | 445 | b_res[2].end = pci_cardbus_mem_size - 1; |
446 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; | 446 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN; |
447 | 447 | ||
448 | b_res[3].start = pci_cardbus_mem_size; | 448 | b_res[3].start = 0; |
449 | b_res[3].end = b_res[3].start + pci_cardbus_mem_size - 1; | 449 | b_res[3].end = pci_cardbus_mem_size - 1; |
450 | b_res[3].flags |= IORESOURCE_MEM; | 450 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN; |
451 | } else { | 451 | } else { |
452 | b_res[3].start = pci_cardbus_mem_size * 2; | 452 | b_res[3].start = 0; |
453 | b_res[3].end = b_res[3].start + pci_cardbus_mem_size * 2 - 1; | 453 | b_res[3].end = pci_cardbus_mem_size * 2 - 1; |
454 | b_res[3].flags |= IORESOURCE_MEM; | 454 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN; |
455 | } | 455 | } |
456 | } | 456 | } |
457 | 457 | ||