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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2006-12-21 20:01:04 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2007-02-07 18:50:04 -0500
commit48fe39151727db350347e1dba09d71c8ca24207a (patch)
tree6b540050279409b0045b4fb66938ee0c18b5fecd /drivers/pci
parent2410fa4eaec4133f9fa8968f277ddb28b89b92b3 (diff)
pciehp: remove unnecessary php_ctlr
The struct php_ctlr seems to be only for complicating codes. This patch removes struct php_ctlr and related codes. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/hotplug/pciehp.h41
-rw-r--r--drivers/pci/hotplug/pciehp_core.c44
-rw-r--r--drivers/pci/hotplug/pciehp_ctrl.c12
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c517
4 files changed, 120 insertions, 494 deletions
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index d07ac45f1272..202e4967a941 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -70,30 +70,11 @@ struct event_info {
70 u8 hp_slot; 70 u8 hp_slot;
71}; 71};
72 72
73typedef u8(*php_intr_callback_t) (u8 hp_slot, void *instance_id);
74
75struct php_ctlr_state_s {
76 struct php_ctlr_state_s *pnext;
77 struct pci_dev *pci_dev;
78 unsigned int irq;
79 unsigned long flags; /* spinlock's */
80 u32 slot_device_offset;
81 u32 num_slots;
82 struct timer_list int_poll_timer; /* Added for poll event */
83 php_intr_callback_t attention_button_callback;
84 php_intr_callback_t switch_change_callback;
85 php_intr_callback_t presence_change_callback;
86 php_intr_callback_t power_fault_callback;
87 void *callback_instance_id;
88 struct ctrl_reg *creg; /* Ptr to controller register space */
89};
90
91#define MAX_EVENTS 10 73#define MAX_EVENTS 10
92struct controller { 74struct controller {
93 struct controller *next; 75 struct controller *next;
94 struct mutex crit_sect; /* critical section mutex */ 76 struct mutex crit_sect; /* critical section mutex */
95 struct mutex ctrl_lock; /* controller lock */ 77 struct mutex ctrl_lock; /* controller lock */
96 struct php_ctlr_state_s *hpc_ctlr_handle; /* HPC controller handle */
97 int num_slots; /* Number of slots on ctlr */ 78 int num_slots; /* Number of slots on ctlr */
98 int slot_num_inc; /* 1 or -1 */ 79 int slot_num_inc; /* 1 or -1 */
99 struct pci_dev *pci_dev; 80 struct pci_dev *pci_dev;
@@ -113,6 +94,7 @@ struct controller {
113 u8 ctrlcap; 94 u8 ctrlcap;
114 u16 vendor_id; 95 u16 vendor_id;
115 u8 cap_base; 96 u8 cap_base;
97 struct timer_list poll_timer;
116}; 98};
117 99
118#define INT_BUTTON_IGNORE 0 100#define INT_BUTTON_IGNORE 0
@@ -179,10 +161,10 @@ extern void pciehp_event_stop_thread (void);
179extern int pciehp_enable_slot (struct slot *slot); 161extern int pciehp_enable_slot (struct slot *slot);
180extern int pciehp_disable_slot (struct slot *slot); 162extern int pciehp_disable_slot (struct slot *slot);
181 163
182extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id); 164extern u8 pciehp_handle_attention_button(u8 hp_slot, struct controller *ctrl);
183extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id); 165extern u8 pciehp_handle_switch_change(u8 hp_slot, struct controller *ctrl);
184extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id); 166extern u8 pciehp_handle_presence_change(u8 hp_slot, struct controller *ctrl);
185extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id); 167extern u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl);
186/* extern void long_delay (int delay); */ 168/* extern void long_delay (int delay); */
187 169
188/* pci functions */ 170/* pci functions */
@@ -229,21 +211,8 @@ static inline int wait_for_ctrl_irq(struct controller *ctrl)
229 return retval; 211 return retval;
230} 212}
231 213
232enum php_ctlr_type {
233 PCI,
234 ISA,
235 ACPI
236};
237
238int pcie_init(struct controller *ctrl, struct pcie_device *dev); 214int pcie_init(struct controller *ctrl, struct pcie_device *dev);
239 215
240/* This has no meaning for PCI Express, as there is only 1 slot per port */
241int pcie_get_ctlr_slot_config(struct controller *ctrl,
242 int *num_ctlr_slots,
243 int *first_device_num,
244 int *physical_slot_num,
245 u8 *ctrlcap);
246
247struct hpc_ops { 216struct hpc_ops {
248 int (*power_on_slot) (struct slot *slot); 217 int (*power_on_slot) (struct slot *slot);
249 int (*power_off_slot) (struct slot *slot); 218 int (*power_off_slot) (struct slot *slot);
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 2ddde79e252c..a315685b2d37 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -187,33 +187,6 @@ static void cleanup_slots(struct controller *ctrl)
187 } 187 }
188} 188}
189 189
190static int get_ctlr_slot_config(struct controller *ctrl)
191{
192 int num_ctlr_slots; /* Not needed; PCI Express has 1 slot per port*/
193 int first_device_num; /* Not needed */
194 int physical_slot_num;
195 u8 ctrlcap;
196 int rc;
197
198 rc = pcie_get_ctlr_slot_config(ctrl, &num_ctlr_slots, &first_device_num, &physical_slot_num, &ctrlcap);
199 if (rc) {
200 err("%s: get_ctlr_slot_config fail for b:d (%x:%x)\n", __FUNCTION__, ctrl->bus, ctrl->device);
201 return (-1);
202 }
203
204 ctrl->num_slots = num_ctlr_slots; /* PCI Express has 1 slot per port */
205 ctrl->slot_device_offset = first_device_num;
206 ctrl->first_slot = physical_slot_num;
207 ctrl->ctrlcap = ctrlcap;
208
209 dbg("%s: bus(0x%x) num_slot(0x%x) 1st_dev(0x%x) psn(0x%x) ctrlcap(%x) for b:d (%x:%x)\n",
210 __FUNCTION__, ctrl->slot_bus, num_ctlr_slots, first_device_num, physical_slot_num, ctrlcap,
211 ctrl->bus, ctrl->device);
212
213 return (0);
214}
215
216
217/* 190/*
218 * set_attention_status - Turns the Amber LED for a slot on, off or blink 191 * set_attention_status - Turns the Amber LED for a slot on, off or blink
219 */ 192 */
@@ -352,8 +325,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
352 int rc; 325 int rc;
353 struct controller *ctrl; 326 struct controller *ctrl;
354 struct slot *t_slot; 327 struct slot *t_slot;
355 int first_device_num = 0 ; /* first PCI device number supported by this PCIE */
356 int num_ctlr_slots; /* number of slots supported by this HPC */
357 u8 value; 328 u8 value;
358 struct pci_dev *pdev; 329 struct pci_dev *pdev;
359 330
@@ -390,18 +361,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
390 dbg("%s: ctrl bus=0x%x, device=%x, function=%x, irq=%x\n", __FUNCTION__, 361 dbg("%s: ctrl bus=0x%x, device=%x, function=%x, irq=%x\n", __FUNCTION__,
391 ctrl->bus, ctrl->device, ctrl->function, pdev->irq); 362 ctrl->bus, ctrl->device, ctrl->function, pdev->irq);
392 363
393 /*
394 * Save configuration headers for this and subordinate PCI buses
395 */
396
397 rc = get_ctlr_slot_config(ctrl);
398 if (rc) {
399 err(msg_initialization_err, rc);
400 goto err_out_free_ctrl_bus;
401 }
402 first_device_num = ctrl->slot_device_offset;
403 num_ctlr_slots = ctrl->num_slots;
404
405 /* Setup the slot information structures */ 364 /* Setup the slot information structures */
406 rc = init_slots(ctrl); 365 rc = init_slots(ctrl);
407 if (rc) { 366 if (rc) {
@@ -409,7 +368,7 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
409 goto err_out_free_ctrl_slot; 368 goto err_out_free_ctrl_slot;
410 } 369 }
411 370
412 t_slot = pciehp_find_slot(ctrl, first_device_num); 371 t_slot = pciehp_find_slot(ctrl, ctrl->slot_device_offset);
413 372
414 /* Finish setting up the hot plug ctrl device */ 373 /* Finish setting up the hot plug ctrl device */
415 ctrl->next_event = 0; 374 ctrl->next_event = 0;
@@ -445,7 +404,6 @@ static int pciehp_probe(struct pcie_device *dev, const struct pcie_port_service_
445 404
446err_out_free_ctrl_slot: 405err_out_free_ctrl_slot:
447 cleanup_slots(ctrl); 406 cleanup_slots(ctrl);
448err_out_free_ctrl_bus:
449 kfree(ctrl->pci_bus); 407 kfree(ctrl->pci_bus);
450err_out_unmap_mmio_region: 408err_out_unmap_mmio_region:
451 ctrl->hpc_ops->release_ctlr(ctrl); 409 ctrl->hpc_ops->release_ctlr(ctrl);
diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c
index 372c63e35aa9..5bca9212f5e1 100644
--- a/drivers/pci/hotplug/pciehp_ctrl.c
+++ b/drivers/pci/hotplug/pciehp_ctrl.c
@@ -48,9 +48,8 @@ static inline char *slot_name(struct slot *p_slot)
48 return p_slot->hotplug_slot->name; 48 return p_slot->hotplug_slot->name;
49} 49}
50 50
51u8 pciehp_handle_attention_button(u8 hp_slot, void *inst_id) 51u8 pciehp_handle_attention_button(u8 hp_slot, struct controller *ctrl)
52{ 52{
53 struct controller *ctrl = (struct controller *) inst_id;
54 struct slot *p_slot; 53 struct slot *p_slot;
55 u8 rc = 0; 54 u8 rc = 0;
56 u8 getstatus; 55 u8 getstatus;
@@ -101,9 +100,8 @@ u8 pciehp_handle_attention_button(u8 hp_slot, void *inst_id)
101 100
102} 101}
103 102
104u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id) 103u8 pciehp_handle_switch_change(u8 hp_slot, struct controller *ctrl)
105{ 104{
106 struct controller *ctrl = (struct controller *) inst_id;
107 struct slot *p_slot; 105 struct slot *p_slot;
108 u8 rc = 0; 106 u8 rc = 0;
109 u8 getstatus; 107 u8 getstatus;
@@ -143,9 +141,8 @@ u8 pciehp_handle_switch_change(u8 hp_slot, void *inst_id)
143 return rc; 141 return rc;
144} 142}
145 143
146u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id) 144u8 pciehp_handle_presence_change(u8 hp_slot, struct controller *ctrl)
147{ 145{
148 struct controller *ctrl = (struct controller *) inst_id;
149 struct slot *p_slot; 146 struct slot *p_slot;
150 u8 presence_save, rc = 0; 147 u8 presence_save, rc = 0;
151 struct event_info *taskInfo; 148 struct event_info *taskInfo;
@@ -187,9 +184,8 @@ u8 pciehp_handle_presence_change(u8 hp_slot, void *inst_id)
187 return rc; 184 return rc;
188} 185}
189 186
190u8 pciehp_handle_power_fault(u8 hp_slot, void *inst_id) 187u8 pciehp_handle_power_fault(u8 hp_slot, struct controller *ctrl)
191{ 188{
192 struct controller *ctrl = (struct controller *) inst_id;
193 struct slot *p_slot; 189 struct slot *p_slot;
194 u8 rc = 0; 190 u8 rc = 0;
195 struct event_info *taskInfo; 191 struct event_info *taskInfo;
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 25d3aadfddbf..ed901b5c2798 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -218,72 +218,50 @@ static int pcie_cap_base = 0; /* Base of the PCI Express capability item struct
218static spinlock_t hpc_event_lock; 218static spinlock_t hpc_event_lock;
219 219
220DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ 220DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */
221static struct php_ctlr_state_s *php_ctlr_list_head; /* HPC state linked list */
222static int ctlr_seq_num = 0; /* Controller sequence # */ 221static int ctlr_seq_num = 0; /* Controller sequence # */
223static spinlock_t list_lock;
224 222
225static irqreturn_t pcie_isr(int IRQ, void *dev_id); 223static irqreturn_t pcie_isr(int irq, void *dev_id);
226 224static void start_int_poll_timer(struct controller *ctrl, int sec);
227static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds);
228 225
229/* This is the interrupt polling timeout function. */ 226/* This is the interrupt polling timeout function. */
230static void int_poll_timeout(unsigned long lphp_ctlr) 227static void int_poll_timeout(unsigned long data)
231{ 228{
232 struct php_ctlr_state_s *php_ctlr = (struct php_ctlr_state_s *)lphp_ctlr; 229 struct controller *ctrl = (struct controller *)data;
233 230
234 DBG_ENTER_ROUTINE 231 DBG_ENTER_ROUTINE
235 232
236 if ( !php_ctlr ) {
237 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
238 return;
239 }
240
241 /* Poll for interrupt events. regs == NULL => polling */ 233 /* Poll for interrupt events. regs == NULL => polling */
242 pcie_isr( 0, (void *)php_ctlr ); 234 pcie_isr(0, ctrl);
243
244 init_timer(&php_ctlr->int_poll_timer);
245 235
236 init_timer(&ctrl->poll_timer);
246 if (!pciehp_poll_time) 237 if (!pciehp_poll_time)
247 pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/ 238 pciehp_poll_time = 2; /* reset timer to poll in 2 secs if user doesn't specify at module installation*/
248 239
249 start_int_poll_timer(php_ctlr, pciehp_poll_time); 240 start_int_poll_timer(ctrl, pciehp_poll_time);
250
251 return;
252} 241}
253 242
254/* This function starts the interrupt polling timer. */ 243/* This function starts the interrupt polling timer. */
255static void start_int_poll_timer(struct php_ctlr_state_s *php_ctlr, int seconds) 244static void start_int_poll_timer(struct controller *ctrl, int sec)
256{ 245{
257 if (!php_ctlr) { 246 /* Clamp to sane value */
258 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 247 if ((sec <= 0) || (sec > 60))
259 return; 248 sec = 2;
260 } 249
261 250 ctrl->poll_timer.function = &int_poll_timeout;
262 if ( ( seconds <= 0 ) || ( seconds > 60 ) ) 251 ctrl->poll_timer.data = (unsigned long)ctrl;
263 seconds = 2; /* Clamp to sane value */ 252 ctrl->poll_timer.expires = jiffies + sec * HZ;
264 253 add_timer(&ctrl->poll_timer);
265 php_ctlr->int_poll_timer.function = &int_poll_timeout;
266 php_ctlr->int_poll_timer.data = (unsigned long)php_ctlr; /* Instance data */
267 php_ctlr->int_poll_timer.expires = jiffies + seconds * HZ;
268 add_timer(&php_ctlr->int_poll_timer);
269
270 return;
271} 254}
272 255
273static int pcie_write_cmd(struct slot *slot, u16 cmd) 256static int pcie_write_cmd(struct slot *slot, u16 cmd)
274{ 257{
275 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 258 struct controller *ctrl = slot->ctrl;
276 int retval = 0; 259 int retval = 0;
277 u16 slot_status; 260 u16 slot_status;
278 261
279 DBG_ENTER_ROUTINE 262 DBG_ENTER_ROUTINE
280 263
281 if (!php_ctlr) { 264 retval = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
282 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
283 return -1;
284 }
285
286 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
287 if (retval) { 265 if (retval) {
288 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 266 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
289 return retval; 267 return retval;
@@ -295,7 +273,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
295 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__); 273 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__);
296 } 274 }
297 275
298 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE); 276 retval = hp_register_write_word(ctrl->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE);
299 if (retval) { 277 if (retval) {
300 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 278 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
301 return retval; 279 return retval;
@@ -307,19 +285,12 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
307 285
308static int hpc_check_lnk_status(struct controller *ctrl) 286static int hpc_check_lnk_status(struct controller *ctrl)
309{ 287{
310 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
311 u16 lnk_status; 288 u16 lnk_status;
312 int retval = 0; 289 int retval = 0;
313 290
314 DBG_ENTER_ROUTINE 291 DBG_ENTER_ROUTINE
315 292
316 if (!php_ctlr) { 293 retval = hp_register_read_word(ctrl->pci_dev, LNK_STATUS(ctrl->cap_base), lnk_status);
317 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
318 return -1;
319 }
320
321 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS(ctrl->cap_base), lnk_status);
322
323 if (retval) { 294 if (retval) {
324 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__); 295 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__);
325 return retval; 296 return retval;
@@ -340,20 +311,14 @@ static int hpc_check_lnk_status(struct controller *ctrl)
340 311
341static int hpc_get_attention_status(struct slot *slot, u8 *status) 312static int hpc_get_attention_status(struct slot *slot, u8 *status)
342{ 313{
343 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 314 struct controller *ctrl = slot->ctrl;
344 u16 slot_ctrl; 315 u16 slot_ctrl;
345 u8 atten_led_state; 316 u8 atten_led_state;
346 int retval = 0; 317 int retval = 0;
347 318
348 DBG_ENTER_ROUTINE 319 DBG_ENTER_ROUTINE
349 320
350 if (!php_ctlr) { 321 retval = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
351 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
352 return -1;
353 }
354
355 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
356
357 if (retval) { 322 if (retval) {
358 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 323 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
359 return retval; 324 return retval;
@@ -385,27 +350,21 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status)
385 return 0; 350 return 0;
386} 351}
387 352
388static int hpc_get_power_status(struct slot * slot, u8 *status) 353static int hpc_get_power_status(struct slot *slot, u8 *status)
389{ 354{
390 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 355 struct controller *ctrl = slot->ctrl;
391 u16 slot_ctrl; 356 u16 slot_ctrl;
392 u8 pwr_state; 357 u8 pwr_state;
393 int retval = 0; 358 int retval = 0;
394 359
395 DBG_ENTER_ROUTINE 360 DBG_ENTER_ROUTINE
396 361
397 if (!php_ctlr) { 362 retval = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
398 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
399 return -1;
400 }
401
402 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
403
404 if (retval) { 363 if (retval) {
405 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 364 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
406 return retval; 365 return retval;
407 } 366 }
408 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl); 367 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
409 368
410 pwr_state = (slot_ctrl & PWR_CTRL) >> 10; 369 pwr_state = (slot_ctrl & PWR_CTRL) >> 10;
411 370
@@ -428,19 +387,13 @@ static int hpc_get_power_status(struct slot * slot, u8 *status)
428 387
429static int hpc_get_latch_status(struct slot *slot, u8 *status) 388static int hpc_get_latch_status(struct slot *slot, u8 *status)
430{ 389{
431 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 390 struct controller *ctrl = slot->ctrl;
432 u16 slot_status; 391 u16 slot_status;
433 int retval = 0; 392 int retval = 0;
434 393
435 DBG_ENTER_ROUTINE 394 DBG_ENTER_ROUTINE
436 395
437 if (!php_ctlr) { 396 retval = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
438 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
439 return -1;
440 }
441
442 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
443
444 if (retval) { 397 if (retval) {
445 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 398 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
446 return retval; 399 return retval;
@@ -454,20 +407,14 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status)
454 407
455static int hpc_get_adapter_status(struct slot *slot, u8 *status) 408static int hpc_get_adapter_status(struct slot *slot, u8 *status)
456{ 409{
457 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 410 struct controller *ctrl = slot->ctrl;
458 u16 slot_status; 411 u16 slot_status;
459 u8 card_state; 412 u8 card_state;
460 int retval = 0; 413 int retval = 0;
461 414
462 DBG_ENTER_ROUTINE 415 DBG_ENTER_ROUTINE
463 416
464 if (!php_ctlr) { 417 retval = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
465 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
466 return -1;
467 }
468
469 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
470
471 if (retval) { 418 if (retval) {
472 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 419 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
473 return retval; 420 return retval;
@@ -479,22 +426,16 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
479 return 0; 426 return 0;
480} 427}
481 428
482static int hpc_query_power_fault(struct slot * slot) 429static int hpc_query_power_fault(struct slot *slot)
483{ 430{
484 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 431 struct controller *ctrl = slot->ctrl;
485 u16 slot_status; 432 u16 slot_status;
486 u8 pwr_fault; 433 u8 pwr_fault;
487 int retval = 0; 434 int retval = 0;
488 435
489 DBG_ENTER_ROUTINE 436 DBG_ENTER_ROUTINE
490 437
491 if (!php_ctlr) { 438 retval = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
492 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
493 return -1;
494 }
495
496 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
497
498 if (retval) { 439 if (retval) {
499 err("%s : Cannot check for power fault\n", __FUNCTION__); 440 err("%s : Cannot check for power fault\n", __FUNCTION__);
500 return retval; 441 return retval;
@@ -507,24 +448,14 @@ static int hpc_query_power_fault(struct slot * slot)
507 448
508static int hpc_set_attention_status(struct slot *slot, u8 value) 449static int hpc_set_attention_status(struct slot *slot, u8 value)
509{ 450{
510 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 451 struct controller *ctrl = slot->ctrl;
511 u16 slot_cmd = 0; 452 u16 slot_cmd = 0;
512 u16 slot_ctrl; 453 u16 slot_ctrl;
513 int rc = 0; 454 int rc = 0;
514 455
515 DBG_ENTER_ROUTINE 456 DBG_ENTER_ROUTINE
516 457
517 if (!php_ctlr) { 458 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
518 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
519 return -1;
520 }
521
522 if (slot->hp_slot >= php_ctlr->num_slots) {
523 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
524 return -1;
525 }
526 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
527
528 if (rc) { 459 if (rc) {
529 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 460 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
530 return rc; 461 return rc;
@@ -556,25 +487,14 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
556 487
557static void hpc_set_green_led_on(struct slot *slot) 488static void hpc_set_green_led_on(struct slot *slot)
558{ 489{
559 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 490 struct controller *ctrl = slot->ctrl;
560 u16 slot_cmd; 491 u16 slot_cmd;
561 u16 slot_ctrl; 492 u16 slot_ctrl;
562 int rc = 0; 493 int rc = 0;
563 494
564 DBG_ENTER_ROUTINE 495 DBG_ENTER_ROUTINE
565 496
566 if (!php_ctlr) { 497 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
567 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
568 return ;
569 }
570
571 if (slot->hp_slot >= php_ctlr->num_slots) {
572 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
573 return ;
574 }
575
576 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
577
578 if (rc) { 498 if (rc) {
579 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 499 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
580 return; 500 return;
@@ -592,25 +512,14 @@ static void hpc_set_green_led_on(struct slot *slot)
592 512
593static void hpc_set_green_led_off(struct slot *slot) 513static void hpc_set_green_led_off(struct slot *slot)
594{ 514{
595 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 515 struct controller *ctrl = slot->ctrl;
596 u16 slot_cmd; 516 u16 slot_cmd;
597 u16 slot_ctrl; 517 u16 slot_ctrl;
598 int rc = 0; 518 int rc = 0;
599 519
600 DBG_ENTER_ROUTINE 520 DBG_ENTER_ROUTINE
601 521
602 if (!php_ctlr) { 522 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
603 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
604 return ;
605 }
606
607 if (slot->hp_slot >= php_ctlr->num_slots) {
608 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
609 return ;
610 }
611
612 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
613
614 if (rc) { 523 if (rc) {
615 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 524 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
616 return; 525 return;
@@ -629,25 +538,14 @@ static void hpc_set_green_led_off(struct slot *slot)
629 538
630static void hpc_set_green_led_blink(struct slot *slot) 539static void hpc_set_green_led_blink(struct slot *slot)
631{ 540{
632 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 541 struct controller *ctrl = slot->ctrl;
633 u16 slot_cmd; 542 u16 slot_cmd;
634 u16 slot_ctrl; 543 u16 slot_ctrl;
635 int rc = 0; 544 int rc = 0;
636 545
637 DBG_ENTER_ROUTINE 546 DBG_ENTER_ROUTINE
638 547
639 if (!php_ctlr) { 548 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
640 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
641 return ;
642 }
643
644 if (slot->hp_slot >= php_ctlr->num_slots) {
645 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
646 return ;
647 }
648
649 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
650
651 if (rc) { 549 if (rc) {
652 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 550 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
653 return; 551 return;
@@ -664,119 +562,39 @@ static void hpc_set_green_led_blink(struct slot *slot)
664 return; 562 return;
665} 563}
666 564
667int pcie_get_ctlr_slot_config(struct controller *ctrl,
668 int *num_ctlr_slots, /* number of slots in this HPC; only 1 in PCIE */
669 int *first_device_num, /* PCI dev num of the first slot in this PCIE */
670 int *physical_slot_num, /* phy slot num of the first slot in this PCIE */
671 u8 *ctrlcap)
672{
673 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
674 u32 slot_cap;
675 int rc = 0;
676
677 DBG_ENTER_ROUTINE
678
679 if (!php_ctlr) {
680 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
681 return -1;
682 }
683
684 *first_device_num = 0;
685 *num_ctlr_slots = 1;
686
687 rc = hp_register_read_dword(php_ctlr->pci_dev, SLOT_CAP(ctrl->cap_base), slot_cap);
688
689 if (rc) {
690 err("%s : hp_register_read_dword SLOT_CAP failed\n", __FUNCTION__);
691 return -1;
692 }
693
694 *physical_slot_num = slot_cap >> 19;
695 dbg("%s: PSN %d \n", __FUNCTION__, *physical_slot_num);
696
697 *ctrlcap = slot_cap & 0x0000007f;
698
699 DBG_LEAVE_ROUTINE
700 return 0;
701}
702
703static void hpc_release_ctlr(struct controller *ctrl) 565static void hpc_release_ctlr(struct controller *ctrl)
704{ 566{
705 struct php_ctlr_state_s *php_ctlr = ctrl->hpc_ctlr_handle;
706 struct php_ctlr_state_s *p, *p_prev;
707
708 DBG_ENTER_ROUTINE 567 DBG_ENTER_ROUTINE
709 568
710 if (!php_ctlr) { 569 if (pciehp_poll_mode)
711 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 570 del_timer(&ctrl->poll_timer);
712 return ; 571 else
713 } 572 free_irq(ctrl->pci_dev->irq, ctrl);
714
715 if (pciehp_poll_mode) {
716 del_timer(&php_ctlr->int_poll_timer);
717 } else {
718 if (php_ctlr->irq) {
719 free_irq(php_ctlr->irq, ctrl);
720 php_ctlr->irq = 0;
721 }
722 }
723 if (php_ctlr->pci_dev)
724 php_ctlr->pci_dev = NULL;
725
726 spin_lock(&list_lock);
727 p = php_ctlr_list_head;
728 p_prev = NULL;
729 while (p) {
730 if (p == php_ctlr) {
731 if (p_prev)
732 p_prev->pnext = p->pnext;
733 else
734 php_ctlr_list_head = p->pnext;
735 break;
736 } else {
737 p_prev = p;
738 p = p->pnext;
739 }
740 }
741 spin_unlock(&list_lock);
742
743 kfree(php_ctlr);
744 573
745 DBG_LEAVE_ROUTINE 574 DBG_LEAVE_ROUTINE
746
747} 575}
748 576
749static int hpc_power_on_slot(struct slot * slot) 577static int hpc_power_on_slot(struct slot * slot)
750{ 578{
751 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 579 struct controller *ctrl = slot->ctrl;
752 u16 slot_cmd; 580 u16 slot_cmd;
753 u16 slot_ctrl, slot_status; 581 u16 slot_ctrl, slot_status;
754
755 int retval = 0; 582 int retval = 0;
756 583
757 DBG_ENTER_ROUTINE 584 DBG_ENTER_ROUTINE
758 585
759 if (!php_ctlr) {
760 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
761 return -1;
762 }
763
764 dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); 586 dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot);
765 if (slot->hp_slot >= php_ctlr->num_slots) {
766 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
767 return -1;
768 }
769 587
770 /* Clear sticky power-fault bit from previous power failures */ 588 /* Clear sticky power-fault bit from previous power failures */
771 hp_register_read_word(php_ctlr->pci_dev, 589 hp_register_read_word(ctrl->pci_dev,
772 SLOT_STATUS(slot->ctrl->cap_base), slot_status); 590 SLOT_STATUS(ctrl->cap_base), slot_status);
773 slot_status &= PWR_FAULT_DETECTED; 591 slot_status &= PWR_FAULT_DETECTED;
774 if (slot_status) 592 if (slot_status)
775 hp_register_write_word(php_ctlr->pci_dev, 593 hp_register_write_word(ctrl->pci_dev,
776 SLOT_STATUS(slot->ctrl->cap_base), slot_status); 594 SLOT_STATUS(ctrl->cap_base), slot_status);
777
778 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
779 595
596 retval = hp_register_read_word(ctrl->pci_dev,
597 SLOT_CTRL(ctrl->cap_base), slot_ctrl);
780 if (retval) { 598 if (retval) {
781 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 599 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
782 return retval; 600 return retval;
@@ -807,27 +625,16 @@ static int hpc_power_on_slot(struct slot * slot)
807 625
808static int hpc_power_off_slot(struct slot * slot) 626static int hpc_power_off_slot(struct slot * slot)
809{ 627{
810 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 628 struct controller *ctrl = slot->ctrl;
811 u16 slot_cmd; 629 u16 slot_cmd;
812 u16 slot_ctrl; 630 u16 slot_ctrl;
813
814 int retval = 0; 631 int retval = 0;
815 632
816 DBG_ENTER_ROUTINE 633 DBG_ENTER_ROUTINE
817 634
818 if (!php_ctlr) {
819 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
820 return -1;
821 }
822
823 dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot); 635 dbg("%s: slot->hp_slot %x\n", __FUNCTION__, slot->hp_slot);
824 slot->hp_slot = 0;
825 if (slot->hp_slot >= php_ctlr->num_slots) {
826 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
827 return -1;
828 }
829 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
830 636
637 retval = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
831 if (retval) { 638 if (retval) {
832 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 639 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
833 return retval; 640 return retval;
@@ -861,38 +668,15 @@ static int hpc_power_off_slot(struct slot * slot)
861 return retval; 668 return retval;
862} 669}
863 670
864static irqreturn_t pcie_isr(int IRQ, void *dev_id) 671static irqreturn_t pcie_isr(int irq, void *dev_id)
865{ 672{
866 struct controller *ctrl = NULL; 673 struct controller *ctrl = (struct controller *)dev_id;
867 struct php_ctlr_state_s *php_ctlr;
868 u8 schedule_flag = 0;
869 u16 slot_status, intr_detect, intr_loc; 674 u16 slot_status, intr_detect, intr_loc;
870 u16 temp_word; 675 u16 temp_word;
871 int hp_slot = 0; /* only 1 slot per PCI Express port */ 676 int hp_slot = 0; /* only 1 slot per PCI Express port */
872 int rc = 0; 677 int rc = 0;
873 678
874 if (!dev_id) 679 rc = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
875 return IRQ_NONE;
876
877 if (!pciehp_poll_mode) {
878 ctrl = dev_id;
879 php_ctlr = ctrl->hpc_ctlr_handle;
880 } else {
881 php_ctlr = dev_id;
882 ctrl = (struct controller *)php_ctlr->callback_instance_id;
883 }
884
885 if (!ctrl) {
886 dbg("%s: dev_id %p ctlr == NULL\n", __FUNCTION__, (void*) dev_id);
887 return IRQ_NONE;
888 }
889
890 if (!php_ctlr) {
891 dbg("%s: php_ctlr == NULL\n", __FUNCTION__);
892 return IRQ_NONE;
893 }
894
895 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
896 if (rc) { 680 if (rc) {
897 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 681 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
898 return IRQ_NONE; 682 return IRQ_NONE;
@@ -910,7 +694,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
910 dbg("%s: intr_loc %x\n", __FUNCTION__, intr_loc); 694 dbg("%s: intr_loc %x\n", __FUNCTION__, intr_loc);
911 /* Mask Hot-plug Interrupt Enable */ 695 /* Mask Hot-plug Interrupt Enable */
912 if (!pciehp_poll_mode) { 696 if (!pciehp_poll_mode) {
913 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 697 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
914 if (rc) { 698 if (rc) {
915 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 699 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
916 return IRQ_NONE; 700 return IRQ_NONE;
@@ -919,13 +703,13 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
919 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 703 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
920 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; 704 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
921 705
922 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 706 rc = hp_register_write_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
923 if (rc) { 707 if (rc) {
924 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 708 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
925 return IRQ_NONE; 709 return IRQ_NONE;
926 } 710 }
927 711
928 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 712 rc = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
929 if (rc) { 713 if (rc) {
930 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 714 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
931 return IRQ_NONE; 715 return IRQ_NONE;
@@ -934,7 +718,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
934 718
935 /* Clear command complete interrupt caused by this write */ 719 /* Clear command complete interrupt caused by this write */
936 temp_word = 0x1f; 720 temp_word = 0x1f;
937 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 721 rc = hp_register_write_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
938 if (rc) { 722 if (rc) {
939 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 723 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
940 return IRQ_NONE; 724 return IRQ_NONE;
@@ -948,29 +732,28 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
948 wake_up_interruptible(&ctrl->queue); 732 wake_up_interruptible(&ctrl->queue);
949 } 733 }
950 734
951 if ((php_ctlr->switch_change_callback) && (intr_loc & MRL_SENS_CHANGED)) 735 if (intr_loc & MRL_SENS_CHANGED)
952 schedule_flag += php_ctlr->switch_change_callback( 736 pciehp_handle_switch_change(hp_slot, ctrl);
953 hp_slot, php_ctlr->callback_instance_id); 737
954 if ((php_ctlr->attention_button_callback) && (intr_loc & ATTN_BUTTN_PRESSED)) 738 if (intr_loc & ATTN_BUTTN_PRESSED)
955 schedule_flag += php_ctlr->attention_button_callback( 739 pciehp_handle_attention_button(hp_slot, ctrl);
956 hp_slot, php_ctlr->callback_instance_id); 740
957 if ((php_ctlr->presence_change_callback) && (intr_loc & PRSN_DETECT_CHANGED)) 741 if (intr_loc & PRSN_DETECT_CHANGED)
958 schedule_flag += php_ctlr->presence_change_callback( 742 pciehp_handle_presence_change(hp_slot, ctrl);
959 hp_slot , php_ctlr->callback_instance_id); 743
960 if ((php_ctlr->power_fault_callback) && (intr_loc & PWR_FAULT_DETECTED)) 744 if (intr_loc & PWR_FAULT_DETECTED)
961 schedule_flag += php_ctlr->power_fault_callback( 745 pciehp_handle_power_fault(hp_slot, ctrl);
962 hp_slot, php_ctlr->callback_instance_id);
963 746
964 /* Clear all events after serving them */ 747 /* Clear all events after serving them */
965 temp_word = 0x1F; 748 temp_word = 0x1F;
966 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 749 rc = hp_register_write_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
967 if (rc) { 750 if (rc) {
968 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 751 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
969 return IRQ_NONE; 752 return IRQ_NONE;
970 } 753 }
971 /* Unmask Hot-plug Interrupt Enable */ 754 /* Unmask Hot-plug Interrupt Enable */
972 if (!pciehp_poll_mode) { 755 if (!pciehp_poll_mode) {
973 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 756 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
974 if (rc) { 757 if (rc) {
975 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 758 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
976 return IRQ_NONE; 759 return IRQ_NONE;
@@ -979,13 +762,13 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
979 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__); 762 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__);
980 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 763 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
981 764
982 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 765 rc = hp_register_write_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
983 if (rc) { 766 if (rc) {
984 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 767 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
985 return IRQ_NONE; 768 return IRQ_NONE;
986 } 769 }
987 770
988 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 771 rc = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
989 if (rc) { 772 if (rc) {
990 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 773 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
991 return IRQ_NONE; 774 return IRQ_NONE;
@@ -993,7 +776,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
993 776
994 /* Clear command complete interrupt caused by this write */ 777 /* Clear command complete interrupt caused by this write */
995 temp_word = 0x1F; 778 temp_word = 0x1F;
996 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 779 rc = hp_register_write_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
997 if (rc) { 780 if (rc) {
998 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 781 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
999 return IRQ_NONE; 782 return IRQ_NONE;
@@ -1006,25 +789,14 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id)
1006 789
1007static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value) 790static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
1008{ 791{
1009 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 792 struct controller *ctrl = slot->ctrl;
1010 enum pcie_link_speed lnk_speed; 793 enum pcie_link_speed lnk_speed;
1011 u32 lnk_cap; 794 u32 lnk_cap;
1012 int retval = 0; 795 int retval = 0;
1013 796
1014 DBG_ENTER_ROUTINE 797 DBG_ENTER_ROUTINE
1015 798
1016 if (!php_ctlr) { 799 retval = hp_register_read_dword(ctrl->pci_dev, LNK_CAP(ctrl->cap_base), lnk_cap);
1017 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
1018 return -1;
1019 }
1020
1021 if (slot->hp_slot >= php_ctlr->num_slots) {
1022 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
1023 return -1;
1024 }
1025
1026 retval = hp_register_read_dword(php_ctlr->pci_dev, LNK_CAP(slot->ctrl->cap_base), lnk_cap);
1027
1028 if (retval) { 800 if (retval) {
1029 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__); 801 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__);
1030 return retval; 802 return retval;
@@ -1047,25 +819,14 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
1047 819
1048static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value) 820static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value)
1049{ 821{
1050 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 822 struct controller *ctrl = slot->ctrl;
1051 enum pcie_link_width lnk_wdth; 823 enum pcie_link_width lnk_wdth;
1052 u32 lnk_cap; 824 u32 lnk_cap;
1053 int retval = 0; 825 int retval = 0;
1054 826
1055 DBG_ENTER_ROUTINE 827 DBG_ENTER_ROUTINE
1056 828
1057 if (!php_ctlr) { 829 retval = hp_register_read_dword(ctrl->pci_dev, LNK_CAP(ctrl->cap_base), lnk_cap);
1058 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
1059 return -1;
1060 }
1061
1062 if (slot->hp_slot >= php_ctlr->num_slots) {
1063 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
1064 return -1;
1065 }
1066
1067 retval = hp_register_read_dword(php_ctlr->pci_dev, LNK_CAP(slot->ctrl->cap_base), lnk_cap);
1068
1069 if (retval) { 830 if (retval) {
1070 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__); 831 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__);
1071 return retval; 832 return retval;
@@ -1109,25 +870,14 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value
1109 870
1110static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value) 871static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
1111{ 872{
1112 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 873 struct controller *ctrl = slot->ctrl;
1113 enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN; 874 enum pcie_link_speed lnk_speed = PCI_SPEED_UNKNOWN;
1114 int retval = 0; 875 int retval = 0;
1115 u16 lnk_status; 876 u16 lnk_status;
1116 877
1117 DBG_ENTER_ROUTINE 878 DBG_ENTER_ROUTINE
1118 879
1119 if (!php_ctlr) { 880 retval = hp_register_read_word(ctrl->pci_dev, LNK_STATUS(ctrl->cap_base), lnk_status);
1120 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
1121 return -1;
1122 }
1123
1124 if (slot->hp_slot >= php_ctlr->num_slots) {
1125 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
1126 return -1;
1127 }
1128
1129 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS(slot->ctrl->cap_base), lnk_status);
1130
1131 if (retval) { 881 if (retval) {
1132 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__); 882 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__);
1133 return retval; 883 return retval;
@@ -1150,25 +900,14 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
1150 900
1151static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value) 901static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value)
1152{ 902{
1153 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 903 struct controller *ctrl = slot->ctrl;
1154 enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN; 904 enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
1155 int retval = 0; 905 int retval = 0;
1156 u16 lnk_status; 906 u16 lnk_status;
1157 907
1158 DBG_ENTER_ROUTINE 908 DBG_ENTER_ROUTINE
1159 909
1160 if (!php_ctlr) { 910 retval = hp_register_read_word(ctrl->pci_dev, LNK_STATUS(ctrl->cap_base), lnk_status);
1161 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
1162 return -1;
1163 }
1164
1165 if (slot->hp_slot >= php_ctlr->num_slots) {
1166 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
1167 return -1;
1168 }
1169
1170 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS(slot->ctrl->cap_base), lnk_status);
1171
1172 if (retval) { 911 if (retval) {
1173 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__); 912 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__);
1174 return retval; 913 return retval;
@@ -1305,8 +1044,6 @@ int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev)
1305 1044
1306int pcie_init(struct controller * ctrl, struct pcie_device *dev) 1045int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1307{ 1046{
1308 struct php_ctlr_state_s *php_ctlr, *p;
1309 void *instance_id = ctrl;
1310 int rc; 1047 int rc;
1311 static int first = 1; 1048 static int first = 1;
1312 u16 temp_word; 1049 u16 temp_word;
@@ -1319,18 +1056,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1319 1056
1320 DBG_ENTER_ROUTINE 1057 DBG_ENTER_ROUTINE
1321 1058
1322 spin_lock_init(&list_lock);
1323 php_ctlr = kmalloc(sizeof(struct php_ctlr_state_s), GFP_KERNEL);
1324
1325 if (!php_ctlr) { /* allocate controller state data */
1326 err("%s: HPC controller memory allocation error!\n", __FUNCTION__);
1327 goto abort;
1328 }
1329
1330 memset(php_ctlr, 0, sizeof(struct php_ctlr_state_s));
1331
1332 pdev = dev->port; 1059 pdev = dev->port;
1333 php_ctlr->pci_dev = pdev; /* save pci_dev in context */ 1060 ctrl->pci_dev = pdev; /* save pci_dev in context */
1334 1061
1335 dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n", 1062 dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n",
1336 __FUNCTION__, pdev->vendor, pdev->device); 1063 __FUNCTION__, pdev->vendor, pdev->device);
@@ -1359,7 +1086,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1359 goto abort_free_ctlr; 1086 goto abort_free_ctlr;
1360 } 1087 }
1361 1088
1362 rc = hp_register_read_dword(php_ctlr->pci_dev, SLOT_CAP(ctrl->cap_base), slot_cap); 1089 rc = hp_register_read_dword(ctrl->pci_dev, SLOT_CAP(ctrl->cap_base), slot_cap);
1363 if (rc) { 1090 if (rc) {
1364 err("%s : hp_register_read_word CAP_REG failed\n", __FUNCTION__); 1091 err("%s : hp_register_read_word CAP_REG failed\n", __FUNCTION__);
1365 goto abort_free_ctlr; 1092 goto abort_free_ctlr;
@@ -1371,14 +1098,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1371 goto abort_free_ctlr; 1098 goto abort_free_ctlr;
1372 } 1099 }
1373 /* For debugging purpose */ 1100 /* For debugging purpose */
1374 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1101 rc = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1375 if (rc) { 1102 if (rc) {
1376 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1103 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1377 goto abort_free_ctlr; 1104 goto abort_free_ctlr;
1378 } 1105 }
1379 dbg("%s: SLOT_STATUS offset %x slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), slot_status); 1106 dbg("%s: SLOT_STATUS offset %x slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), slot_status);
1380 1107
1381 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl); 1108 rc = hp_register_read_word(ctrl->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
1382 if (rc) { 1109 if (rc) {
1383 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1110 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1384 goto abort_free_ctlr; 1111 goto abort_free_ctlr;
@@ -1405,19 +1132,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1405 /* setup wait queue */ 1132 /* setup wait queue */
1406 init_waitqueue_head(&ctrl->queue); 1133 init_waitqueue_head(&ctrl->queue);
1407 1134
1408 /* find the IRQ */
1409 php_ctlr->irq = dev->irq;
1410
1411 /* Save interrupt callback info */
1412 php_ctlr->attention_button_callback = pciehp_handle_attention_button;
1413 php_ctlr->switch_change_callback = pciehp_handle_switch_change;
1414 php_ctlr->presence_change_callback = pciehp_handle_presence_change;
1415 php_ctlr->power_fault_callback = pciehp_handle_power_fault;
1416 php_ctlr->callback_instance_id = instance_id;
1417
1418 /* return PCI Controller Info */ 1135 /* return PCI Controller Info */
1419 php_ctlr->slot_device_offset = 0; 1136 ctrl->slot_device_offset = 0;
1420 php_ctlr->num_slots = 1; 1137 ctrl->num_slots = 1;
1138 ctrl->first_slot = slot_cap >> 19;
1139 ctrl->ctrlcap = slot_cap & 0x0000007f;
1421 1140
1422 /* Mask Hot-plug Interrupt Enable */ 1141 /* Mask Hot-plug Interrupt Enable */
1423 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1142 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -1435,33 +1154,35 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1435 goto abort_free_ctlr; 1154 goto abort_free_ctlr;
1436 } 1155 }
1437 1156
1438 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1157 rc = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1439 if (rc) { 1158 if (rc) {
1440 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1159 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1441 goto abort_free_ctlr; 1160 goto abort_free_ctlr;
1442 } 1161 }
1443 1162
1444 temp_word = 0x1F; /* Clear all events */ 1163 temp_word = 0x1F; /* Clear all events */
1445 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1164 rc = hp_register_write_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
1446 if (rc) { 1165 if (rc) {
1447 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1166 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1448 goto abort_free_ctlr; 1167 goto abort_free_ctlr;
1449 } 1168 }
1450 1169
1451 if (pciehp_poll_mode) {/* Install interrupt polling code */ 1170 if (pciehp_poll_mode) {
1452 /* Install and start the interrupt polling timer */ 1171 /* Install interrupt polling timer. Start with 10 sec delay */
1453 init_timer(&php_ctlr->int_poll_timer); 1172 init_timer(&ctrl->poll_timer);
1454 start_int_poll_timer( php_ctlr, 10 ); /* start with 10 second delay */ 1173 start_int_poll_timer(ctrl, 10);
1455 } else { 1174 } else {
1456 /* Installs the interrupt handler */ 1175 /* Installs the interrupt handler */
1457 rc = request_irq(php_ctlr->irq, pcie_isr, IRQF_SHARED, MY_NAME, (void *) ctrl); 1176 rc = request_irq(ctrl->pci_dev->irq, pcie_isr, IRQF_SHARED,
1458 dbg("%s: request_irq %d for hpc%d (returns %d)\n", __FUNCTION__, php_ctlr->irq, ctlr_seq_num, rc); 1177 MY_NAME, (void *)ctrl);
1178 dbg("%s: request_irq %d for hpc%d (returns %d)\n",
1179 __FUNCTION__, ctrl->pci_dev->irq, ctlr_seq_num, rc);
1459 if (rc) { 1180 if (rc) {
1460 err("Can't get irq %d for the hotplug controller\n", php_ctlr->irq); 1181 err("Can't get irq %d for the hotplug controller\n",
1182 ctrl->pci_dev->irq);
1461 goto abort_free_ctlr; 1183 goto abort_free_ctlr;
1462 } 1184 }
1463 } 1185 }
1464
1465 dbg("pciehp ctrl b:d:f:irq=0x%x:%x:%x:%x\n", pdev->bus->number, 1186 dbg("pciehp ctrl b:d:f:irq=0x%x:%x:%x:%x\n", pdev->bus->number,
1466 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq); 1187 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1467 1188
@@ -1496,14 +1217,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1496 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1217 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1497 goto abort_free_irq; 1218 goto abort_free_irq;
1498 } 1219 }
1499 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1220 rc = hp_register_read_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1500 if (rc) { 1221 if (rc) {
1501 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1222 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1502 goto abort_disable_intr; 1223 goto abort_disable_intr;
1503 } 1224 }
1504 1225
1505 temp_word = 0x1F; /* Clear all events */ 1226 temp_word = 0x1F; /* Clear all events */
1506 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1227 rc = hp_register_write_word(ctrl->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
1507 if (rc) { 1228 if (rc) {
1508 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1229 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1509 goto abort_disable_intr; 1230 goto abort_disable_intr;
@@ -1518,24 +1239,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1518 goto abort_disable_intr; 1239 goto abort_disable_intr;
1519 } 1240 }
1520 1241
1521 /* Add this HPC instance into the HPC list */
1522 spin_lock(&list_lock);
1523 if (php_ctlr_list_head == 0) {
1524 php_ctlr_list_head = php_ctlr;
1525 p = php_ctlr_list_head;
1526 p->pnext = NULL;
1527 } else {
1528 p = php_ctlr_list_head;
1529
1530 while (p->pnext)
1531 p = p->pnext;
1532
1533 p->pnext = php_ctlr;
1534 }
1535 spin_unlock(&list_lock);
1536
1537 ctlr_seq_num++; 1242 ctlr_seq_num++;
1538 ctrl->hpc_ctlr_handle = php_ctlr;
1539 ctrl->hpc_ops = &pciehp_hpc_ops; 1243 ctrl->hpc_ops = &pciehp_hpc_ops;
1540 1244
1541 DBG_LEAVE_ROUTINE 1245 DBG_LEAVE_ROUTINE
@@ -1553,14 +1257,13 @@ abort_disable_intr:
1553 1257
1554abort_free_irq: 1258abort_free_irq:
1555 if (pciehp_poll_mode) 1259 if (pciehp_poll_mode)
1556 del_timer_sync(&php_ctlr->int_poll_timer); 1260 del_timer_sync(&ctrl->poll_timer);
1557 else 1261 else
1558 free_irq(php_ctlr->irq, ctrl); 1262 free_irq(ctrl->pci_dev->irq, ctrl);
1559 1263
1560abort_free_ctlr: 1264abort_free_ctlr:
1561 pcie_cap_base = saved_cap_base; 1265 pcie_cap_base = saved_cap_base;
1562 kfree(php_ctlr); 1266
1563abort:
1564 DBG_LEAVE_ROUTINE 1267 DBG_LEAVE_ROUTINE
1565 return -1; 1268 return -1;
1566} 1269}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 15:44:10 -0500