Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
  x86/PCI: truncate _CRS windows with _LEN > _MAX - _MIN + 1
  x86/PCI: for host bridge address space collisions, show conflicting resource
  frv/PCI: remove redundant warnings
  x86/PCI: remove redundant warnings
  PCI: don't say we claimed a resource if we failed
  PCI quirk: Disable MSI on VIA K8T890 systems
  PCI quirk: RS780/RS880: work around missing MSI initialization
  PCI quirk: only apply CX700 PCI bus parking quirk if external VT6212L is present
  PCI: complain about devices that seem to be broken
  PCI: print resources consistently with %pR
  PCI: make disabled window printk style match the enabled ones
  PCI: break out primary/secondary/subordinate for readability
  PCI: for address space collisions, show conflicting resource
  resources: add interfaces that return conflict information
  PCI: cleanup error return for pcix get and set mmrbc functions
  PCI: fix access of PCI_X_CMD by pcix get and set mmrbc functions
  PCI: kill off pci_register_set_vga_state() symbol export.
  PCI: fix return value from pcix_get_max_mmrbc()

6 files changed, 121 insertions, 63 deletions

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 40b48f569b1e..9665d6b17a2a 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -832,9 +832,8 @@ static inline void dbg_ctrl(struct controller *ctrl)
         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
                 if (!pci_resource_len(pdev, i))
                         continue;
-                ctrl_info(ctrl, "  PCI resource [%d]     : 0x%llx@0x%llx\n",
-                          i, (unsigned long long)pci_resource_len(pdev, i),
-                          (unsigned long long)pci_resource_start(pdev, i));
+                ctrl_info(ctrl, "  PCI resource [%d]     : %pR\n",
+                          i, &pdev->resource[i]);
         }
         ctrl_info(ctrl, "Slot Capabilities      : 0x%08x\n", ctrl->slot_cap);
         ctrl_info(ctrl, "  Physical Slot Number : %d\n", PSN(ctrl));
diff --git a/drivers/pci/ioapic.c b/drivers/pci/ioapic.c
index 3e0d7b5dd1b9..fb9fdf4a42bf 100644
--- a/drivers/pci/ioapic.c
+++ b/drivers/pci/ioapic.c
@@ -31,9 +31,9 @@ static int ioapic_probe(struct pci_dev *dev, const struct pci_device_id *ent)
         acpi_status status;
         unsigned long long gsb;
         struct ioapic *ioapic;
-        u64 addr;
         int ret;
         char *type;
+        struct resource *res;
 
         handle = DEVICE_ACPI_HANDLE(&dev->dev);
         if (!handle)
@@ -69,13 +69,12 @@ static int ioapic_probe(struct pci_dev *dev, const struct pci_device_id *ent)
         if (pci_request_region(dev, 0, type))
                 goto exit_disable;
 
-        addr = pci_resource_start(dev, 0);
-        if (acpi_register_ioapic(ioapic->handle, addr, ioapic->gsi_base))
+        res = &dev->resource[0];
+        if (acpi_register_ioapic(ioapic->handle, res->start, ioapic->gsi_base))
                 goto exit_release;
 
         pci_set_drvdata(dev, ioapic);
-        dev_info(&dev->dev, "%s at %#llx, GSI %u\n", type, addr,
-                 ioapic->gsi_base);
+        dev_info(&dev->dev, "%s at %pR, GSI %u\n", type, res, ioapic->gsi_base);
         return 0;
 
 exit_release:
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index cb1dd5f4988c..1531f3a49879 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2576,18 +2576,17 @@ EXPORT_SYMBOL_GPL(pci_reset_function);
  */
 int pcix_get_max_mmrbc(struct pci_dev *dev)
 {
-        int err, cap;
+        int cap;
         u32 stat;
 
         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!cap)
                 return -EINVAL;
 
-        err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
-        if (err)
+        if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
                 return -EINVAL;
 
-        return (stat & PCI_X_STATUS_MAX_READ) >> 12;
+        return 512 << ((stat & PCI_X_STATUS_MAX_READ) >> 21);
 }
 EXPORT_SYMBOL(pcix_get_max_mmrbc);
 
@@ -2600,18 +2599,17 @@ EXPORT_SYMBOL(pcix_get_max_mmrbc);
  */
 int pcix_get_mmrbc(struct pci_dev *dev)
 {
-        int ret, cap;
-        u32 cmd;
+        int cap;
+        u16 cmd;
 
         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!cap)
                 return -EINVAL;
 
-        ret = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd);
-        if (!ret)
-                ret = 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
+        if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
+                return -EINVAL;
 
-        return ret;
+        return 512 << ((cmd & PCI_X_CMD_MAX_READ) >> 2);
 }
 EXPORT_SYMBOL(pcix_get_mmrbc);
 
@@ -2626,28 +2624,27 @@ EXPORT_SYMBOL(pcix_get_mmrbc);
  */
 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
 {
-        int cap, err = -EINVAL;
-        u32 stat, cmd, v, o;
+        int cap;
+        u32 stat, v, o;
+        u16 cmd;
 
         if (mmrbc < 512 || mmrbc > 4096 || !is_power_of_2(mmrbc))
-                goto out;
+                return -EINVAL;
 
         v = ffs(mmrbc) - 10;
 
         cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
         if (!cap)
-                goto out;
+                return -EINVAL;
 
-        err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
-        if (err)
-                goto out;
+        if (pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat))
+                return -EINVAL;
 
         if (v > (stat & PCI_X_STATUS_MAX_READ) >> 21)
                 return -E2BIG;
 
-        err = pci_read_config_dword(dev, cap + PCI_X_CMD, &cmd);
-        if (err)
-                goto out;
+        if (pci_read_config_word(dev, cap + PCI_X_CMD, &cmd))
+                return -EINVAL;
 
         o = (cmd & PCI_X_CMD_MAX_READ) >> 2;
         if (o != v) {
@@ -2657,10 +2654,10 @@ int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
 
                 cmd &= ~PCI_X_CMD_MAX_READ;
                 cmd |= v << 2;
-                err = pci_write_config_dword(dev, cap + PCI_X_CMD, cmd);
+                if (pci_write_config_word(dev, cap + PCI_X_CMD, cmd))
+                        return -EIO;
         }
-out:
-        return err;
+        return 0;
 }
 EXPORT_SYMBOL(pcix_set_mmrbc);
 
@@ -3023,7 +3020,6 @@ EXPORT_SYMBOL(pcim_pin_device);
 EXPORT_SYMBOL(pci_disable_device);
 EXPORT_SYMBOL(pci_find_capability);
 EXPORT_SYMBOL(pci_bus_find_capability);
-EXPORT_SYMBOL(pci_register_set_vga_state);
 EXPORT_SYMBOL(pci_release_regions);
 EXPORT_SYMBOL(pci_request_regions);
 EXPORT_SYMBOL(pci_request_regions_exclusive);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 2a943090a3b7..882bd8d29fe3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -174,14 +174,19 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
         pci_read_config_dword(dev, pos, &sz);
         pci_write_config_dword(dev, pos, l);
 
+        if (!sz)
+                goto fail;      /* BAR not implemented */
+
         /*
          * All bits set in sz means the device isn't working properly.
-         * If the BAR isn't implemented, all bits must be 0.  If it's a
-         * memory BAR or a ROM, bit 0 must be clear; if it's an io BAR, bit
-         * 1 must be clear.
+         * If it's a memory BAR or a ROM, bit 0 must be clear; if it's
+         * an io BAR, bit 1 must be clear.
          */
-        if (!sz || sz == 0xffffffff)
+        if (sz == 0xffffffff) {
+                dev_err(&dev->dev, "reg %x: invalid size %#x; broken device?\n",
+                        pos, sz);
                 goto fail;
+        }
 
         /*
          * I don't know how l can have all bits set.  Copied from old code.
@@ -244,13 +249,17 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                                    pos, res);
                 }
         } else {
-                sz = pci_size(l, sz, mask);
+                u32 size = pci_size(l, sz, mask);
 
-                if (!sz)
+                if (!size) {
+                        dev_err(&dev->dev, "reg %x: invalid size "
+                                "(l %#x sz %#x mask %#x); broken device?",
+                                pos, l, sz, mask);
                         goto fail;
+                }
 
                 res->start = l;
-                res->end = l + sz;
+                res->end = l + size;
 
                 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
         }
@@ -312,7 +321,7 @@ static void __devinit pci_read_bridge_io(struct pci_bus *child)
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         } else {
                 dev_printk(KERN_DEBUG, &dev->dev,
-                         "  bridge window [io  %04lx - %04lx] reg reading\n",
+                         "  bridge window [io  %#06lx-%#06lx] (disabled)\n",
                                  base, limit);
         }
 }
@@ -336,7 +345,7 @@ static void __devinit pci_read_bridge_mmio(struct pci_bus *child)
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         } else {
                 dev_printk(KERN_DEBUG, &dev->dev,
-                        "  bridge window [mem 0x%08lx - 0x%08lx] reg reading\n",
+                        "  bridge window [mem %#010lx-%#010lx] (disabled)\n",
                                          base, limit + 0xfffff);
         }
 }
@@ -387,7 +396,7 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child)
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         } else {
                 dev_printk(KERN_DEBUG, &dev->dev,
-                     "  bridge window [mem 0x%08lx - %08lx pref] reg reading\n",
+                     "  bridge window [mem %#010lx-%#010lx pref] (disabled)\n",
                                          base, limit + 0xfffff);
         }
 }
@@ -673,16 +682,20 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
         int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
         u32 buses, i, j = 0;
         u16 bctl;
+        u8 primary, secondary, subordinate;
         int broken = 0;
 
         pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
+        primary = buses & 0xFF;
+        secondary = (buses >> 8) & 0xFF;
+        subordinate = (buses >> 16) & 0xFF;
 
-        dev_dbg(&dev->dev, "scanning behind bridge, config %06x, pass %d\n",
-                buses & 0xffffff, pass);
+        dev_dbg(&dev->dev, "scanning [bus %02x-%02x] behind bridge, pass %d\n",
+                secondary, subordinate, pass);
 
         /* Check if setup is sensible at all */
         if (!pass &&
-            ((buses & 0xff) != bus->number || ((buses >> 8) & 0xff) <= bus->number)) {
+            (primary != bus->number || secondary <= bus->number)) {
                 dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
                 broken = 1;
         }
@@ -693,15 +706,15 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
         pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
                               bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
 
-        if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus && !broken) {
-                unsigned int cmax, busnr;
+        if ((secondary || subordinate) && !pcibios_assign_all_busses() &&
+            !is_cardbus && !broken) {
+                unsigned int cmax;
                 /*
                  * Bus already configured by firmware, process it in the first
                  * pass and just note the configuration.
                  */
                 if (pass)
                         goto out;
-                busnr = (buses >> 8) & 0xFF;
 
                 /*
                  * If we already got to this bus through a different bridge,
@@ -710,13 +723,13 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
                  * However, we continue to descend down the hierarchy and
                  * scan remaining child buses.
                  */
-                child = pci_find_bus(pci_domain_nr(bus), busnr);
+                child = pci_find_bus(pci_domain_nr(bus), secondary);
                 if (!child) {
-                        child = pci_add_new_bus(bus, dev, busnr);
+                        child = pci_add_new_bus(bus, dev, secondary);
                         if (!child)
                                 goto out;
-                        child->primary = buses & 0xFF;
-                        child->subordinate = (buses >> 16) & 0xFF;
+                        child->primary = primary;
+                        child->subordinate = subordinate;
                         child->bridge_ctl = bctl;
                 }
 
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 81d19d5683ac..3ea0b29c0104 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -368,8 +368,9 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
                 bus_region.end = res->end;
                 pcibios_bus_to_resource(dev, res, &bus_region);
 
-                pci_claim_resource(dev, nr);
-                dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
+                if (pci_claim_resource(dev, nr) == 0)
+                        dev_info(&dev->dev, "quirk: %pR claimed by %s\n",
+                                 res, name);
         }
 }       
 
@@ -1977,11 +1978,25 @@ static void __devinit quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
         /*
          * Disable PCI Bus Parking and PCI Master read caching on CX700
          * which causes unspecified timing errors with a VT6212L on the PCI
-         * bus leading to USB2.0 packet loss. The defaults are that these
-         * features are turned off but some BIOSes turn them on.
+         * bus leading to USB2.0 packet loss.
+         *
+         * This quirk is only enabled if a second (on the external PCI bus)
+         * VT6212L is found -- the CX700 core itself also contains a USB
+         * host controller with the same PCI ID as the VT6212L.
          */
 
+        /* Count VT6212L instances */
+        struct pci_dev *p = pci_get_device(PCI_VENDOR_ID_VIA,
+                PCI_DEVICE_ID_VIA_8235_USB_2, NULL);
         uint8_t b;
+
+        /* p should contain the first (internal) VT6212L -- see if we have
+           an external one by searching again */
+        p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235_USB_2, p);
+        if (!p)
+                return;
+        pci_dev_put(p);
+
         if (pci_read_config_byte(dev, 0x76, &b) == 0) {
                 if (b & 0x40) {
                         /* Turn off PCI Bus Parking */
@@ -2008,7 +2023,7 @@ static void __devinit quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
                 }
         }
 }
-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching);
 
 /*
  * For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
@@ -2108,6 +2123,7 @@ static void __devinit quirk_disable_msi(struct pci_dev *dev)
         }
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0xa238, quirk_disable_msi);
 
 /* Go through the list of Hypertransport capabilities and
  * return 1 if a HT MSI capability is found and enabled */
@@ -2479,6 +2495,39 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4374,
 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x4375,
                         quirk_msi_intx_disable_bug);
 
+/*
+ * MSI does not work with the AMD RS780/RS880 internal graphics and HDMI audio
+ * devices unless the BIOS has initialized the nb_cntl.strap_msi_enable bit.
+ */
+static void __init rs780_int_gfx_disable_msi(struct pci_dev *int_gfx_bridge)
+{
+        u32 nb_cntl;
+
+        if (!int_gfx_bridge->subordinate)
+                return;
+
+        pci_bus_write_config_dword(int_gfx_bridge->bus, PCI_DEVFN(0, 0),
+                                   0x60, 0);
+        pci_bus_read_config_dword(int_gfx_bridge->bus, PCI_DEVFN(0, 0),
+                                  0x64, &nb_cntl);
+
+        if (!(nb_cntl & BIT(10))) {
+                dev_warn(&int_gfx_bridge->dev,
+                         FW_WARN "RS780: MSI for internal graphics disabled\n");
+                int_gfx_bridge->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
+        }
+}
+
+#define PCI_DEVICE_ID_AMD_RS780_P2P_INT_GFX     0x9602
+
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD,
+                        PCI_DEVICE_ID_AMD_RS780_P2P_INT_GFX,
+                        rs780_int_gfx_disable_msi);
+/* wrong vendor ID on M4A785TD motherboard: */
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASUSTEK,
+                        PCI_DEVICE_ID_AMD_RS780_P2P_INT_GFX,
+                        rs780_int_gfx_disable_msi);
+
 #endif /* CONFIG_PCI_MSI */
 
 #ifdef CONFIG_PCI_IOV
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 7d678bb15ffb..17bed18d24ad 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -93,8 +93,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
 int pci_claim_resource(struct pci_dev *dev, int resource)
 {
         struct resource *res = &dev->resource[resource];
-        struct resource *root;
-        int err;
+        struct resource *root, *conflict;
 
         root = pci_find_parent_resource(dev, res);
         if (!root) {
@@ -103,12 +102,15 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
                 return -EINVAL;
         }
 
-        err = request_resource(root, res);
-        if (err)
+        conflict = request_resource_conflict(root, res);
+        if (conflict) {
                 dev_err(&dev->dev,
-                        "address space collision: %pR already in use\n", res);
+                        "address space collision: %pR conflicts with %s %pR\n",
+                        res, conflict->name, conflict);
+                return -EBUSY;
+        }
 
-        return err;
+        return 0;
 }
 EXPORT_SYMBOL(pci_claim_resource);