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authorRafael J. Wysocki <rjw@sisk.pl>2010-06-18 11:04:22 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2010-06-18 12:36:37 -0400
commitb27759f880018b0cd43543dc94c921341b64b5ec (patch)
tree486e63a80e0f11d93f9f8ee3a5780b5030154cd0 /drivers/pci
parent7e27d6e778cd87b6f2415515d7127eba53fe5d02 (diff)
PCI/PM: Do not use native PCIe PME by default
Commit c7f486567c1d0acd2e4166c47069835b9f75e77b (PCI PM: PCIe PME root port service driver) causes the native PCIe PME signaling to be used by default, if the BIOS allows the kernel to control the standard configuration registers of PCIe root ports. However, the native PCIe PME is coupled to the native PCIe hotplug and calling pcie_pme_acpi_setup() makes some BIOSes expect that the native PCIe hotplug will be used as well. That, in turn, causes problems to appear on systems where the PCIe hotplug driver is not loaded. The usual symptom, as reported by Jaroslav KamenĂ­k and others, is that the ACPI GPE associated with PCIe hotplug keeps firing continuously causing kacpid to take substantial percentage of CPU time. To work around this issue, change the default so that the native PCIe PME signaling is only used if directly requested with the help of the pcie_pme= command line switch. Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15924 , which is a listed regression from 2.6.33. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Reported-by: Jaroslav KamenĂ­k <jaroslav@kamenik.cz> Tested-by: Antoni Grzymala <antekgrzymala@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pcie/pme/pcie_pme.c19
1 files changed, 13 insertions, 6 deletions
diff --git a/drivers/pci/pcie/pme/pcie_pme.c b/drivers/pci/pcie/pme/pcie_pme.c
index aac285a16b62..d672a0a63816 100644
--- a/drivers/pci/pcie/pme/pcie_pme.c
+++ b/drivers/pci/pcie/pme/pcie_pme.c
@@ -34,7 +34,7 @@
34 * being registered. Consequently, the interrupt-based PCIe PME signaling will 34 * being registered. Consequently, the interrupt-based PCIe PME signaling will
35 * not be used by any PCIe root ports in that case. 35 * not be used by any PCIe root ports in that case.
36 */ 36 */
37static bool pcie_pme_disabled; 37static bool pcie_pme_disabled = true;
38 38
39/* 39/*
40 * The PCI Express Base Specification 2.0, Section 6.1.8, states the following: 40 * The PCI Express Base Specification 2.0, Section 6.1.8, states the following:
@@ -64,12 +64,19 @@ bool pcie_pme_msi_disabled;
64 64
65static int __init pcie_pme_setup(char *str) 65static int __init pcie_pme_setup(char *str)
66{ 66{
67 if (!strcmp(str, "off")) 67 if (!strncmp(str, "auto", 4))
68 pcie_pme_disabled = true; 68 pcie_pme_disabled = false;
69 else if (!strcmp(str, "force")) 69 else if (!strncmp(str, "force", 5))
70 pcie_pme_force_enable = true; 70 pcie_pme_force_enable = true;
71 else if (!strcmp(str, "nomsi")) 71
72 pcie_pme_msi_disabled = true; 72 str = strchr(str, ',');
73 if (str) {
74 str++;
75 str += strspn(str, " \t");
76 if (*str && !strcmp(str, "nomsi"))
77 pcie_pme_msi_disabled = true;
78 }
79
73 return 1; 80 return 1;
74} 81}
75__setup("pcie_pme=", pcie_pme_setup); 82__setup("pcie_pme=", pcie_pme_setup);