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authorEric W. Biederman <ebiederm@xmission.com>2006-10-04 05:17:00 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 10:55:29 -0400
commit03571e11c4a6d08230657f80970f0a5cc7820471 (patch)
tree1ee056fff8d00a49f51116932bedf38ea592d038 /drivers/pci
parent3b7d1921f4cdd6d6ddb7899ae7a8d413991c5cf4 (diff)
[PATCH] msi: move the ia64 code into arch/ia64
This is just a few makefile tweaks and some file renames. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Tony Luck <tony.luck@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Greg KH <greg@kroah.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/Makefile9
-rw-r--r--drivers/pci/msi-altix.c230
-rw-r--r--drivers/pci/msi-apic.c143
3 files changed, 3 insertions, 379 deletions
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 2752c57ecf01..04694ec7224b 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -14,6 +14,9 @@ obj-$(CONFIG_HOTPLUG) += hotplug.o
14# Build the PCI Hotplug drivers if we were asked to 14# Build the PCI Hotplug drivers if we were asked to
15obj-$(CONFIG_HOTPLUG_PCI) += hotplug/ 15obj-$(CONFIG_HOTPLUG_PCI) += hotplug/
16 16
17# Build the PCI MSI interrupt support
18obj-$(CONFIG_PCI_MSI) += msi.o
19
17# 20#
18# Some architectures use the generic PCI setup functions 21# Some architectures use the generic PCI setup functions
19# 22#
@@ -28,12 +31,6 @@ obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
28obj-$(CONFIG_X86_VISWS) += setup-irq.o 31obj-$(CONFIG_X86_VISWS) += setup-irq.o
29obj-$(CONFIG_HT_IRQ) += htirq.o 32obj-$(CONFIG_HT_IRQ) += htirq.o
30 33
31msiobj-y := msi.o
32msiobj-$(CONFIG_IA64) += msi-apic.o
33msiobj-$(CONFIG_IA64_GENERIC) += msi-altix.o
34msiobj-$(CONFIG_IA64_SGI_SN2) += msi-altix.o
35obj-$(CONFIG_PCI_MSI) += $(msiobj-y)
36
37# 34#
38# ACPI Related PCI FW Functions 35# ACPI Related PCI FW Functions
39# 36#
diff --git a/drivers/pci/msi-altix.c b/drivers/pci/msi-altix.c
deleted file mode 100644
index 6ffd1f850d41..000000000000
--- a/drivers/pci/msi-altix.c
+++ /dev/null
@@ -1,230 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All Rights Reserved.
7 */
8
9#include <linux/types.h>
10#include <linux/irq.h>
11#include <linux/pci.h>
12#include <linux/cpumask.h>
13#include <linux/msi.h>
14
15#include <asm/sn/addrs.h>
16#include <asm/sn/intr.h>
17#include <asm/sn/pcibus_provider_defs.h>
18#include <asm/sn/pcidev.h>
19#include <asm/sn/nodepda.h>
20
21struct sn_msi_info {
22 u64 pci_addr;
23 struct sn_irq_info *sn_irq_info;
24};
25
26static struct sn_msi_info sn_msi_info[NR_IRQS];
27
28static struct irq_chip sn_msi_chip;
29
30void sn_teardown_msi_irq(unsigned int irq)
31{
32 nasid_t nasid;
33 int widget;
34 struct pci_dev *pdev;
35 struct pcidev_info *sn_pdev;
36 struct sn_irq_info *sn_irq_info;
37 struct pcibus_bussoft *bussoft;
38 struct sn_pcibus_provider *provider;
39
40 sn_irq_info = sn_msi_info[irq].sn_irq_info;
41 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
42 return;
43
44 sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
45 pdev = sn_pdev->pdi_linux_pcidev;
46 provider = SN_PCIDEV_BUSPROVIDER(pdev);
47
48 (*provider->dma_unmap)(pdev,
49 sn_msi_info[irq].pci_addr,
50 PCI_DMA_FROMDEVICE);
51 sn_msi_info[irq].pci_addr = 0;
52
53 bussoft = SN_PCIDEV_BUSSOFT(pdev);
54 nasid = NASID_GET(bussoft->bs_base);
55 widget = (nasid & 1) ?
56 TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
57 SWIN_WIDGETNUM(bussoft->bs_base);
58
59 sn_intr_free(nasid, widget, sn_irq_info);
60 sn_msi_info[irq].sn_irq_info = NULL;
61
62 return;
63}
64
65int sn_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
66{
67 struct msi_msg msg;
68 struct msi_desc *entry;
69 int widget;
70 int status;
71 nasid_t nasid;
72 u64 bus_addr;
73 struct sn_irq_info *sn_irq_info;
74 struct pcibus_bussoft *bussoft = SN_PCIDEV_BUSSOFT(pdev);
75 struct sn_pcibus_provider *provider = SN_PCIDEV_BUSPROVIDER(pdev);
76
77 entry = get_irq_data(irq);
78 if (!entry->msi_attrib.is_64)
79 return -EINVAL;
80
81 if (bussoft == NULL)
82 return -EINVAL;
83
84 if (provider == NULL || provider->dma_map_consistent == NULL)
85 return -EINVAL;
86
87 /*
88 * Set up the vector plumbing. Let the prom (via sn_intr_alloc)
89 * decide which cpu to direct this msi at by default.
90 */
91
92 nasid = NASID_GET(bussoft->bs_base);
93 widget = (nasid & 1) ?
94 TIO_SWIN_WIDGETNUM(bussoft->bs_base) :
95 SWIN_WIDGETNUM(bussoft->bs_base);
96
97 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
98 if (! sn_irq_info)
99 return -ENOMEM;
100
101 status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1);
102 if (status) {
103 kfree(sn_irq_info);
104 return -ENOMEM;
105 }
106
107 sn_irq_info->irq_int_bit = -1; /* mark this as an MSI irq */
108 sn_irq_fixup(pdev, sn_irq_info);
109
110 /* Prom probably should fill these in, but doesn't ... */
111 sn_irq_info->irq_bridge_type = bussoft->bs_asic_type;
112 sn_irq_info->irq_bridge = (void *)bussoft->bs_base;
113
114 /*
115 * Map the xio address into bus space
116 */
117 bus_addr = (*provider->dma_map_consistent)(pdev,
118 sn_irq_info->irq_xtalkaddr,
119 sizeof(sn_irq_info->irq_xtalkaddr),
120 SN_DMA_MSI|SN_DMA_ADDR_XIO);
121 if (! bus_addr) {
122 sn_intr_free(nasid, widget, sn_irq_info);
123 kfree(sn_irq_info);
124 return -ENOMEM;
125 }
126
127 sn_msi_info[irq].sn_irq_info = sn_irq_info;
128 sn_msi_info[irq].pci_addr = bus_addr;
129
130 msg.address_hi = (u32)(bus_addr >> 32);
131 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
132
133 /*
134 * In the SN platform, bit 16 is a "send vector" bit which
135 * must be present in order to move the vector through the system.
136 */
137 msg.data = 0x100 + irq;
138
139#ifdef CONFIG_SMP
140 set_irq_affinity_info(irq, sn_irq_info->irq_cpuid, 0);
141#endif
142
143 write_msi_msg(irq, &msg);
144 set_irq_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq);
145
146 return 0;
147}
148
149#ifdef CONFIG_SMP
150static void sn_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
151{
152 struct msi_msg msg;
153 int slice;
154 nasid_t nasid;
155 u64 bus_addr;
156 struct pci_dev *pdev;
157 struct pcidev_info *sn_pdev;
158 struct sn_irq_info *sn_irq_info;
159 struct sn_irq_info *new_irq_info;
160 struct sn_pcibus_provider *provider;
161 unsigned int cpu;
162
163 cpu = first_cpu(cpu_mask);
164 sn_irq_info = sn_msi_info[irq].sn_irq_info;
165 if (sn_irq_info == NULL || sn_irq_info->irq_int_bit >= 0)
166 return;
167
168 /*
169 * Release XIO resources for the old MSI PCI address
170 */
171
172 read_msi_msg(irq, &msg);
173 sn_pdev = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
174 pdev = sn_pdev->pdi_linux_pcidev;
175 provider = SN_PCIDEV_BUSPROVIDER(pdev);
176
177 bus_addr = (u64)(msg.address_hi) << 32 | (u64)(msg.address_lo);
178 (*provider->dma_unmap)(pdev, bus_addr, PCI_DMA_FROMDEVICE);
179 sn_msi_info[irq].pci_addr = 0;
180
181 nasid = cpuid_to_nasid(cpu);
182 slice = cpuid_to_slice(cpu);
183
184 new_irq_info = sn_retarget_vector(sn_irq_info, nasid, slice);
185 sn_msi_info[irq].sn_irq_info = new_irq_info;
186 if (new_irq_info == NULL)
187 return;
188
189 /*
190 * Map the xio address into bus space
191 */
192
193 bus_addr = (*provider->dma_map_consistent)(pdev,
194 new_irq_info->irq_xtalkaddr,
195 sizeof(new_irq_info->irq_xtalkaddr),
196 SN_DMA_MSI|SN_DMA_ADDR_XIO);
197
198 sn_msi_info[irq].pci_addr = bus_addr;
199 msg.address_hi = (u32)(bus_addr >> 32);
200 msg.address_lo = (u32)(bus_addr & 0x00000000ffffffff);
201
202 write_msi_msg(irq, &msg);
203 set_native_irq_info(irq, cpu_mask);
204}
205#endif /* CONFIG_SMP */
206
207static void sn_ack_msi_irq(unsigned int irq)
208{
209 move_native_irq(irq);
210 ia64_eoi();
211}
212
213static int sn_msi_retrigger_irq(unsigned int irq)
214{
215 unsigned int vector = irq;
216 ia64_resend_irq(vector);
217
218 return 1;
219}
220
221static struct irq_chip sn_msi_chip = {
222 .name = "PCI-MSI",
223 .mask = mask_msi_irq,
224 .unmask = unmask_msi_irq,
225 .ack = sn_ack_msi_irq,
226#ifdef CONFIG_SMP
227 .set_affinity = sn_set_msi_irq_affinity,
228#endif
229 .retrigger = sn_msi_retrigger_irq,
230};
diff --git a/drivers/pci/msi-apic.c b/drivers/pci/msi-apic.c
deleted file mode 100644
index 822e59a1b822..000000000000
--- a/drivers/pci/msi-apic.c
+++ /dev/null
@@ -1,143 +0,0 @@
1/*
2 * MSI hooks for standard x86 apic
3 */
4
5#include <linux/pci.h>
6#include <linux/irq.h>
7#include <linux/msi.h>
8#include <asm/smp.h>
9
10/*
11 * Shifts for APIC-based data
12 */
13
14#define MSI_DATA_VECTOR_SHIFT 0
15#define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT)
16
17#define MSI_DATA_DELIVERY_SHIFT 8
18#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_SHIFT)
19#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_SHIFT)
20
21#define MSI_DATA_LEVEL_SHIFT 14
22#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
23#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
24
25#define MSI_DATA_TRIGGER_SHIFT 15
26#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
27#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
28
29/*
30 * Shift/mask fields for APIC-based bus address
31 */
32
33#define MSI_TARGET_CPU_SHIFT 4
34#define MSI_ADDR_HEADER 0xfee00000
35
36#define MSI_ADDR_DESTID_MASK 0xfff0000f
37#define MSI_ADDR_DESTID_CPU(cpu) ((cpu) << MSI_TARGET_CPU_SHIFT)
38
39#define MSI_ADDR_DESTMODE_SHIFT 2
40#define MSI_ADDR_DESTMODE_PHYS (0 << MSI_ADDR_DESTMODE_SHIFT)
41#define MSI_ADDR_DESTMODE_LOGIC (1 << MSI_ADDR_DESTMODE_SHIFT)
42
43#define MSI_ADDR_REDIRECTION_SHIFT 3
44#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
45#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
46
47static struct irq_chip ia64_msi_chip;
48
49#ifdef CONFIG_SMP
50static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
51{
52 struct msi_msg msg;
53 u32 addr;
54
55 read_msi_msg(irq, &msg);
56
57 addr = msg.address_lo;
58 addr &= MSI_ADDR_DESTID_MASK;
59 addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(first_cpu(cpu_mask)));
60 msg.address_lo = addr;
61
62 write_msi_msg(irq, &msg);
63 set_native_irq_info(irq, cpu_mask);
64}
65#endif /* CONFIG_SMP */
66
67int ia64_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
68{
69 struct msi_msg msg;
70 unsigned long dest_phys_id;
71 unsigned int vector;
72
73 dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
74 vector = irq;
75
76 msg.address_hi = 0;
77 msg.address_lo =
78 MSI_ADDR_HEADER |
79 MSI_ADDR_DESTMODE_PHYS |
80 MSI_ADDR_REDIRECTION_CPU |
81 MSI_ADDR_DESTID_CPU(dest_phys_id);
82
83 msg.data =
84 MSI_DATA_TRIGGER_EDGE |
85 MSI_DATA_LEVEL_ASSERT |
86 MSI_DATA_DELIVERY_FIXED |
87 MSI_DATA_VECTOR(vector);
88
89 write_msi_msg(irq, &msg);
90 set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
91
92 return 0;
93}
94
95void ia64_teardown_msi_irq(unsigned int irq)
96{
97 return; /* no-op */
98}
99
100static void ia64_ack_msi_irq(unsigned int irq)
101{
102 move_native_irq(irq);
103 ia64_eoi();
104}
105
106static int ia64_msi_retrigger_irq(unsigned int irq)
107{
108 unsigned int vector = irq;
109 ia64_resend_irq(vector);
110
111 return 1;
112}
113
114/*
115 * Generic ops used on most IA64 platforms.
116 */
117static struct irq_chip ia64_msi_chip = {
118 .name = "PCI-MSI",
119 .mask = mask_msi_irq,
120 .unmask = unmask_msi_irq,
121 .ack = ia64_ack_msi_irq,
122#ifdef CONFIG_SMP
123 .set_affinity = ia64_set_msi_irq_affinity,
124#endif
125 .retrigger = ia64_msi_retrigger_irq,
126};
127
128
129int arch_setup_msi_irq(unsigned int irq, struct pci_dev *pdev)
130{
131 if (platform_setup_msi_irq)
132 return platform_setup_msi_irq(irq, pdev);
133
134 return ia64_setup_msi_irq(irq, pdev);
135}
136
137void arch_teardown_msi_irq(unsigned int irq)
138{
139 if (platform_teardown_msi_irq)
140 return platform_teardown_msi_irq(irq);
141
142 return ia64_teardown_msi_irq(irq);
143}
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