diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-24 16:57:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-24 16:57:13 -0400 |
commit | 5042d99795d3d817bef2f4cc46e953bee9bf7398 (patch) | |
tree | 9263e28b67093eca6edd221f04830e5841f67c57 /drivers/pci | |
parent | 5c402355adf8f920531f02099f4ec0d2bccd4c64 (diff) | |
parent | f17a077e61b627e58db5926bc474cf308318dad9 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
PCI: fixup sparse endianness warnings in proc.c
PCI PM: make more PCI PM core functionality available to drivers
PCI/DMAR: don't assume presence of RMRRs
PCI hotplug: fix error path in pci_slot's register_slot
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/dmar.c | 4 | ||||
-rw-r--r-- | drivers/pci/pci.c | 34 | ||||
-rw-r--r-- | drivers/pci/proc.c | 18 |
3 files changed, 34 insertions, 22 deletions
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c index f941f609dbf3..8bf86ae2333f 100644 --- a/drivers/pci/dmar.c +++ b/drivers/pci/dmar.c | |||
@@ -317,10 +317,8 @@ int __init dmar_table_init(void) | |||
317 | return -ENODEV; | 317 | return -ENODEV; |
318 | } | 318 | } |
319 | 319 | ||
320 | if (list_empty(&dmar_rmrr_units)) { | 320 | if (list_empty(&dmar_rmrr_units)) |
321 | printk(KERN_INFO PREFIX "No RMRR found\n"); | 321 | printk(KERN_INFO PREFIX "No RMRR found\n"); |
322 | return -ENODEV; | ||
323 | } | ||
324 | 322 | ||
325 | return 0; | 323 | return 0; |
326 | } | 324 | } |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index d00f0e0d8453..e9c356236d27 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -1040,7 +1040,7 @@ int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state) | |||
1040 | * @dev: PCI device to handle. | 1040 | * @dev: PCI device to handle. |
1041 | * @state: PCI state from which device will issue PME#. | 1041 | * @state: PCI state from which device will issue PME#. |
1042 | */ | 1042 | */ |
1043 | static bool pci_pme_capable(struct pci_dev *dev, pci_power_t state) | 1043 | bool pci_pme_capable(struct pci_dev *dev, pci_power_t state) |
1044 | { | 1044 | { |
1045 | if (!dev->pm_cap) | 1045 | if (!dev->pm_cap) |
1046 | return false; | 1046 | return false; |
@@ -1123,17 +1123,10 @@ int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) | |||
1123 | } | 1123 | } |
1124 | 1124 | ||
1125 | /** | 1125 | /** |
1126 | * pci_prepare_to_sleep - prepare PCI device for system-wide transition into a sleep state | ||
1127 | * @dev: Device to handle. | ||
1128 | * | ||
1129 | * Choose the power state appropriate for the device depending on whether | ||
1130 | * it can wake up the system and/or is power manageable by the platform | ||
1131 | * (PCI_D3hot is the default) and put the device into that state. | ||
1132 | */ | 1126 | */ |
1133 | int pci_prepare_to_sleep(struct pci_dev *dev) | 1127 | pci_power_t pci_target_state(struct pci_dev *dev) |
1134 | { | 1128 | { |
1135 | pci_power_t target_state = PCI_D3hot; | 1129 | pci_power_t target_state = PCI_D3hot; |
1136 | int error; | ||
1137 | 1130 | ||
1138 | if (platform_pci_power_manageable(dev)) { | 1131 | if (platform_pci_power_manageable(dev)) { |
1139 | /* | 1132 | /* |
@@ -1160,7 +1153,7 @@ int pci_prepare_to_sleep(struct pci_dev *dev) | |||
1160 | * to generate PME#. | 1153 | * to generate PME#. |
1161 | */ | 1154 | */ |
1162 | if (!dev->pm_cap) | 1155 | if (!dev->pm_cap) |
1163 | return -EIO; | 1156 | return PCI_POWER_ERROR; |
1164 | 1157 | ||
1165 | if (dev->pme_support) { | 1158 | if (dev->pme_support) { |
1166 | while (target_state | 1159 | while (target_state |
@@ -1169,6 +1162,25 @@ int pci_prepare_to_sleep(struct pci_dev *dev) | |||
1169 | } | 1162 | } |
1170 | } | 1163 | } |
1171 | 1164 | ||
1165 | return target_state; | ||
1166 | } | ||
1167 | |||
1168 | /** | ||
1169 | * pci_prepare_to_sleep - prepare PCI device for system-wide transition into a sleep state | ||
1170 | * @dev: Device to handle. | ||
1171 | * | ||
1172 | * Choose the power state appropriate for the device depending on whether | ||
1173 | * it can wake up the system and/or is power manageable by the platform | ||
1174 | * (PCI_D3hot is the default) and put the device into that state. | ||
1175 | */ | ||
1176 | int pci_prepare_to_sleep(struct pci_dev *dev) | ||
1177 | { | ||
1178 | pci_power_t target_state = pci_target_state(dev); | ||
1179 | int error; | ||
1180 | |||
1181 | if (target_state == PCI_POWER_ERROR) | ||
1182 | return -EIO; | ||
1183 | |||
1172 | pci_enable_wake(dev, target_state, true); | 1184 | pci_enable_wake(dev, target_state, true); |
1173 | 1185 | ||
1174 | error = pci_set_power_state(dev, target_state); | 1186 | error = pci_set_power_state(dev, target_state); |
@@ -1918,7 +1930,9 @@ EXPORT_SYMBOL(pci_select_bars); | |||
1918 | EXPORT_SYMBOL(pci_set_power_state); | 1930 | EXPORT_SYMBOL(pci_set_power_state); |
1919 | EXPORT_SYMBOL(pci_save_state); | 1931 | EXPORT_SYMBOL(pci_save_state); |
1920 | EXPORT_SYMBOL(pci_restore_state); | 1932 | EXPORT_SYMBOL(pci_restore_state); |
1933 | EXPORT_SYMBOL(pci_pme_capable); | ||
1921 | EXPORT_SYMBOL(pci_enable_wake); | 1934 | EXPORT_SYMBOL(pci_enable_wake); |
1935 | EXPORT_SYMBOL(pci_target_state); | ||
1922 | EXPORT_SYMBOL(pci_prepare_to_sleep); | 1936 | EXPORT_SYMBOL(pci_prepare_to_sleep); |
1923 | EXPORT_SYMBOL(pci_back_from_sleep); | 1937 | EXPORT_SYMBOL(pci_back_from_sleep); |
1924 | EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state); | 1938 | EXPORT_SYMBOL_GPL(pci_set_pcie_reset_state); |
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 4400dffbd93a..e1098c302c45 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
@@ -88,7 +88,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
88 | if ((pos & 3) && cnt > 2) { | 88 | if ((pos & 3) && cnt > 2) { |
89 | unsigned short val; | 89 | unsigned short val; |
90 | pci_user_read_config_word(dev, pos, &val); | 90 | pci_user_read_config_word(dev, pos, &val); |
91 | __put_user(cpu_to_le16(val), (unsigned short __user *) buf); | 91 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
92 | buf += 2; | 92 | buf += 2; |
93 | pos += 2; | 93 | pos += 2; |
94 | cnt -= 2; | 94 | cnt -= 2; |
@@ -97,7 +97,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
97 | while (cnt >= 4) { | 97 | while (cnt >= 4) { |
98 | unsigned int val; | 98 | unsigned int val; |
99 | pci_user_read_config_dword(dev, pos, &val); | 99 | pci_user_read_config_dword(dev, pos, &val); |
100 | __put_user(cpu_to_le32(val), (unsigned int __user *) buf); | 100 | __put_user(cpu_to_le32(val), (__le32 __user *) buf); |
101 | buf += 4; | 101 | buf += 4; |
102 | pos += 4; | 102 | pos += 4; |
103 | cnt -= 4; | 103 | cnt -= 4; |
@@ -106,7 +106,7 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
106 | if (cnt >= 2) { | 106 | if (cnt >= 2) { |
107 | unsigned short val; | 107 | unsigned short val; |
108 | pci_user_read_config_word(dev, pos, &val); | 108 | pci_user_read_config_word(dev, pos, &val); |
109 | __put_user(cpu_to_le16(val), (unsigned short __user *) buf); | 109 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
110 | buf += 2; | 110 | buf += 2; |
111 | pos += 2; | 111 | pos += 2; |
112 | cnt -= 2; | 112 | cnt -= 2; |
@@ -156,8 +156,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
156 | } | 156 | } |
157 | 157 | ||
158 | if ((pos & 3) && cnt > 2) { | 158 | if ((pos & 3) && cnt > 2) { |
159 | unsigned short val; | 159 | __le16 val; |
160 | __get_user(val, (unsigned short __user *) buf); | 160 | __get_user(val, (__le16 __user *) buf); |
161 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); | 161 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
162 | buf += 2; | 162 | buf += 2; |
163 | pos += 2; | 163 | pos += 2; |
@@ -165,8 +165,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
165 | } | 165 | } |
166 | 166 | ||
167 | while (cnt >= 4) { | 167 | while (cnt >= 4) { |
168 | unsigned int val; | 168 | __le32 val; |
169 | __get_user(val, (unsigned int __user *) buf); | 169 | __get_user(val, (__le32 __user *) buf); |
170 | pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); | 170 | pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); |
171 | buf += 4; | 171 | buf += 4; |
172 | pos += 4; | 172 | pos += 4; |
@@ -174,8 +174,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
174 | } | 174 | } |
175 | 175 | ||
176 | if (cnt >= 2) { | 176 | if (cnt >= 2) { |
177 | unsigned short val; | 177 | __le16 val; |
178 | __get_user(val, (unsigned short __user *) buf); | 178 | __get_user(val, (__le16 __user *) buf); |
179 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); | 179 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
180 | buf += 2; | 180 | buf += 2; |
181 | pos += 2; | 181 | pos += 2; |