diff options
author | Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> | 2009-04-19 21:54:59 -0400 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-06-11 15:04:06 -0400 |
commit | 67b5db6502ddd27d65dea43bf036abbd82d0dfc9 (patch) | |
tree | c48ed504f52682b88f91e82a50586013410edd7f /drivers/pci | |
parent | 64f039d3d7f574943165b1afb72ee25caa1a9a91 (diff) |
PCI MSI: Define PCI_MSI_MASK_32/64
Impact: cleanup, improve readability
Define PCI_MSI_MASK_32/64 for 32/64bit devices, instead of using
implicit offset (-4), "PCI_MSI_MASK_BIT - 4" and "PCI_MSI_MASK_BIT".
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/msi.c | 2 | ||||
-rw-r--r-- | drivers/pci/msi.h | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 362773247fbf..7ffac27d5d4a 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -381,7 +381,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) | |||
381 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ | 381 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ |
382 | entry->msi_attrib.pos = pos; | 382 | entry->msi_attrib.pos = pos; |
383 | 383 | ||
384 | entry->mask_pos = msi_mask_bits_reg(pos, entry->msi_attrib.is_64); | 384 | entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64); |
385 | /* All MSIs are unmasked by default, Mask them all */ | 385 | /* All MSIs are unmasked by default, Mask them all */ |
386 | if (entry->msi_attrib.maskbit) | 386 | if (entry->msi_attrib.maskbit) |
387 | pci_read_config_dword(dev, entry->mask_pos, &entry->masked); | 387 | pci_read_config_dword(dev, entry->mask_pos, &entry->masked); |
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h index 4fed59261952..a0662842550b 100644 --- a/drivers/pci/msi.h +++ b/drivers/pci/msi.h | |||
@@ -16,9 +16,9 @@ | |||
16 | #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) | 16 | #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) |
17 | #define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) | 17 | #define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) |
18 | #define msi_data_reg(base, is64bit) \ | 18 | #define msi_data_reg(base, is64bit) \ |
19 | ( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 ) | 19 | (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32)) |
20 | #define msi_mask_bits_reg(base, is64bit) \ | 20 | #define msi_mask_reg(base, is64bit) \ |
21 | ( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4) | 21 | (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32)) |
22 | #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) | 22 | #define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) |
23 | #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) | 23 | #define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) |
24 | 24 | ||