Merge tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI changes from Bjorn Helgaas:
 "Host bridge hotplug
    - Protect acpi_pci_drivers and acpi_pci_roots (Taku Izumi)
    - Clear host bridge resource info to avoid issue when releasing
      (Yinghai Lu)
    - Notify acpi_pci_drivers when hot-plugging host bridges (Jiang Liu)
    - Use standard list ops for acpi_pci_drivers (Jiang Liu)

  Device hotplug
    - Use pci_get_domain_bus_and_slot() to close hotplug races (Jiang
      Liu)
    - Remove fakephp driver (Bjorn Helgaas)
    - Fix VGA ref count in hotplug remove path (Yinghai Lu)
    - Allow acpiphp to handle PCIe ports without native hotplug (Jiang
      Liu)
    - Implement resume regardless of pciehp_force param (Oliver Neukum)
    - Make pci_fixup_irqs() work after init (Thierry Reding)

  Miscellaneous
    - Add pci_pcie_type(dev) and remove pci_dev.pcie_type (Yijing Wang)
    - Factor out PCI Express Capability accessors (Jiang Liu)
    - Add pcibios_window_alignment() so powerpc EEH can use generic
      resource assignment (Gavin Shan)
    - Make pci_error_handlers const (Stephen Hemminger)
    - Cleanup drivers/pci/remove.c (Bjorn Helgaas)
    - Improve Vendor-Specific Extended Capability support (Bjorn
      Helgaas)
    - Use standard list ops for bus->devices (Bjorn Helgaas)
    - Avoid kmalloc in pci_get_subsys() and pci_get_class() (Feng Tang)
    - Reassign invalid bus number ranges (Intel DP43BF workaround)
      (Yinghai Lu)"

* tag 'for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (102 commits)
  PCI: acpiphp: Handle PCIe ports without native hotplug capability
  PCI/ACPI: Use acpi_driver_data() rather than searching acpi_pci_roots
  PCI/ACPI: Protect acpi_pci_roots list with mutex
  PCI/ACPI: Use acpi_pci_root info rather than looking it up again
  PCI/ACPI: Pass acpi_pci_root to acpi_pci_drivers' add/remove interface
  PCI/ACPI: Protect acpi_pci_drivers list with mutex
  PCI/ACPI: Notify acpi_pci_drivers when hot-plugging PCI root bridges
  PCI/ACPI: Use normal list for struct acpi_pci_driver
  PCI/ACPI: Use DEVICE_ACPI_HANDLE rather than searching acpi_pci_roots
  PCI: Fix default vga ref_count
  ia64/PCI: Clear host bridge aperture struct resource
  x86/PCI: Clear host bridge aperture struct resource
  PCI: Stop all children first, before removing all children
  Revert "PCI: Use hotplug-safe pci_get_domain_bus_and_slot()"
  PCI: Provide a default pcibios_update_irq()
  PCI: Discard __init annotations for pci_fixup_irqs() and related functions
  PCI: Use correct type when freeing bus resource list
  PCI: Check P2P bridge for invalid secondary/subordinate range
  PCI: Convert "new_id"/"remove_id" into generic pci_bus driver attributes
  xen-pcifront: Use hotplug-safe pci_get_domain_bus_and_slot()
  ...

34 files changed, 669 insertions, 1121 deletions

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 848bfb84c04c..6d51aa68ec7a 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -3,7 +3,6 @@
 #
 config ARCH_SUPPORTS_MSI
         bool
-        default n
 
 config PCI_MSI
         bool "Message Signaled Interrupts (MSI and MSI-X)"
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index ba91a7e17519..3af0478c057b 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -469,3 +469,205 @@ void pci_cfg_access_unlock(struct pci_dev *dev)
         raw_spin_unlock_irqrestore(&pci_lock, flags);
 }
 EXPORT_SYMBOL_GPL(pci_cfg_access_unlock);
+
+static inline int pcie_cap_version(const struct pci_dev *dev)
+{
+        return dev->pcie_flags_reg & PCI_EXP_FLAGS_VERS;
+}
+
+static inline bool pcie_cap_has_devctl(const struct pci_dev *dev)
+{
+        return true;
+}
+
+static inline bool pcie_cap_has_lnkctl(const struct pci_dev *dev)
+{
+        int type = pci_pcie_type(dev);
+
+        return pcie_cap_version(dev) > 1 ||
+               type == PCI_EXP_TYPE_ROOT_PORT ||
+               type == PCI_EXP_TYPE_ENDPOINT ||
+               type == PCI_EXP_TYPE_LEG_END;
+}
+
+static inline bool pcie_cap_has_sltctl(const struct pci_dev *dev)
+{
+        int type = pci_pcie_type(dev);
+
+        return pcie_cap_version(dev) > 1 ||
+               type == PCI_EXP_TYPE_ROOT_PORT ||
+               (type == PCI_EXP_TYPE_DOWNSTREAM &&
+                dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT);
+}
+
+static inline bool pcie_cap_has_rtctl(const struct pci_dev *dev)
+{
+        int type = pci_pcie_type(dev);
+
+        return pcie_cap_version(dev) > 1 ||
+               type == PCI_EXP_TYPE_ROOT_PORT ||
+               type == PCI_EXP_TYPE_RC_EC;
+}
+
+static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos)
+{
+        if (!pci_is_pcie(dev))
+                return false;
+
+        switch (pos) {
+        case PCI_EXP_FLAGS_TYPE:
+                return true;
+        case PCI_EXP_DEVCAP:
+        case PCI_EXP_DEVCTL:
+        case PCI_EXP_DEVSTA:
+                return pcie_cap_has_devctl(dev);
+        case PCI_EXP_LNKCAP:
+        case PCI_EXP_LNKCTL:
+        case PCI_EXP_LNKSTA:
+                return pcie_cap_has_lnkctl(dev);
+        case PCI_EXP_SLTCAP:
+        case PCI_EXP_SLTCTL:
+        case PCI_EXP_SLTSTA:
+                return pcie_cap_has_sltctl(dev);
+        case PCI_EXP_RTCTL:
+        case PCI_EXP_RTCAP:
+        case PCI_EXP_RTSTA:
+                return pcie_cap_has_rtctl(dev);
+        case PCI_EXP_DEVCAP2:
+        case PCI_EXP_DEVCTL2:
+        case PCI_EXP_LNKCAP2:
+        case PCI_EXP_LNKCTL2:
+        case PCI_EXP_LNKSTA2:
+                return pcie_cap_version(dev) > 1;
+        default:
+                return false;
+        }
+}
+
+/*
+ * Note that these accessor functions are only for the "PCI Express
+ * Capability" (see PCIe spec r3.0, sec 7.8).  They do not apply to the
+ * other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.)
+ */
+int pcie_capability_read_word(struct pci_dev *dev, int pos, u16 *val)
+{
+        int ret;
+
+        *val = 0;
+        if (pos & 1)
+                return -EINVAL;
+
+        if (pcie_capability_reg_implemented(dev, pos)) {
+                ret = pci_read_config_word(dev, pci_pcie_cap(dev) + pos, val);
+                /*
+                 * Reset *val to 0 if pci_read_config_word() fails, it may
+                 * have been written as 0xFFFF if hardware error happens
+                 * during pci_read_config_word().
+                 */
+                if (ret)
+                        *val = 0;
+                return ret;
+        }
+
+        /*
+         * For Functions that do not implement the Slot Capabilities,
+         * Slot Status, and Slot Control registers, these spaces must
+         * be hardwired to 0b, with the exception of the Presence Detect
+         * State bit in the Slot Status register of Downstream Ports,
+         * which must be hardwired to 1b.  (PCIe Base Spec 3.0, sec 7.8)
+         */
+        if (pci_is_pcie(dev) && pos == PCI_EXP_SLTSTA &&
+                 pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) {
+                *val = PCI_EXP_SLTSTA_PDS;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(pcie_capability_read_word);
+
+int pcie_capability_read_dword(struct pci_dev *dev, int pos, u32 *val)
+{
+        int ret;
+
+        *val = 0;
+        if (pos & 3)
+                return -EINVAL;
+
+        if (pcie_capability_reg_implemented(dev, pos)) {
+                ret = pci_read_config_dword(dev, pci_pcie_cap(dev) + pos, val);
+                /*
+                 * Reset *val to 0 if pci_read_config_dword() fails, it may
+                 * have been written as 0xFFFFFFFF if hardware error happens
+                 * during pci_read_config_dword().
+                 */
+                if (ret)
+                        *val = 0;
+                return ret;
+        }
+
+        if (pci_is_pcie(dev) && pos == PCI_EXP_SLTCTL &&
+                 pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM) {
+                *val = PCI_EXP_SLTSTA_PDS;
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(pcie_capability_read_dword);
+
+int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
+{
+        if (pos & 1)
+                return -EINVAL;
+
+        if (!pcie_capability_reg_implemented(dev, pos))
+                return 0;
+
+        return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
+}
+EXPORT_SYMBOL(pcie_capability_write_word);
+
+int pcie_capability_write_dword(struct pci_dev *dev, int pos, u32 val)
+{
+        if (pos & 3)
+                return -EINVAL;
+
+        if (!pcie_capability_reg_implemented(dev, pos))
+                return 0;
+
+        return pci_write_config_dword(dev, pci_pcie_cap(dev) + pos, val);
+}
+EXPORT_SYMBOL(pcie_capability_write_dword);
+
+int pcie_capability_clear_and_set_word(struct pci_dev *dev, int pos,
+                                       u16 clear, u16 set)
+{
+        int ret;
+        u16 val;
+
+        ret = pcie_capability_read_word(dev, pos, &val);
+        if (!ret) {
+                val &= ~clear;
+                val |= set;
+                ret = pcie_capability_write_word(dev, pos, val);
+        }
+
+        return ret;
+}
+EXPORT_SYMBOL(pcie_capability_clear_and_set_word);
+
+int pcie_capability_clear_and_set_dword(struct pci_dev *dev, int pos,
+                                        u32 clear, u32 set)
+{
+        int ret;
+        u32 val;
+
+        ret = pcie_capability_read_dword(dev, pos, &val);
+        if (!ret) {
+                val &= ~clear;
+                val |= set;
+                ret = pcie_capability_write_dword(dev, pos, val);
+        }
+
+        return ret;
+}
+EXPORT_SYMBOL(pcie_capability_clear_and_set_dword);
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index 4b0970b46e0b..6241fd05bd41 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -87,11 +87,15 @@ EXPORT_SYMBOL_GPL(pci_bus_resource_n);
 void pci_bus_remove_resources(struct pci_bus *bus)
 {
         int i;
+        struct pci_bus_resource *bus_res, *tmp;
 
         for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
                 bus->resource[i] = NULL;
 
-        pci_free_resource_list(&bus->resources);
+        list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
+                list_del(&bus_res->list);
+                kfree(bus_res);
+        }
 }
 
 /**
diff --git a/drivers/pci/hotplug/Kconfig b/drivers/pci/hotplug/Kconfig
index 66f29bc00be4..b0e46dede1a9 100644
--- a/drivers/pci/hotplug/Kconfig
+++ b/drivers/pci/hotplug/Kconfig
@@ -17,28 +17,6 @@ menuconfig HOTPLUG_PCI
 
 if HOTPLUG_PCI
 
-config HOTPLUG_PCI_FAKE
-        tristate "Fake PCI Hotplug driver"
-        help
-          Say Y here if you want to use the fake PCI hotplug driver. It can
-          be used to simulate PCI hotplug events if even if your system is
-          not PCI hotplug capable.
-
-          This driver will "emulate" removing PCI devices from the system.
-          If the "power" file is written to with "0" then the specified PCI
-          device will be completely removed from the kernel.
-
-          WARNING, this does NOT turn off the power to the PCI device.
-          This is a "logical" removal, not a physical or electrical
-          removal.
-
-          Use this module at your own risk.  You have been warned!
-
-          To compile this driver as a module, choose M here: the
-          module will be called fakephp.
-
-          When in doubt, say N.
-
 config HOTPLUG_PCI_COMPAQ
         tristate "Compaq PCI Hotplug driver"
         depends on X86 && PCI_BIOS
@@ -143,7 +121,7 @@ config HOTPLUG_PCI_SHPC
 
 config HOTPLUG_PCI_RPA
         tristate "RPA PCI Hotplug driver"
-        depends on PPC_PSERIES && EEH && !HOTPLUG_PCI_FAKE
+        depends on PPC_PSERIES && EEH
         help
           Say Y here if you have a RPA system that supports PCI Hotplug.
 
diff --git a/drivers/pci/hotplug/Makefile b/drivers/pci/hotplug/Makefile
index 6cd9f3c9887d..c459cd4e39c2 100644
--- a/drivers/pci/hotplug/Makefile
+++ b/drivers/pci/hotplug/Makefile
@@ -23,9 +23,6 @@ obj-$(CONFIG_HOTPLUG_PCI_ACPI)		+= acpiphp.o
 
 obj-$(CONFIG_HOTPLUG_PCI_ACPI_IBM)      += acpiphp_ibm.o
 
-# Link this last so it doesn't claim devices that have a real hotplug driver
-obj-$(CONFIG_HOTPLUG_PCI_FAKE)          += fakephp.o
-
 pci_hotplug-objs        :=      pci_hotplug_core.o pcihp_slot.o
 
 ifdef CONFIG_HOTPLUG_PCI_CPCI
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index ad6fd6695495..3d6d4fd1e3c5 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -115,6 +115,35 @@ static const struct acpi_dock_ops acpiphp_dock_ops = {
         .handler = handle_hotplug_event_func,
 };
 
+/* Check whether the PCI device is managed by native PCIe hotplug driver */
+static bool device_is_managed_by_native_pciehp(struct pci_dev *pdev)
+{
+        u32 reg32;
+        acpi_handle tmp;
+        struct acpi_pci_root *root;
+
+        /* Check whether the PCIe port supports native PCIe hotplug */
+        if (pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32))
+                return false;
+        if (!(reg32 & PCI_EXP_SLTCAP_HPC))
+                return false;
+
+        /*
+         * Check whether native PCIe hotplug has been enabled for
+         * this PCIe hierarchy.
+         */
+        tmp = acpi_find_root_bridge_handle(pdev);
+        if (!tmp)
+                return false;
+        root = acpi_pci_find_root(tmp);
+        if (!root)
+                return false;
+        if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
+                return false;
+
+        return true;
+}
+
 /* callback routine to register each ACPI PCI slot object */
 static acpi_status
 register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
@@ -142,16 +171,8 @@ register_slot(acpi_handle handle, u32 lvl, void *context, void **rv)
         function = adr & 0xffff;
 
         pdev = pbus->self;
-        if (pdev && pci_is_pcie(pdev)) {
-                tmp = acpi_find_root_bridge_handle(pdev);
-                if (tmp) {
-                        struct acpi_pci_root *root = acpi_pci_find_root(tmp);
-
-                        if (root && (root->osc_control_set &
-                                        OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
-                                return AE_OK;
-                }
-        }
+        if (pdev && device_is_managed_by_native_pciehp(pdev))
+                return AE_OK;
 
         newfunc = kzalloc(sizeof(struct acpiphp_func), GFP_KERNEL);
         if (!newfunc)
@@ -382,10 +403,10 @@ static inline void config_p2p_bridge_flags(struct acpiphp_bridge *bridge)
 
 
 /* allocate and initialize host bridge data structure */
-static void add_host_bridge(acpi_handle *handle)
+static void add_host_bridge(struct acpi_pci_root *root)
 {
         struct acpiphp_bridge *bridge;
-        struct acpi_pci_root *root = acpi_pci_find_root(handle);
+        acpi_handle handle = root->device->handle;
 
         bridge = kzalloc(sizeof(struct acpiphp_bridge), GFP_KERNEL);
         if (bridge == NULL)
@@ -468,11 +489,12 @@ find_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv)
 
 
 /* find hot-pluggable slots, and then find P2P bridge */
-static int add_bridge(acpi_handle handle)
+static int add_bridge(struct acpi_pci_root *root)
 {
         acpi_status status;
         unsigned long long tmp;
         acpi_handle dummy_handle;
+        acpi_handle handle = root->device->handle;
 
         /* if the bridge doesn't have _STA, we assume it is always there */
         status = acpi_get_handle(handle, "_STA", &dummy_handle);
@@ -490,7 +512,7 @@ static int add_bridge(acpi_handle handle)
         /* check if this bridge has ejectable slots */
         if (detect_ejectable_slots(handle) > 0) {
                 dbg("found PCI host-bus bridge with hot-pluggable slots\n");
-                add_host_bridge(handle);
+                add_host_bridge(root);
         }
 
         /* search P2P bridges under this host bridge */
@@ -588,9 +610,10 @@ cleanup_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv)
         return AE_OK;
 }
 
-static void remove_bridge(acpi_handle handle)
+static void remove_bridge(struct acpi_pci_root *root)
 {
         struct acpiphp_bridge *bridge;
+        acpi_handle handle = root->device->handle;
 
         /* cleanup p2p bridges under this host bridge
            in a depth-first manner */
@@ -869,17 +892,6 @@ static int __ref enable_device(struct acpiphp_slot *slot)
         return retval;
 }
 
-static void disable_bridges(struct pci_bus *bus)
-{
-        struct pci_dev *dev;
-        list_for_each_entry(dev, &bus->devices, bus_list) {
-                if (dev->subordinate) {
-                        disable_bridges(dev->subordinate);
-                        pci_disable_device(dev);
-                }
-        }
-}
-
 /* return first device in slot, acquiring a reference on it */
 static struct pci_dev *dev_in_slot(struct acpiphp_slot *slot)
 {
@@ -931,12 +943,7 @@ static int disable_device(struct acpiphp_slot *slot)
          * here.
          */
         while ((pdev = dev_in_slot(slot))) {
-                pci_stop_bus_device(pdev);
-                if (pdev->subordinate) {
-                        disable_bridges(pdev->subordinate);
-                        pci_disable_device(pdev);
-                }
-                __pci_remove_bus_device(pdev);
+                pci_stop_and_remove_bus_device(pdev);
                 pci_dev_put(pdev);
         }
 
@@ -1477,34 +1484,6 @@ int __init acpiphp_get_num_slots(void)
 }
 
 
-#if 0
-/**
- * acpiphp_for_each_slot - call function for each slot
- * @fn: callback function
- * @data: context to be passed to callback function
- */
-static int acpiphp_for_each_slot(acpiphp_callback fn, void *data)
-{
-        struct list_head *node;
-        struct acpiphp_bridge *bridge;
-        struct acpiphp_slot *slot;
-        int retval = 0;
-
-        list_for_each (node, &bridge_list) {
-                bridge = (struct acpiphp_bridge *)node;
-                for (slot = bridge->slots; slot; slot = slot->next) {
-                        retval = fn(slot, data);
-                        if (!retval)
-                                goto err_exit;
-                }
-        }
-
- err_exit:
-        return retval;
-}
-#endif
-
-
 /**
  * acpiphp_enable_slot - power on slot
  * @slot: ACPI PHP slot
diff --git a/drivers/pci/hotplug/cpcihp_generic.c b/drivers/pci/hotplug/cpcihp_generic.c
index 81af764c629b..a6a71c41cdf8 100644
--- a/drivers/pci/hotplug/cpcihp_generic.c
+++ b/drivers/pci/hotplug/cpcihp_generic.c
@@ -154,12 +154,8 @@ static int __init cpcihp_generic_init(void)
         if(!r)
                 return -EBUSY;
 
-        bus = pci_find_bus(0, bridge_busnr);
-        if (!bus) {
-                err("Invalid bus number %d", bridge_busnr);
-                return -EINVAL;
-        }
-        dev = pci_get_slot(bus, PCI_DEVFN(bridge_slot, 0));
+        dev = pci_get_domain_bus_and_slot(0, bridge_busnr,
+                                          PCI_DEVFN(bridge_slot, 0));
         if(!dev || dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
                 err("Invalid bridge device %s", bridge);
                 pci_dev_put(dev);
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c
index e43908d9b5df..36112fe212d3 100644
--- a/drivers/pci/hotplug/cpqphp_ctrl.c
+++ b/drivers/pci/hotplug/cpqphp_ctrl.c
@@ -2890,27 +2890,8 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
                                                 func->mem_head = mem_node;
                                         } else
                                                 return -ENOMEM;
-                                } else if ((temp_register & 0x0BL) == 0x04) {
-                                        /* Map memory */
-                                        base = temp_register & 0xFFFFFFF0;
-                                        base = ~base + 1;
-
-                                        dbg("CND:      length = 0x%x\n", base);
-                                        mem_node = get_resource(&(resources->mem_head), base);
-
-                                        /* allocate the resource to the board */
-                                        if (mem_node) {
-                                                base = mem_node->base;
-
-                                                mem_node->next = func->mem_head;
-                                                func->mem_head = mem_node;
-                                        } else
-                                                return -ENOMEM;
-                                } else if ((temp_register & 0x0BL) == 0x06) {
-                                        /* Those bits are reserved, we can't handle this */
-                                        return 1;
                                 } else {
-                                        /* Requesting space below 1M */
+                                        /* Reserved bits or requesting space below 1M */
                                         return NOT_ENOUGH_RESOURCES;
                                 }
 
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c
deleted file mode 100644
index a019c9a712be..000000000000
--- a/drivers/pci/hotplug/fakephp.c
+++ /dev/null
@@ -1,164 +0,0 @@
-/* Works like the fakephp driver used to, except a little better.
- *
- * - It's possible to remove devices with subordinate busses.
- * - New PCI devices that appear via any method, not just a fakephp triggered
- *   rescan, will be noticed.
- * - Devices that are removed via any method, not just a fakephp triggered
- *   removal, will also be noticed.
- *
- * Uses nothing from the pci-hotplug subsystem.
- *
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/list.h>
-#include <linux/kobject.h>
-#include <linux/sysfs.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/device.h>
-#include <linux/slab.h>
-#include "../pci.h"
-
-struct legacy_slot {
-        struct kobject          kobj;
-        struct pci_dev          *dev;
-        struct list_head        list;
-};
-
-static LIST_HEAD(legacy_list);
-
-static ssize_t legacy_show(struct kobject *kobj, struct attribute *attr,
-                           char *buf)
-{
-        struct legacy_slot *slot = container_of(kobj, typeof(*slot), kobj);
-        strcpy(buf, "1\n");
-        return 2;
-}
-
-static void remove_callback(void *data)
-{
-        pci_stop_and_remove_bus_device((struct pci_dev *)data);
-}
-
-static ssize_t legacy_store(struct kobject *kobj, struct attribute *attr,
-                            const char *buf, size_t len)
-{
-        struct legacy_slot *slot = container_of(kobj, typeof(*slot), kobj);
-        unsigned long val;
-
-        if (strict_strtoul(buf, 0, &val) < 0)
-                return -EINVAL;
-
-        if (val)
-                pci_rescan_bus(slot->dev->bus);
-        else
-                sysfs_schedule_callback(&slot->dev->dev.kobj, remove_callback,
-                                        slot->dev, THIS_MODULE);
-        return len;
-}
-
-static struct attribute *legacy_attrs[] = {
-        &(struct attribute){ .name = "power", .mode = 0644 },
-        NULL,
-};
-
-static void legacy_release(struct kobject *kobj)
-{
-        struct legacy_slot *slot = container_of(kobj, typeof(*slot), kobj);
-
-        pci_dev_put(slot->dev);
-        kfree(slot);
-}
-
-static struct kobj_type legacy_ktype = {
-        .sysfs_ops = &(const struct sysfs_ops){
-                .store = legacy_store, .show = legacy_show
-        },
-        .release = &legacy_release,
-        .default_attrs = legacy_attrs,
-};
-
-static int legacy_add_slot(struct pci_dev *pdev)
-{
-        struct legacy_slot *slot = kzalloc(sizeof(*slot), GFP_KERNEL);
-
-        if (!slot)
-                return -ENOMEM;
-
-        if (kobject_init_and_add(&slot->kobj, &legacy_ktype,
-                                 &pci_slots_kset->kobj, "%s",
-                                 dev_name(&pdev->dev))) {
-                dev_warn(&pdev->dev, "Failed to created legacy fake slot\n");
-                return -EINVAL;
-        }
-        slot->dev = pci_dev_get(pdev);
-
-        list_add(&slot->list, &legacy_list);
-
-        return 0;
-}
-
-static int legacy_notify(struct notifier_block *nb,
-                         unsigned long action, void *data)
-{
-        struct pci_dev *pdev = to_pci_dev(data);
-
-        if (action == BUS_NOTIFY_ADD_DEVICE) {
-                legacy_add_slot(pdev);
-        } else if (action == BUS_NOTIFY_DEL_DEVICE) {
-                struct legacy_slot *slot;
-
-                list_for_each_entry(slot, &legacy_list, list)
-                        if (slot->dev == pdev)
-                                goto found;
-
-                dev_warn(&pdev->dev, "Missing legacy fake slot?");
-                return -ENODEV;
-found:
-                kobject_del(&slot->kobj);
-                list_del(&slot->list);
-                kobject_put(&slot->kobj);
-        }
-
-        return 0;
-}
-
-static struct notifier_block legacy_notifier = {
-        .notifier_call = legacy_notify
-};
-
-static int __init init_legacy(void)
-{
-        struct pci_dev *pdev = NULL;
-
-        /* Add existing devices */
-        for_each_pci_dev(pdev)
-                legacy_add_slot(pdev);
-
-        /* Be alerted of any new ones */
-        bus_register_notifier(&pci_bus_type, &legacy_notifier);
-        return 0;
-}
-module_init(init_legacy);
-
-static void __exit remove_legacy(void)
-{
-        struct legacy_slot *slot, *tmp;
-
-        bus_unregister_notifier(&pci_bus_type, &legacy_notifier);
-
-        list_for_each_entry_safe(slot, tmp, &legacy_list, list) {
-                list_del(&slot->list);
-                kobject_del(&slot->kobj);
-                kobject_put(&slot->kobj);
-        }
-}
-module_exit(remove_legacy);
-
-
-MODULE_AUTHOR("Trent Piepho <xyzzy@speakeasy.org>");
-MODULE_DESCRIPTION("Legacy version of the fakephp interface");
-MODULE_LICENSE("GPL");
diff --git a/drivers/pci/hotplug/pciehp_acpi.c b/drivers/pci/hotplug/pciehp_acpi.c
index 376d70d17176..24d709b7388c 100644
--- a/drivers/pci/hotplug/pciehp_acpi.c
+++ b/drivers/pci/hotplug/pciehp_acpi.c
@@ -81,16 +81,12 @@ static struct list_head __initdata dummy_slots = LIST_HEAD_INIT(dummy_slots);
 /* Dummy driver for dumplicate name detection */
 static int __init dummy_probe(struct pcie_device *dev)
 {
-        int pos;
         u32 slot_cap;
         acpi_handle handle;
         struct dummy_slot *slot, *tmp;
         struct pci_dev *pdev = dev->port;
 
-        pos = pci_pcie_cap(pdev);
-        if (!pos)
-                return -ENODEV;
-        pci_read_config_dword(pdev, pos + PCI_EXP_SLTCAP, &slot_cap);
+        pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap);
         slot = kzalloc(sizeof(*slot), GFP_KERNEL);
         if (!slot)
                 return -ENOMEM;
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index 365c6b96c642..916bf4f53aba 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -300,24 +300,24 @@ static int pciehp_suspend (struct pcie_device *dev)
 
 static int pciehp_resume (struct pcie_device *dev)
 {
+        struct controller *ctrl;
+        struct slot *slot;
+        u8 status;
+
         dev_info(&dev->device, "%s ENTRY\n", __func__);
-        if (pciehp_force) {
-                struct controller *ctrl = get_service_data(dev);
-                struct slot *slot;
-                u8 status;
+        ctrl = get_service_data(dev);
 
-                /* reinitialize the chipset's event detection logic */
-                pcie_enable_notification(ctrl);
+        /* reinitialize the chipset's event detection logic */
+        pcie_enable_notification(ctrl);
 
-                slot = ctrl->slot;
+        slot = ctrl->slot;
 
-                /* Check if slot is occupied */
-                pciehp_get_adapter_status(slot, &status);
-                if (status)
-                        pciehp_enable_slot(slot);
-                else
-                        pciehp_disable_slot(slot);
-        }
+        /* Check if slot is occupied */
+        pciehp_get_adapter_status(slot, &status);
+        if (status)
+                pciehp_enable_slot(slot);
+        else
+                pciehp_disable_slot(slot);
         return 0;
 }
 #endif /* PM */
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 302451e8289d..13b2eaf7ba43 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -44,25 +44,25 @@
 static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_read_config_word(dev, pci_pcie_cap(dev) + reg, value);
+        return pcie_capability_read_word(dev, reg, value);
 }
 
 static inline int pciehp_readl(struct controller *ctrl, int reg, u32 *value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_read_config_dword(dev, pci_pcie_cap(dev) + reg, value);
+        return pcie_capability_read_dword(dev, reg, value);
 }
 
 static inline int pciehp_writew(struct controller *ctrl, int reg, u16 value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_write_config_word(dev, pci_pcie_cap(dev) + reg, value);
+        return pcie_capability_write_word(dev, reg, value);
 }
 
 static inline int pciehp_writel(struct controller *ctrl, int reg, u32 value)
 {
         struct pci_dev *dev = ctrl->pcie->port;
-        return pci_write_config_dword(dev, pci_pcie_cap(dev) + reg, value);
+        return pcie_capability_write_dword(dev, reg, value);
 }
 
 /* Power Control Command */
@@ -855,10 +855,6 @@ struct controller *pcie_init(struct pcie_device *dev)
                 goto abort;
         }
         ctrl->pcie = dev;
-        if (!pci_pcie_cap(pdev)) {
-                ctrl_err(ctrl, "Cannot find PCI Express capability\n");
-                goto abort_ctrl;
-        }
         if (pciehp_readl(ctrl, PCI_EXP_SLTCAP, &slot_cap)) {
                 ctrl_err(ctrl, "Cannot read SLOTCAP register\n");
                 goto abort_ctrl;
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
index 8c05a18c9770..fec2d5b75440 100644
--- a/drivers/pci/hotplug/pcihp_slot.c
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -96,17 +96,11 @@ static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp)
 static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
 {
         int pos;
-        u16 reg16;
         u32 reg32;
 
         if (!hpp)
                 return;
 
-        /* Find PCI Express capability */
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return;
-
         if (hpp->revision > 1) {
                 dev_warn(&dev->dev, "PCIe settings rev %d not supported\n",
                          hpp->revision);
@@ -114,17 +108,13 @@ static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
         }
 
         /* Initialize Device Control Register */
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        reg16 = (reg16 & hpp->pci_exp_devctl_and) | hpp->pci_exp_devctl_or;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
+        pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
+                        ~hpp->pci_exp_devctl_and, hpp->pci_exp_devctl_or);
 
         /* Initialize Link Control Register */
-        if (dev->subordinate) {
-                pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &reg16);
-                reg16 = (reg16 & hpp->pci_exp_lnkctl_and)
-                        | hpp->pci_exp_lnkctl_or;
-                pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, reg16);
-        }
+        if (dev->subordinate)
+                pcie_capability_clear_and_set_word(dev, PCI_EXP_LNKCTL,
+                        ~hpp->pci_exp_lnkctl_and, hpp->pci_exp_lnkctl_or);
 
         /* Find Advanced Error Reporting Enhanced Capability */
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 74bbaf82638d..aeccc911abb8 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -433,8 +433,8 @@ static int sriov_init(struct pci_dev *dev, int pos)
         struct resource *res;
         struct pci_dev *pdev;
 
-        if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
-            dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
+        if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
+            pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
                 return -ENODEV;
 
         pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
@@ -503,7 +503,7 @@ found:
         iov->self = dev;
         pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
         pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
-        if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
+        if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
                 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
 
         if (pdev)
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index d6fd6b6d9d4b..9e1d2959e226 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -139,7 +139,6 @@ store_new_id(struct device_driver *driver, const char *buf, size_t count)
                 return retval;
         return count;
 }
-static DRIVER_ATTR(new_id, S_IWUSR, NULL, store_new_id);
 
 /**
  * store_remove_id - remove a PCI device ID from this driver
@@ -185,38 +184,16 @@ store_remove_id(struct device_driver *driver, const char *buf, size_t count)
                 return retval;
         return count;
 }
-static DRIVER_ATTR(remove_id, S_IWUSR, NULL, store_remove_id);
 
-static int
-pci_create_newid_files(struct pci_driver *drv)
-{
-        int error = 0;
+static struct driver_attribute pci_drv_attrs[] = {
+        __ATTR(new_id, S_IWUSR, NULL, store_new_id),
+        __ATTR(remove_id, S_IWUSR, NULL, store_remove_id),
+        __ATTR_NULL,
+};
 
-        if (drv->probe != NULL) {
-                error = driver_create_file(&drv->driver, &driver_attr_new_id);
-                if (error == 0) {
-                        error = driver_create_file(&drv->driver,
-                                        &driver_attr_remove_id);
-                        if (error)
-                                driver_remove_file(&drv->driver,
-                                                &driver_attr_new_id);
-                }
-        }
-        return error;
-}
-
-static void pci_remove_newid_files(struct pci_driver *drv)
-{
-        driver_remove_file(&drv->driver, &driver_attr_remove_id);
-        driver_remove_file(&drv->driver, &driver_attr_new_id);
-}
-#else /* !CONFIG_HOTPLUG */
-static inline int pci_create_newid_files(struct pci_driver *drv)
-{
-        return 0;
-}
-static inline void pci_remove_newid_files(struct pci_driver *drv) {}
-#endif
+#else
+#define pci_drv_attrs   NULL
+#endif /* CONFIG_HOTPLUG */
 
 /**
  * pci_match_id - See if a pci device matches a given pci_id table
@@ -1162,8 +1139,6 @@ const struct dev_pm_ops pci_dev_pm_ops = {
 int __pci_register_driver(struct pci_driver *drv, struct module *owner,
                           const char *mod_name)
 {
-        int error;
-
         /* initialize common driver fields */
         drv->driver.name = drv->name;
         drv->driver.bus = &pci_bus_type;
@@ -1174,19 +1149,7 @@ int __pci_register_driver(struct pci_driver *drv, struct module *owner,
         INIT_LIST_HEAD(&drv->dynids.list);
 
         /* register with core */
-        error = driver_register(&drv->driver);
-        if (error)
-                goto out;
-
-        error = pci_create_newid_files(drv);
-        if (error)
-                goto out_newid;
-out:
-        return error;
-
-out_newid:
-        driver_unregister(&drv->driver);
-        goto out;
+        return driver_register(&drv->driver);
 }
 
 /**
@@ -1202,7 +1165,6 @@ out_newid:
 void
 pci_unregister_driver(struct pci_driver *drv)
 {
-        pci_remove_newid_files(drv);
         driver_unregister(&drv->driver);
         pci_free_dynids(drv);
 }
@@ -1302,6 +1264,7 @@ struct bus_type pci_bus_type = {
         .shutdown       = pci_device_shutdown,
         .dev_attrs      = pci_dev_attrs,
         .bus_attrs      = pci_bus_attrs,
+        .drv_attrs      = pci_drv_attrs,
         .pm             = PCI_PM_OPS_PTR,
 };
 
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index ab4bf5a4c2f1..54858838f098 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -254,52 +254,17 @@ int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
 }
 
 /**
- * pci_pcie_cap2 - query for devices' PCI_CAP_ID_EXP v2 capability structure
- * @dev: PCI device to check
- *
- * Like pci_pcie_cap() but also checks that the PCIe capability version is
- * >= 2.  Note that v1 capability structures could be sparse in that not
- * all register fields were required.  v2 requires the entire structure to
- * be present size wise, while still allowing for non-implemented registers
- * to exist but they must be hardwired to 0.
- *
- * Due to the differences in the versions of capability structures, one
- * must be careful not to try and access non-existant registers that may
- * exist in early versions - v1 - of Express devices.
- *
- * Returns the offset of the PCIe capability structure as long as the
- * capability version is >= 2; otherwise 0 is returned.
- */
-static int pci_pcie_cap2(struct pci_dev *dev)
-{
-        u16 flags;
-        int pos;
-
-        pos = pci_pcie_cap(dev);
-        if (pos) {
-                pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
-                if ((flags & PCI_EXP_FLAGS_VERS) < 2)
-                        pos = 0;
-        }
-
-        return pos;
-}
-
-/**
- * pci_find_ext_capability - Find an extended capability
+ * pci_find_next_ext_capability - Find an extended capability
  * @dev: PCI device to query
+ * @start: address at which to start looking (0 to start at beginning of list)
  * @cap: capability code
  *
- * Returns the address of the requested extended capability structure
+ * Returns the address of the next matching extended capability structure
  * within the device's PCI configuration space or 0 if the device does
- * not support it.  Possible values for @cap:
- *
- *  %PCI_EXT_CAP_ID_ERR         Advanced Error Reporting
- *  %PCI_EXT_CAP_ID_VC          Virtual Channel
- *  %PCI_EXT_CAP_ID_DSN         Device Serial Number
- *  %PCI_EXT_CAP_ID_PWR         Power Budgeting
+ * not support it.  Some capabilities can occur several times, e.g., the
+ * vendor-specific capability, and this provides a way to find them all.
  */
-int pci_find_ext_capability(struct pci_dev *dev, int cap)
+int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap)
 {
         u32 header;
         int ttl;
@@ -311,6 +276,9 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
         if (dev->cfg_size <= PCI_CFG_SPACE_SIZE)
                 return 0;
 
+        if (start)
+                pos = start;
+
         if (pci_read_config_dword(dev, pos, &header) != PCIBIOS_SUCCESSFUL)
                 return 0;
 
@@ -322,7 +290,7 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
                 return 0;
 
         while (ttl-- > 0) {
-                if (PCI_EXT_CAP_ID(header) == cap)
+                if (PCI_EXT_CAP_ID(header) == cap && pos != start)
                         return pos;
 
                 pos = PCI_EXT_CAP_NEXT(header);
@@ -335,6 +303,26 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
 
         return 0;
 }
+EXPORT_SYMBOL_GPL(pci_find_next_ext_capability);
+
+/**
+ * pci_find_ext_capability - Find an extended capability
+ * @dev: PCI device to query
+ * @cap: capability code
+ *
+ * Returns the address of the requested extended capability structure
+ * within the device's PCI configuration space or 0 if the device does
+ * not support it.  Possible values for @cap:
+ *
+ *  %PCI_EXT_CAP_ID_ERR         Advanced Error Reporting
+ *  %PCI_EXT_CAP_ID_VC          Virtual Channel
+ *  %PCI_EXT_CAP_ID_DSN         Device Serial Number
+ *  %PCI_EXT_CAP_ID_PWR         Power Budgeting
+ */
+int pci_find_ext_capability(struct pci_dev *dev, int cap)
+{
+        return pci_find_next_ext_capability(dev, 0, cap);
+}
 EXPORT_SYMBOL_GPL(pci_find_ext_capability);
 
 static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
@@ -854,21 +842,6 @@ EXPORT_SYMBOL(pci_choose_state);
 
 #define PCI_EXP_SAVE_REGS       7
 
-#define pcie_cap_has_devctl(type, flags)        1
-#define pcie_cap_has_lnkctl(type, flags)                \
-                ((flags & PCI_EXP_FLAGS_VERS) > 1 ||    \
-                 (type == PCI_EXP_TYPE_ROOT_PORT ||     \
-                  type == PCI_EXP_TYPE_ENDPOINT ||      \
-                  type == PCI_EXP_TYPE_LEG_END))
-#define pcie_cap_has_sltctl(type, flags)                \
-                ((flags & PCI_EXP_FLAGS_VERS) > 1 ||    \
-                 ((type == PCI_EXP_TYPE_ROOT_PORT) ||   \
-                  (type == PCI_EXP_TYPE_DOWNSTREAM &&   \
-                   (flags & PCI_EXP_FLAGS_SLOT))))
-#define pcie_cap_has_rtctl(type, flags)                 \
-                ((flags & PCI_EXP_FLAGS_VERS) > 1 ||    \
-                 (type == PCI_EXP_TYPE_ROOT_PORT ||     \
-                  type == PCI_EXP_TYPE_RC_EC))
 
 static struct pci_cap_saved_state *pci_find_saved_cap(
         struct pci_dev *pci_dev, char cap)
@@ -885,13 +858,11 @@ static struct pci_cap_saved_state *pci_find_saved_cap(
 
 static int pci_save_pcie_state(struct pci_dev *dev)
 {
-        int pos, i = 0;
+        int i = 0;
         struct pci_cap_saved_state *save_state;
         u16 *cap;
-        u16 flags;
 
-        pos = pci_pcie_cap(dev);
-        if (!pos)
+        if (!pci_is_pcie(dev))
                 return 0;
 
         save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
@@ -899,60 +870,37 @@ static int pci_save_pcie_state(struct pci_dev *dev)
                 dev_err(&dev->dev, "buffer not found in %s\n", __func__);
                 return -ENOMEM;
         }
-        cap = (u16 *)&save_state->cap.data[0];
-
-        pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
 
-        if (pcie_cap_has_devctl(dev->pcie_type, flags))
-                pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]);
-        if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
-                pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
-        if (pcie_cap_has_sltctl(dev->pcie_type, flags))
-                pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
-        if (pcie_cap_has_rtctl(dev->pcie_type, flags))
-                pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
-
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return 0;
+        cap = (u16 *)&save_state->cap.data[0];
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &cap[i++]);
+        pcie_capability_read_word(dev, PCI_EXP_LNKCTL, &cap[i++]);
+        pcie_capability_read_word(dev, PCI_EXP_SLTCTL, &cap[i++]);
+        pcie_capability_read_word(dev, PCI_EXP_RTCTL,  &cap[i++]);
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &cap[i++]);
+        pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &cap[i++]);
+        pcie_capability_read_word(dev, PCI_EXP_SLTCTL2, &cap[i++]);
 
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &cap[i++]);
-        pci_read_config_word(dev, pos + PCI_EXP_LNKCTL2, &cap[i++]);
-        pci_read_config_word(dev, pos + PCI_EXP_SLTCTL2, &cap[i++]);
         return 0;
 }
 
 static void pci_restore_pcie_state(struct pci_dev *dev)
 {
-        int i = 0, pos;
+        int i = 0;
         struct pci_cap_saved_state *save_state;
         u16 *cap;
-        u16 flags;
 
         save_state = pci_find_saved_cap(dev, PCI_CAP_ID_EXP);
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
-        if (!save_state || pos <= 0)
-                return;
-        cap = (u16 *)&save_state->cap.data[0];
-
-        pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
-
-        if (pcie_cap_has_devctl(dev->pcie_type, flags))
-                pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]);
-        if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
-                pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
-        if (pcie_cap_has_sltctl(dev->pcie_type, flags))
-                pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
-        if (pcie_cap_has_rtctl(dev->pcie_type, flags))
-                pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
-
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
+        if (!save_state)
                 return;
 
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, cap[i++]);
-        pci_write_config_word(dev, pos + PCI_EXP_LNKCTL2, cap[i++]);
-        pci_write_config_word(dev, pos + PCI_EXP_SLTCTL2, cap[i++]);
+        cap = (u16 *)&save_state->cap.data[0];
+        pcie_capability_write_word(dev, PCI_EXP_DEVCTL, cap[i++]);
+        pcie_capability_write_word(dev, PCI_EXP_LNKCTL, cap[i++]);
+        pcie_capability_write_word(dev, PCI_EXP_SLTCTL, cap[i++]);
+        pcie_capability_write_word(dev, PCI_EXP_RTCTL, cap[i++]);
+        pcie_capability_write_word(dev, PCI_EXP_DEVCTL2, cap[i++]);
+        pcie_capability_write_word(dev, PCI_EXP_LNKCTL2, cap[i++]);
+        pcie_capability_write_word(dev, PCI_EXP_SLTCTL2, cap[i++]);
 }
 
 
@@ -1543,7 +1491,7 @@ void pci_pme_wakeup_bus(struct pci_bus *bus)
 
 /**
  * pci_wakeup - Wake up a PCI device
- * @dev: Device to handle.
+ * @pci_dev: Device to handle.
  * @ign: ignored parameter
  */
 static int pci_wakeup(struct pci_dev *pci_dev, void *ign)
@@ -2067,35 +2015,24 @@ void pci_free_cap_save_buffers(struct pci_dev *dev)
  */
 void pci_enable_ari(struct pci_dev *dev)
 {
-        int pos;
         u32 cap;
-        u16 ctrl;
         struct pci_dev *bridge;
 
         if (pcie_ari_disabled || !pci_is_pcie(dev) || dev->devfn)
                 return;
 
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI);
-        if (!pos)
+        if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ARI))
                 return;
 
         bridge = dev->bus->self;
         if (!bridge)
                 return;
 
-        /* ARI is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(bridge);
-        if (!pos)
-                return;
-
-        pci_read_config_dword(bridge, pos + PCI_EXP_DEVCAP2, &cap);
+        pcie_capability_read_dword(bridge, PCI_EXP_DEVCAP2, &cap);
         if (!(cap & PCI_EXP_DEVCAP2_ARI))
                 return;
 
-        pci_read_config_word(bridge, pos + PCI_EXP_DEVCTL2, &ctrl);
-        ctrl |= PCI_EXP_DEVCTL2_ARI;
-        pci_write_config_word(bridge, pos + PCI_EXP_DEVCTL2, ctrl);
-
+        pcie_capability_set_word(bridge, PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_ARI);
         bridge->ari_enabled = 1;
 }
 
@@ -2110,20 +2047,14 @@ void pci_enable_ari(struct pci_dev *dev)
  */
 void pci_enable_ido(struct pci_dev *dev, unsigned long type)
 {
-        int pos;
-        u16 ctrl;
+        u16 ctrl = 0;
 
-        /* ID-based Ordering is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return;
-
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
         if (type & PCI_EXP_IDO_REQUEST)
                 ctrl |= PCI_EXP_IDO_REQ_EN;
         if (type & PCI_EXP_IDO_COMPLETION)
                 ctrl |= PCI_EXP_IDO_CMP_EN;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+        if (ctrl)
+                pcie_capability_set_word(dev, PCI_EXP_DEVCTL2, ctrl);
 }
 EXPORT_SYMBOL(pci_enable_ido);
 
@@ -2134,20 +2065,14 @@ EXPORT_SYMBOL(pci_enable_ido);
  */
 void pci_disable_ido(struct pci_dev *dev, unsigned long type)
 {
-        int pos;
-        u16 ctrl;
+        u16 ctrl = 0;
 
-        /* ID-based Ordering is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return;
-
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
         if (type & PCI_EXP_IDO_REQUEST)
-                ctrl &= ~PCI_EXP_IDO_REQ_EN;
+                ctrl |= PCI_EXP_IDO_REQ_EN;
         if (type & PCI_EXP_IDO_COMPLETION)
-                ctrl &= ~PCI_EXP_IDO_CMP_EN;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+                ctrl |= PCI_EXP_IDO_CMP_EN;
+        if (ctrl)
+                pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, ctrl);
 }
 EXPORT_SYMBOL(pci_disable_ido);
 
@@ -2172,17 +2097,11 @@ EXPORT_SYMBOL(pci_disable_ido);
  */
 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
 {
-        int pos;
         u32 cap;
         u16 ctrl;
         int ret;
 
-        /* OBFF is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return -ENOTSUPP;
-
-        pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
+        pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
         if (!(cap & PCI_EXP_OBFF_MASK))
                 return -ENOTSUPP; /* no OBFF support at all */
 
@@ -2193,7 +2112,7 @@ int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
                         return ret;
         }
 
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL2, &ctrl);
         if (cap & PCI_EXP_OBFF_WAKE)
                 ctrl |= PCI_EXP_OBFF_WAKE_EN;
         else {
@@ -2211,7 +2130,7 @@ int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type type)
                         return -ENOTSUPP;
                 }
         }
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+        pcie_capability_write_word(dev, PCI_EXP_DEVCTL2, ctrl);
 
         return 0;
 }
@@ -2225,17 +2144,7 @@ EXPORT_SYMBOL(pci_enable_obff);
  */
 void pci_disable_obff(struct pci_dev *dev)
 {
-        int pos;
-        u16 ctrl;
-
-        /* OBFF is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return;
-
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
-        ctrl &= ~PCI_EXP_OBFF_WAKE_EN;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+        pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, PCI_EXP_OBFF_WAKE_EN);
 }
 EXPORT_SYMBOL(pci_disable_obff);
 
@@ -2248,15 +2157,9 @@ EXPORT_SYMBOL(pci_disable_obff);
  */
 static bool pci_ltr_supported(struct pci_dev *dev)
 {
-        int pos;
         u32 cap;
 
-        /* LTR is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return false;
-
-        pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP2, &cap);
+        pcie_capability_read_dword(dev, PCI_EXP_DEVCAP2, &cap);
 
         return cap & PCI_EXP_DEVCAP2_LTR;
 }
@@ -2273,22 +2176,15 @@ static bool pci_ltr_supported(struct pci_dev *dev)
  */
 int pci_enable_ltr(struct pci_dev *dev)
 {
-        int pos;
-        u16 ctrl;
         int ret;
 
-        if (!pci_ltr_supported(dev))
-                return -ENOTSUPP;
-
-        /* LTR is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return -ENOTSUPP;
-
         /* Only primary function can enable/disable LTR */
         if (PCI_FUNC(dev->devfn) != 0)
                 return -EINVAL;
 
+        if (!pci_ltr_supported(dev))
+                return -ENOTSUPP;
+
         /* Enable upstream ports first */
         if (dev->bus->self) {
                 ret = pci_enable_ltr(dev->bus->self);
@@ -2296,11 +2192,7 @@ int pci_enable_ltr(struct pci_dev *dev)
                         return ret;
         }
 
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
-        ctrl |= PCI_EXP_LTR_EN;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
-
-        return 0;
+        return pcie_capability_set_word(dev, PCI_EXP_DEVCTL2, PCI_EXP_LTR_EN);
 }
 EXPORT_SYMBOL(pci_enable_ltr);
 
@@ -2310,24 +2202,14 @@ EXPORT_SYMBOL(pci_enable_ltr);
  */
 void pci_disable_ltr(struct pci_dev *dev)
 {
-        int pos;
-        u16 ctrl;
-
-        if (!pci_ltr_supported(dev))
-                return;
-
-        /* LTR is a PCIe cap v2 feature */
-        pos = pci_pcie_cap2(dev);
-        if (!pos)
-                return;
-
         /* Only primary function can enable/disable LTR */
         if (PCI_FUNC(dev->devfn) != 0)
                 return;
 
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL2, &ctrl);
-        ctrl &= ~PCI_EXP_LTR_EN;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL2, ctrl);
+        if (!pci_ltr_supported(dev))
+                return;
+
+        pcie_capability_clear_word(dev, PCI_EXP_DEVCTL2, PCI_EXP_LTR_EN);
 }
 EXPORT_SYMBOL(pci_disable_ltr);
 
@@ -2410,9 +2292,6 @@ void pci_enable_acs(struct pci_dev *dev)
         if (!pci_acs_enable)
                 return;
 
-        if (!pci_is_pcie(dev))
-                return;
-
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS);
         if (!pos)
                 return;
@@ -2460,8 +2339,8 @@ bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags)
                 acs_flags &= (PCI_ACS_RR | PCI_ACS_CR |
                               PCI_ACS_EC | PCI_ACS_DT);
 
-        if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM ||
-            pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM ||
+            pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
             pdev->multifunction) {
                 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ACS);
                 if (!pos)
@@ -3177,15 +3056,10 @@ EXPORT_SYMBOL(pci_set_dma_seg_boundary);
 static int pcie_flr(struct pci_dev *dev, int probe)
 {
         int i;
-        int pos;
         u32 cap;
-        u16 status, control;
-
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return -ENOTTY;
+        u16 status;
 
-        pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP, &cap);
+        pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &cap);
         if (!(cap & PCI_EXP_DEVCAP_FLR))
                 return -ENOTTY;
 
@@ -3197,7 +3071,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
                 if (i)
                         msleep((1 << (i - 1)) * 100);
 
-                pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status);
+                pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
                 if (!(status & PCI_EXP_DEVSTA_TRPND))
                         goto clear;
         }
@@ -3206,9 +3080,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
                         "proceeding with reset anyway\n");
 
 clear:
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control);
-        control |= PCI_EXP_DEVCTL_BCR_FLR;
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
+        pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
 
         msleep(100);
 
@@ -3576,18 +3448,11 @@ EXPORT_SYMBOL(pcix_set_mmrbc);
  */
 int pcie_get_readrq(struct pci_dev *dev)
 {
-        int ret, cap;
         u16 ctl;
 
-        cap = pci_pcie_cap(dev);
-        if (!cap)
-                return -EINVAL;
-
-        ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
-        if (!ret)
-                ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl);
 
-        return ret;
+        return 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
 }
 EXPORT_SYMBOL(pcie_get_readrq);
 
@@ -3601,19 +3466,11 @@ EXPORT_SYMBOL(pcie_get_readrq);
  */
 int pcie_set_readrq(struct pci_dev *dev, int rq)
 {
-        int cap, err = -EINVAL;
-        u16 ctl, v;
+        u16 v;
 
         if (rq < 128 || rq > 4096 || !is_power_of_2(rq))
-                goto out;
-
-        cap = pci_pcie_cap(dev);
-        if (!cap)
-                goto out;
+                return -EINVAL;
 
-        err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
-        if (err)
-                goto out;
         /*
          * If using the "performance" PCIe config, we clamp the
          * read rq size to the max packet size to prevent the
@@ -3631,14 +3488,8 @@ int pcie_set_readrq(struct pci_dev *dev, int rq)
 
         v = (ffs(rq) - 8) << 12;
 
-        if ((ctl & PCI_EXP_DEVCTL_READRQ) != v) {
-                ctl &= ~PCI_EXP_DEVCTL_READRQ;
-                ctl |= v;
-                err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
-        }
-
-out:
-        return err;
+        return pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
+                                                  PCI_EXP_DEVCTL_READRQ, v);
 }
 EXPORT_SYMBOL(pcie_set_readrq);
 
@@ -3651,18 +3502,11 @@ EXPORT_SYMBOL(pcie_set_readrq);
  */
 int pcie_get_mps(struct pci_dev *dev)
 {
-        int ret, cap;
         u16 ctl;
 
-        cap = pci_pcie_cap(dev);
-        if (!cap)
-                return -EINVAL;
-
-        ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
-        if (!ret)
-                ret = 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &ctl);
 
-        return ret;
+        return 128 << ((ctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
 }
 
 /**
@@ -3675,32 +3519,18 @@ int pcie_get_mps(struct pci_dev *dev)
  */
 int pcie_set_mps(struct pci_dev *dev, int mps)
 {
-        int cap, err = -EINVAL;
-        u16 ctl, v;
+        u16 v;
 
         if (mps < 128 || mps > 4096 || !is_power_of_2(mps))
-                goto out;
+                return -EINVAL;
 
         v = ffs(mps) - 8;
         if (v > dev->pcie_mpss) 
-                goto out;
+                return -EINVAL;
         v <<= 5;
 
-        cap = pci_pcie_cap(dev);
-        if (!cap)
-                goto out;
-
-        err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
-        if (err)
-                goto out;
-
-        if ((ctl & PCI_EXP_DEVCTL_PAYLOAD) != v) {
-                ctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
-                ctl |= v;
-                err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, ctl);
-        }
-out:
-        return err;
+        return pcie_capability_clear_and_set_word(dev, PCI_EXP_DEVCTL,
+                                                  PCI_EXP_DEVCTL_PAYLOAD, v);
 }
 
 /**
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 52229863e9fe..4e24cb8a94ae 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -288,7 +288,7 @@ static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
         while (1) {
                 if (!pci_is_pcie(dev))
                         break;
-                if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+                if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
                         return dev;
                 if (!dev->bus->self)
                         break;
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 58ad7917553c..030cf12d5468 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -48,7 +48,7 @@ static pci_ers_result_t aer_error_detected(struct pci_dev *dev,
 static void aer_error_resume(struct pci_dev *dev);
 static pci_ers_result_t aer_root_reset(struct pci_dev *dev);
 
-static struct pci_error_handlers aer_error_handlers = {
+static const struct pci_error_handlers aer_error_handlers = {
         .error_detected = aer_error_detected,
         .resume         = aer_error_resume,
 };
@@ -81,10 +81,11 @@ bool pci_aer_available(void)
 static int set_device_error_reporting(struct pci_dev *dev, void *data)
 {
         bool enable = *((bool *)data);
+        int type = pci_pcie_type(dev);
 
-        if ((dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) ||
-            (dev->pcie_type == PCI_EXP_TYPE_UPSTREAM) ||
-            (dev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)) {
+        if ((type == PCI_EXP_TYPE_ROOT_PORT) ||
+            (type == PCI_EXP_TYPE_UPSTREAM) ||
+            (type == PCI_EXP_TYPE_DOWNSTREAM)) {
                 if (enable)
                         pci_enable_pcie_error_reporting(dev);
                 else
@@ -121,19 +122,17 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
 static void aer_enable_rootport(struct aer_rpc *rpc)
 {
         struct pci_dev *pdev = rpc->rpd->port;
-        int pos, aer_pos;
+        int aer_pos;
         u16 reg16;
         u32 reg32;
 
-        pos = pci_pcie_cap(pdev);
         /* Clear PCIe Capability's Device Status */
-        pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
-        pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
+        pcie_capability_read_word(pdev, PCI_EXP_DEVSTA, &reg16);
+        pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, reg16);
 
         /* Disable system error generation in response to error messages */
-        pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
-        reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
-        pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
+        pcie_capability_clear_word(pdev, PCI_EXP_RTCTL,
+                                   SYSTEM_ERROR_INTR_ON_MESG_MASK);
 
         aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
         /* Clear error status */
@@ -395,9 +394,8 @@ static void aer_error_resume(struct pci_dev *dev)
         u16 reg16;
 
         /* Clean up Root device status */
-        pos = pci_pcie_cap(dev);
-        pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &reg16);
-        pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
+        pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &reg16);
+        pcie_capability_write_word(dev, PCI_EXP_DEVSTA, reg16);
 
         /* Clean AER Root Error Status */
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 124f20ff11b2..5194a7d41730 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -60,7 +60,7 @@ static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data)
         p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
         if (p->flags & ACPI_HEST_GLOBAL) {
                 if ((pci_is_pcie(info->pci_dev) &&
-                     info->pci_dev->pcie_type == pcie_type) || bridge)
+                     pci_pcie_type(info->pci_dev) == pcie_type) || bridge)
                         ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
         } else
                 if (hest_match_pci(p, info->pci_dev))
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 0ca053538146..06bad96af415 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -32,53 +32,28 @@ static bool nosourceid;
 module_param(forceload, bool, 0);
 module_param(nosourceid, bool, 0);
 
+#define PCI_EXP_AER_FLAGS       (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
+                                 PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE)
+
 int pci_enable_pcie_error_reporting(struct pci_dev *dev)
 {
-        u16 reg16 = 0;
-        int pos;
-
         if (pcie_aer_get_firmware_first(dev))
                 return -EIO;
 
-        pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
-        if (!pos)
+        if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
                 return -EIO;
 
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return -EIO;
-
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        reg16 |= (PCI_EXP_DEVCTL_CERE |
-                PCI_EXP_DEVCTL_NFERE |
-                PCI_EXP_DEVCTL_FERE |
-                PCI_EXP_DEVCTL_URRE);
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
-
-        return 0;
+        return pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS);
 }
 EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
 
 int pci_disable_pcie_error_reporting(struct pci_dev *dev)
 {
-        u16 reg16 = 0;
-        int pos;
-
         if (pcie_aer_get_firmware_first(dev))
                 return -EIO;
 
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return -EIO;
-
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        reg16 &= ~(PCI_EXP_DEVCTL_CERE |
-                PCI_EXP_DEVCTL_NFERE |
-                PCI_EXP_DEVCTL_FERE |
-                PCI_EXP_DEVCTL_URRE);
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
-
-        return 0;
+        return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
+                                          PCI_EXP_AER_FLAGS);
 }
 EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
 
@@ -151,18 +126,12 @@ static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
          */
         if (atomic_read(&dev->enable_cnt) == 0)
                 return false;
-        pos = pci_pcie_cap(dev);
-        if (!pos)
-                return false;
 
         /* Check if AER is enabled */
-        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
-        if (!(reg16 & (
-                PCI_EXP_DEVCTL_CERE |
-                PCI_EXP_DEVCTL_NFERE |
-                PCI_EXP_DEVCTL_FERE |
-                PCI_EXP_DEVCTL_URRE)))
+        pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &reg16);
+        if (!(reg16 & PCI_EXP_AER_FLAGS))
                 return false;
+
         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
         if (!pos)
                 return false;
@@ -240,7 +209,7 @@ static bool find_source_device(struct pci_dev *parent,
 static int report_error_detected(struct pci_dev *dev, void *data)
 {
         pci_ers_result_t vote;
-        struct pci_error_handlers *err_handler;
+        const struct pci_error_handlers *err_handler;
         struct aer_broadcast_data *result_data;
         result_data = (struct aer_broadcast_data *) data;
 
@@ -274,7 +243,7 @@ static int report_error_detected(struct pci_dev *dev, void *data)
 static int report_mmio_enabled(struct pci_dev *dev, void *data)
 {
         pci_ers_result_t vote;
-        struct pci_error_handlers *err_handler;
+        const struct pci_error_handlers *err_handler;
         struct aer_broadcast_data *result_data;
         result_data = (struct aer_broadcast_data *) data;
 
@@ -292,7 +261,7 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data)
 static int report_slot_reset(struct pci_dev *dev, void *data)
 {
         pci_ers_result_t vote;
-        struct pci_error_handlers *err_handler;
+        const struct pci_error_handlers *err_handler;
         struct aer_broadcast_data *result_data;
         result_data = (struct aer_broadcast_data *) data;
 
@@ -309,7 +278,7 @@ static int report_slot_reset(struct pci_dev *dev, void *data)
 
 static int report_resume(struct pci_dev *dev, void *data)
 {
-        struct pci_error_handlers *err_handler;
+        const struct pci_error_handlers *err_handler;
 
         dev->error_state = pci_channel_io_normal;
 
@@ -465,7 +434,7 @@ static pci_ers_result_t reset_link(struct pci_dev *dev)
 
         if (driver && driver->reset_link) {
                 status = driver->reset_link(udev);
-        } else if (udev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
+        } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) {
                 status = default_downstream_reset_link(udev);
         } else {
                 dev_printk(KERN_DEBUG, &dev->dev,
@@ -540,14 +509,12 @@ static void do_recovery(struct pci_dev *dev, int severity)
                                 "resume",
                                 report_resume);
 
-        dev_printk(KERN_DEBUG, &dev->dev,
-                "AER driver successfully recovered\n");
+        dev_info(&dev->dev, "AER: Device recovery successful\n");
         return;
 
 failed:
         /* TODO: Should kernel panic here? */
-        dev_printk(KERN_DEBUG, &dev->dev,
-                "AER driver didn't recover\n");
+        dev_info(&dev->dev, "AER: Device recovery failed\n");
 }
 
 /**
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index b500840a143b..213753b283a6 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -125,21 +125,16 @@ static int policy_to_clkpm_state(struct pcie_link_state *link)
 
 static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
 {
-        int pos;
-        u16 reg16;
         struct pci_dev *child;
         struct pci_bus *linkbus = link->pdev->subordinate;
 
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pos = pci_pcie_cap(child);
-                if (!pos)
-                        return;
-                pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
                 if (enable)
-                        reg16 |= PCI_EXP_LNKCTL_CLKREQ_EN;
+                        pcie_capability_set_word(child, PCI_EXP_LNKCTL,
+                                                 PCI_EXP_LNKCTL_CLKREQ_EN);
                 else
-                        reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
-                pci_write_config_word(child, pos + PCI_EXP_LNKCTL, reg16);
+                        pcie_capability_clear_word(child, PCI_EXP_LNKCTL,
+                                                   PCI_EXP_LNKCTL_CLKREQ_EN);
         }
         link->clkpm_enabled = !!enable;
 }
@@ -157,7 +152,7 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
 
 static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 {
-        int pos, capable = 1, enabled = 1;
+        int capable = 1, enabled = 1;
         u32 reg32;
         u16 reg16;
         struct pci_dev *child;
@@ -165,16 +160,13 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* All functions should have the same cap and state, take the worst */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pos = pci_pcie_cap(child);
-                if (!pos)
-                        return;
-                pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, &reg32);
+                pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &reg32);
                 if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) {
                         capable = 0;
                         enabled = 0;
                         break;
                 }
-                pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
+                pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
                 if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN))
                         enabled = 0;
         }
@@ -190,7 +182,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
  */
 static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
 {
-        int ppos, cpos, same_clock = 1;
+        int same_clock = 1;
         u16 reg16, parent_reg, child_reg[8];
         unsigned long start_jiffies;
         struct pci_dev *child, *parent = link->pdev;
@@ -203,46 +195,43 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
         BUG_ON(!pci_is_pcie(child));
 
         /* Check downstream component if bit Slot Clock Configuration is 1 */
-        cpos = pci_pcie_cap(child);
-        pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, &reg16);
+        pcie_capability_read_word(child, PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Check upstream component if bit Slot Clock Configuration is 1 */
-        ppos = pci_pcie_cap(parent);
-        pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
+        pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Configure downstream component, all functions */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                cpos = pci_pcie_cap(child);
-                pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, &reg16);
+                pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
                 child_reg[PCI_FUNC(child->devfn)] = reg16;
                 if (same_clock)
                         reg16 |= PCI_EXP_LNKCTL_CCC;
                 else
                         reg16 &= ~PCI_EXP_LNKCTL_CCC;
-                pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, reg16);
+                pcie_capability_write_word(child, PCI_EXP_LNKCTL, reg16);
         }
 
         /* Configure upstream component */
-        pci_read_config_word(parent, ppos + PCI_EXP_LNKCTL, &reg16);
+        pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &reg16);
         parent_reg = reg16;
         if (same_clock)
                 reg16 |= PCI_EXP_LNKCTL_CCC;
         else
                 reg16 &= ~PCI_EXP_LNKCTL_CCC;
-        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16);
+        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
 
         /* Retrain link */
         reg16 |= PCI_EXP_LNKCTL_RL;
-        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16);
+        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
 
         /* Wait for link training end. Break out after waiting for timeout */
         start_jiffies = jiffies;
         for (;;) {
-                pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
+                pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
                 if (!(reg16 & PCI_EXP_LNKSTA_LT))
                         break;
                 if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))
@@ -255,12 +244,10 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
         /* Training failed. Restore common clock configurations */
         dev_printk(KERN_ERR, &parent->dev,
                    "ASPM: Could not configure common clock\n");
-        list_for_each_entry(child, &linkbus->devices, bus_list) {
-                cpos = pci_pcie_cap(child);
-                pci_write_config_word(child, cpos + PCI_EXP_LNKCTL,
-                                      child_reg[PCI_FUNC(child->devfn)]);
-        }
-        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, parent_reg);
+        list_for_each_entry(child, &linkbus->devices, bus_list)
+                pcie_capability_write_word(child, PCI_EXP_LNKCTL,
+                                           child_reg[PCI_FUNC(child->devfn)]);
+        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
 }
 
 /* Convert L0s latency encoding to ns */
@@ -305,16 +292,14 @@ struct aspm_register_info {
 static void pcie_get_aspm_reg(struct pci_dev *pdev,
                               struct aspm_register_info *info)
 {
-        int pos;
         u16 reg16;
         u32 reg32;
 
-        pos = pci_pcie_cap(pdev);
-        pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &reg32);
+        pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &reg32);
         info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
         info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
         info->latency_encoding_l1  = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15;
-        pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
+        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &reg16);
         info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC;
 }
 
@@ -412,7 +397,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
          * do ASPM for now.
          */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
+                if (pci_pcie_type(child) == PCI_EXP_TYPE_PCI_BRIDGE) {
                         link->aspm_disable = ASPM_STATE_ALL;
                         break;
                 }
@@ -420,17 +405,15 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* Get and check endpoint acceptable latencies */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                int pos;
                 u32 reg32, encoding;
                 struct aspm_latency *acceptable =
                         &link->acceptable[PCI_FUNC(child->devfn)];
 
-                if (child->pcie_type != PCI_EXP_TYPE_ENDPOINT &&
-                    child->pcie_type != PCI_EXP_TYPE_LEG_END)
+                if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT &&
+                    pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)
                         continue;
 
-                pos = pci_pcie_cap(child);
-                pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
+                pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
                 /* Calculate endpoint L0s acceptable latency */
                 encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
                 acceptable->l0s = calc_l0s_acceptable(encoding);
@@ -444,13 +427,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 
 static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
 {
-        u16 reg16;
-        int pos = pci_pcie_cap(pdev);
-
-        pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
-        reg16 &= ~0x3;
-        reg16 |= val;
-        pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
+        pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL, 0x3, val);
 }
 
 static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
@@ -505,7 +482,6 @@ static void free_link_state(struct pcie_link_state *link)
 static int pcie_aspm_sanity_check(struct pci_dev *pdev)
 {
         struct pci_dev *child;
-        int pos;
         u32 reg32;
 
         /*
@@ -513,8 +489,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
          * very strange. Disable ASPM for the whole slot
          */
         list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
-                pos = pci_pcie_cap(child);
-                if (!pos)
+                if (!pci_is_pcie(child))
                         return -EINVAL;
 
                 /*
@@ -530,7 +505,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
                  * Disable ASPM for pre-1.1 PCIe device, we follow MS to use
                  * RBER bit to determine if a function is 1.1 version device
                  */
-                pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
+                pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
                 if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) {
                         dev_printk(KERN_INFO, &child->dev, "disabling ASPM"
                                 " on pre-1.1 PCIe device.  You can enable it"
@@ -552,7 +527,7 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev)
         INIT_LIST_HEAD(&link->children);
         INIT_LIST_HEAD(&link->link);
         link->pdev = pdev;
-        if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM) {
                 struct pcie_link_state *parent;
                 parent = pdev->bus->parent->self->link_state;
                 if (!parent) {
@@ -585,12 +560,12 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
 
         if (!pci_is_pcie(pdev) || pdev->link_state)
                 return;
-        if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-            pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
+        if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
+            pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
                 return;
 
         /* VIA has a strange chipset, root port is under a bridge */
-        if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT &&
             pdev->bus->self)
                 return;
 
@@ -647,8 +622,8 @@ static void pcie_update_aspm_capable(struct pcie_link_state *root)
                 if (link->root != root)
                         continue;
                 list_for_each_entry(child, &linkbus->devices, bus_list) {
-                        if ((child->pcie_type != PCI_EXP_TYPE_ENDPOINT) &&
-                            (child->pcie_type != PCI_EXP_TYPE_LEG_END))
+                        if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) &&
+                            (pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END))
                                 continue;
                         pcie_aspm_check_latency(child);
                 }
@@ -663,8 +638,8 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
 
         if (!pci_is_pcie(pdev) || !parent || !parent->link_state)
                 return;
-        if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-            (parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pci_pcie_type(parent) != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
 
         down_read(&pci_bus_sem);
@@ -704,8 +679,8 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
 
         if (aspm_disabled || !pci_is_pcie(pdev) || !link)
                 return;
-        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
         /*
          * Devices changed PM state, we should recheck if latency
@@ -729,8 +704,8 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
         if (aspm_policy != POLICY_POWERSAVE)
                 return;
 
-        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
 
         down_read(&pci_bus_sem);
@@ -757,8 +732,8 @@ static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
         if (!pci_is_pcie(pdev))
                 return;
 
-        if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
-            pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
+            pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM)
                 parent = pdev;
         if (!parent || !parent->link_state)
                 return;
@@ -933,8 +908,8 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
         struct pcie_link_state *link_state = pdev->link_state;
 
         if (!pci_is_pcie(pdev) ||
-            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
+             pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
@@ -950,8 +925,8 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
         struct pcie_link_state *link_state = pdev->link_state;
 
         if (!pci_is_pcie(pdev) ||
-            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
-             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+            (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
+             pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c
index 001f1b78f39c..9ca0dc9ffd84 100644
--- a/drivers/pci/pcie/pme.c
+++ b/drivers/pci/pcie/pme.c
@@ -57,17 +57,12 @@ struct pcie_pme_service_data {
  */
 void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
 {
-        int rtctl_pos;
-        u16 rtctl;
-
-        rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
-
-        pci_read_config_word(dev, rtctl_pos, &rtctl);
         if (enable)
-                rtctl |= PCI_EXP_RTCTL_PMEIE;
+                pcie_capability_set_word(dev, PCI_EXP_RTCTL,
+                                         PCI_EXP_RTCTL_PMEIE);
         else
-                rtctl &= ~PCI_EXP_RTCTL_PMEIE;
-        pci_write_config_word(dev, rtctl_pos, rtctl);
+                pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
+                                           PCI_EXP_RTCTL_PMEIE);
 }
 
 /**
@@ -120,7 +115,7 @@ static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
         if (!dev)
                 return false;
 
-        if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
+        if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
                 down_read(&pci_bus_sem);
                 if (pcie_pme_walk_bus(bus))
                         found = true;
@@ -226,18 +221,15 @@ static void pcie_pme_work_fn(struct work_struct *work)
         struct pcie_pme_service_data *data =
                         container_of(work, struct pcie_pme_service_data, work);
         struct pci_dev *port = data->srv->port;
-        int rtsta_pos;
         u32 rtsta;
 
-        rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
-
         spin_lock_irq(&data->lock);
 
         for (;;) {
                 if (data->noirq)
                         break;
 
-                pci_read_config_dword(port, rtsta_pos, &rtsta);
+                pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
                 if (rtsta & PCI_EXP_RTSTA_PME) {
                         /*
                          * Clear PME status of the port.  If there are other
@@ -276,17 +268,14 @@ static irqreturn_t pcie_pme_irq(int irq, void *context)
 {
         struct pci_dev *port;
         struct pcie_pme_service_data *data;
-        int rtsta_pos;
         u32 rtsta;
         unsigned long flags;
 
         port = ((struct pcie_device *)context)->port;
         data = get_service_data((struct pcie_device *)context);
 
-        rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
-
         spin_lock_irqsave(&data->lock, flags);
-        pci_read_config_dword(port, rtsta_pos, &rtsta);
+        pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
 
         if (!(rtsta & PCI_EXP_RTSTA_PME)) {
                 spin_unlock_irqrestore(&data->lock, flags);
@@ -335,13 +324,13 @@ static void pcie_pme_mark_devices(struct pci_dev *port)
                 struct pci_dev *dev;
 
                 /* Check if this is a root port event collector. */
-                if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
+                if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
                         return;
 
                 down_read(&pci_bus_sem);
                 list_for_each_entry(dev, &bus->devices, bus_list)
                         if (pci_is_pcie(dev)
-                            && dev->pcie_type == PCI_EXP_TYPE_RC_END)
+                            && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
                                 pcie_pme_set_native(dev, NULL);
                 up_read(&pci_bus_sem);
         }
diff --git a/drivers/pci/pcie/portdrv_bus.c b/drivers/pci/pcie/portdrv_bus.c
index 18bf90f748f6..67be55a7f260 100644
--- a/drivers/pci/pcie/portdrv_bus.c
+++ b/drivers/pci/pcie/portdrv_bus.c
@@ -38,7 +38,7 @@ static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
                 return 0;
 
         if ((driver->port_type != PCIE_ANY_PORT) &&
-            (driver->port_type != pciedev->port->pcie_type))
+            (driver->port_type != pci_pcie_type(pciedev->port)))
                 return 0;
 
         return 1;
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 75915b30ad19..d03a7a39b2d8 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -200,10 +200,13 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 {
         int i, irq = -1;
 
-        /* We have to use INTx if MSI cannot be used for PCIe PME or pciehp. */
+        /*
+         * If MSI cannot be used for PCIe PME or hotplug, we have to use
+         * INTx or other interrupts, e.g. system shared interrupt.
+         */
         if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
             ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
-                if (dev->pin)
+                if (dev->irq)
                         irq = dev->irq;
                 goto no_msi;
         }
@@ -212,8 +215,12 @@ static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
         if (!pcie_port_enable_msix(dev, irqs, mask))
                 return 0;
 
-        /* We're not going to use MSI-X, so try MSI and fall back to INTx */
-        if (!pci_enable_msi(dev) || dev->pin)
+        /*
+         * We're not going to use MSI-X, so try MSI and fall back to INTx.
+         * If neither MSI/MSI-X nor INTx available, try other interrupt.  On
+         * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
+         */
+        if (!pci_enable_msi(dev) || dev->irq)
                 irq = dev->irq;
 
  no_msi:
@@ -246,8 +253,7 @@ static void cleanup_service_irqs(struct pci_dev *dev)
  */
 static int get_port_device_capability(struct pci_dev *dev)
 {
-        int services = 0, pos;
-        u16 reg16;
+        int services = 0;
         u32 reg32;
         int cap_mask = 0;
         int err;
@@ -265,11 +271,9 @@ static int get_port_device_capability(struct pci_dev *dev)
                         return 0;
         }
 
-        pos = pci_pcie_cap(dev);
-        pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
         /* Hot-Plug Capable */
-        if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
-                pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
+        if (cap_mask & PCIE_PORT_SERVICE_HP) {
+                pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, &reg32);
                 if (reg32 & PCI_EXP_SLTCAP_HPC) {
                         services |= PCIE_PORT_SERVICE_HP;
                         /*
@@ -277,10 +281,8 @@ static int get_port_device_capability(struct pci_dev *dev)
                          * enabled by the BIOS and the hot-plug service driver
                          * is not loaded.
                          */
-                        pos += PCI_EXP_SLTCTL;
-                        pci_read_config_word(dev, pos, &reg16);
-                        reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
-                        pci_write_config_word(dev, pos, reg16);
+                        pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
+                                PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
                 }
         }
         /* AER capable */
@@ -298,7 +300,7 @@ static int get_port_device_capability(struct pci_dev *dev)
                 services |= PCIE_PORT_SERVICE_VC;
         /* Root ports are capable of generating PME too */
         if ((cap_mask & PCIE_PORT_SERVICE_PME)
-            && dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
+            && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
                 services |= PCIE_PORT_SERVICE_PME;
                 /*
                  * Disable PME interrupt on this port in case it's been enabled
@@ -336,7 +338,7 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
         device->release = release_pcie_device;  /* callback to free pcie dev */
         dev_set_name(device, "%s:pcie%02x",
                      pci_name(pdev),
-                     get_descriptor_id(pdev->pcie_type, service));
+                     get_descriptor_id(pci_pcie_type(pdev), service));
         device->parent = &pdev->dev;
         device_enable_async_suspend(device);
 
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index e76b44777dbf..0761d90ca279 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -64,14 +64,7 @@ __setup("pcie_ports=", pcie_port_setup);
  */
 void pcie_clear_root_pme_status(struct pci_dev *dev)
 {
-        int rtsta_pos;
-        u32 rtsta;
-
-        rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
-
-        pci_read_config_dword(dev, rtsta_pos, &rtsta);
-        rtsta |= PCI_EXP_RTSTA_PME;
-        pci_write_config_dword(dev, rtsta_pos, rtsta);
+        pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
 }
 
 static int pcie_portdrv_restore_config(struct pci_dev *dev)
@@ -95,7 +88,7 @@ static int pcie_port_resume_noirq(struct device *dev)
          * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
          * bits now just in case (shouldn't hurt).
          */
-        if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
                 pcie_clear_root_pme_status(pdev);
         return 0;
 }
@@ -195,9 +188,9 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
         int status;
 
         if (!pci_is_pcie(dev) ||
-            ((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
-             (dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) &&
-             (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
+            ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
+             (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
+             (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
                 return -ENODEV;
 
         if (!dev->irq && dev->pin) {
@@ -385,11 +378,11 @@ static const struct pci_device_id port_pci_ids[] = { {
 };
 MODULE_DEVICE_TABLE(pci, port_pci_ids);
 
-static struct pci_error_handlers pcie_portdrv_err_handler = {
-                .error_detected = pcie_portdrv_error_detected,
-                .mmio_enabled = pcie_portdrv_mmio_enabled,
-                .slot_reset = pcie_portdrv_slot_reset,
-                .resume = pcie_portdrv_err_resume,
+static const struct pci_error_handlers pcie_portdrv_err_handler = {
+        .error_detected = pcie_portdrv_error_detected,
+        .mmio_enabled = pcie_portdrv_mmio_enabled,
+        .slot_reset = pcie_portdrv_slot_reset,
+        .resume = pcie_portdrv_err_resume,
 };
 
 static struct pci_driver pcie_portdriver = {
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 9f8a6b79a8ec..ec909afa90b6 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -606,10 +606,10 @@ static void pci_set_bus_speed(struct pci_bus *bus)
                 u32 linkcap;
                 u16 linksta;
 
-                pci_read_config_dword(bridge, pos + PCI_EXP_LNKCAP, &linkcap);
+                pcie_capability_read_dword(bridge, PCI_EXP_LNKCAP, &linkcap);
                 bus->max_bus_speed = pcie_link_speed[linkcap & 0xf];
 
-                pci_read_config_word(bridge, pos + PCI_EXP_LNKSTA, &linksta);
+                pcie_capability_read_word(bridge, PCI_EXP_LNKSTA, &linksta);
                 pcie_update_link_speed(bus, linksta);
         }
 }
@@ -729,8 +729,10 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 
         /* Check if setup is sensible at all */
         if (!pass &&
-            (primary != bus->number || secondary <= bus->number)) {
-                dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
+            (primary != bus->number || secondary <= bus->number ||
+             secondary > subordinate)) {
+                dev_info(&dev->dev, "bridge configuration invalid ([bus %02x-%02x]), reconfiguring\n",
+                         secondary, subordinate);
                 broken = 1;
         }
 
@@ -932,24 +934,16 @@ void set_pcie_port_type(struct pci_dev *pdev)
         pdev->is_pcie = 1;
         pdev->pcie_cap = pos;
         pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
-        pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
+        pdev->pcie_flags_reg = reg16;
         pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, &reg16);
         pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
 }
 
 void set_pcie_hotplug_bridge(struct pci_dev *pdev)
 {
-        int pos;
-        u16 reg16;
         u32 reg32;
 
-        pos = pci_pcie_cap(pdev);
-        if (!pos)
-                return;
-        pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
-        if (!(reg16 & PCI_EXP_FLAGS_SLOT))
-                return;
-        pci_read_config_dword(pdev, pos + PCI_EXP_SLTCAP, &reg32);
+        pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &reg32);
         if (reg32 & PCI_EXP_SLTCAP_HPC)
                 pdev->is_hotplug_bridge = 1;
 }
@@ -1163,8 +1157,7 @@ int pci_cfg_space_size(struct pci_dev *dev)
         if (class == PCI_CLASS_BRIDGE_HOST)
                 return pci_cfg_space_size_ext(dev);
 
-        pos = pci_pcie_cap(dev);
-        if (!pos) {
+        if (!pci_is_pcie(dev)) {
                 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
                 if (!pos)
                         goto fail;
@@ -1386,9 +1379,9 @@ static int only_one_child(struct pci_bus *bus)
 
         if (!parent || !pci_is_pcie(parent))
                 return 0;
-        if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
+        if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
                 return 1;
-        if (parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM &&
+        if (pci_pcie_type(parent) == PCI_EXP_TYPE_DOWNSTREAM &&
             !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
                 return 1;
         return 0;
@@ -1465,7 +1458,7 @@ static int pcie_find_smpss(struct pci_dev *dev, void *data)
          */
         if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) ||
              (dev->bus->self &&
-              dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT)))
+              pci_pcie_type(dev->bus->self) != PCI_EXP_TYPE_ROOT_PORT)))
                 *smpss = 0;
 
         if (*smpss > dev->pcie_mpss)
@@ -1481,7 +1474,8 @@ static void pcie_write_mps(struct pci_dev *dev, int mps)
         if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
                 mps = 128 << dev->pcie_mpss;
 
-                if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && dev->bus->self)
+                if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT &&
+                    dev->bus->self)
                         /* For "Performance", the assumption is made that
                          * downstream communication will never be larger than
                          * the MRRS.  So, the MPS only needs to be configured
@@ -1756,11 +1750,6 @@ int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max)
                            "busn_res: can not insert %pR under %s%pR (conflicts with %s %pR)\n",
                             res, pci_is_root_bus(b) ? "domain " : "",
                             parent_res, conflict->name, conflict);
-        else
-                dev_printk(KERN_DEBUG, &b->dev,
-                           "busn_res: %pR is inserted under %s%pR\n",
-                           res, pci_is_root_bus(b) ? "domain " : "",
-                           parent_res);
 
         return conflict == NULL;
 }
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c
index 27911b55c2a5..eb907a8faf2a 100644
--- a/drivers/pci/proc.c
+++ b/drivers/pci/proc.c
@@ -434,25 +434,6 @@ int pci_proc_detach_device(struct pci_dev *dev)
         return 0;
 }
 
-#if 0
-int pci_proc_attach_bus(struct pci_bus* bus)
-{
-        struct proc_dir_entry *de = bus->procdir;
-
-        if (!proc_initialized)
-                return -EACCES;
-
-        if (!de) {
-                char name[16];
-                sprintf(name, "%02x", bus->number);
-                de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
-                if (!de)
-                        return -ENOMEM;
-        }
-        return 0;
-}
-#endif  /*  0  */
-
 int pci_proc_detach_bus(struct pci_bus* bus)
 {
         struct proc_dir_entry *de = bus->procdir;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 51553179e967..7a451ff56ecc 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -3081,17 +3081,36 @@ static int reset_intel_generic_dev(struct pci_dev *dev, int probe)
 
 static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe)
 {
-        int pos;
+        int i;
+        u16 status;
 
-        pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
-        if (!pos)
-                return -ENOTTY;
+        /*
+         * http://www.intel.com/content/dam/doc/datasheet/82599-10-gbe-controller-datasheet.pdf
+         *
+         * The 82599 supports FLR on VFs, but FLR support is reported only
+         * in the PF DEVCAP (sec 9.3.10.4), not in the VF DEVCAP (sec 9.5).
+         * Therefore, we can't use pcie_flr(), which checks the VF DEVCAP.
+         */
 
         if (probe)
                 return 0;
 
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
-                                PCI_EXP_DEVCTL_BCR_FLR);
+        /* Wait for Transaction Pending bit clean */
+        for (i = 0; i < 4; i++) {
+                if (i)
+                        msleep((1 << (i - 1)) * 100);
+
+                pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &status);
+                if (!(status & PCI_EXP_DEVSTA_TRPND))
+                        goto clear;
+        }
+
+        dev_err(&dev->dev, "transaction is not cleared; "
+                        "proceeding with reset anyway\n");
+
+clear:
+        pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
+
         msleep(100);
 
         return 0;
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index 04a4861b4749..513972f3ed13 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -32,152 +32,82 @@ static void pci_stop_dev(struct pci_dev *dev)
 
 static void pci_destroy_dev(struct pci_dev *dev)
 {
-        /* Remove the device from the device lists, and prevent any further
-         * list accesses from this device */
         down_write(&pci_bus_sem);
         list_del(&dev->bus_list);
-        dev->bus_list.next = dev->bus_list.prev = NULL;
         up_write(&pci_bus_sem);
 
         pci_free_resources(dev);
         pci_dev_put(dev);
 }
 
-/**
- * pci_remove_device_safe - remove an unused hotplug device
- * @dev: the device to remove
- *
- * Delete the device structure from the device lists and 
- * notify userspace (/sbin/hotplug), but only if the device
- * in question is not being used by a driver.
- * Returns 0 on success.
- */
-#if 0
-int pci_remove_device_safe(struct pci_dev *dev)
-{
-        if (pci_dev_driver(dev))
-                return -EBUSY;
-        pci_destroy_dev(dev);
-        return 0;
-}
-#endif  /*  0  */
-
-void pci_remove_bus(struct pci_bus *pci_bus)
+void pci_remove_bus(struct pci_bus *bus)
 {
-        pci_proc_detach_bus(pci_bus);
+        pci_proc_detach_bus(bus);
 
         down_write(&pci_bus_sem);
-        list_del(&pci_bus->node);
-        pci_bus_release_busn_res(pci_bus);
+        list_del(&bus->node);
+        pci_bus_release_busn_res(bus);
         up_write(&pci_bus_sem);
-        if (!pci_bus->is_added)
+        if (!bus->is_added)
                 return;
 
-        pci_remove_legacy_files(pci_bus);
-        device_unregister(&pci_bus->dev);
+        pci_remove_legacy_files(bus);
+        device_unregister(&bus->dev);
 }
 EXPORT_SYMBOL(pci_remove_bus);
 
-static void __pci_remove_behind_bridge(struct pci_dev *dev);
-/**
- * pci_stop_and_remove_bus_device - remove a PCI device and any children
- * @dev: the device to remove
- *
- * Remove a PCI device from the device lists, informing the drivers
- * that the device has been removed.  We also remove any subordinate
- * buses and children in a depth-first manner.
- *
- * For each device we remove, delete the device structure from the
- * device lists, remove the /proc entry, and notify userspace
- * (/sbin/hotplug).
- */
-void __pci_remove_bus_device(struct pci_dev *dev)
+static void pci_stop_bus_device(struct pci_dev *dev)
 {
-        if (dev->subordinate) {
-                struct pci_bus *b = dev->subordinate;
+        struct pci_bus *bus = dev->subordinate;
+        struct pci_dev *child, *tmp;
 
-                __pci_remove_behind_bridge(dev);
-                pci_remove_bus(b);
-                dev->subordinate = NULL;
+        /*
+         * Stopping an SR-IOV PF device removes all the associated VFs,
+         * which will update the bus->devices list and confuse the
+         * iterator.  Therefore, iterate in reverse so we remove the VFs
+         * first, then the PF.
+         */
+        if (bus) {
+                list_for_each_entry_safe_reverse(child, tmp,
+                                                 &bus->devices, bus_list)
+                        pci_stop_bus_device(child);
         }
 
-        pci_destroy_dev(dev);
-}
-EXPORT_SYMBOL(__pci_remove_bus_device);
-
-void pci_stop_and_remove_bus_device(struct pci_dev *dev)
-{
-        pci_stop_bus_device(dev);
-        __pci_remove_bus_device(dev);
+        pci_stop_dev(dev);
 }
 
-static void __pci_remove_behind_bridge(struct pci_dev *dev)
+static void pci_remove_bus_device(struct pci_dev *dev)
 {
-        struct list_head *l, *n;
+        struct pci_bus *bus = dev->subordinate;
+        struct pci_dev *child, *tmp;
 
-        if (dev->subordinate)
-                list_for_each_safe(l, n, &dev->subordinate->devices)
-                        __pci_remove_bus_device(pci_dev_b(l));
-}
+        if (bus) {
+                list_for_each_entry_safe(child, tmp,
+                                         &bus->devices, bus_list)
+                        pci_remove_bus_device(child);
 
-static void pci_stop_behind_bridge(struct pci_dev *dev)
-{
-        struct list_head *l, *n;
+                pci_remove_bus(bus);
+                dev->subordinate = NULL;
+        }
 
-        if (dev->subordinate)
-                list_for_each_safe(l, n, &dev->subordinate->devices)
-                        pci_stop_bus_device(pci_dev_b(l));
+        pci_destroy_dev(dev);
 }
 
 /**
- * pci_stop_and_remove_behind_bridge - stop and remove all devices behind
- *                                       a PCI bridge
- * @dev: PCI bridge device
+ * pci_stop_and_remove_bus_device - remove a PCI device and any children
+ * @dev: the device to remove
  *
- * Remove all devices on the bus, except for the parent bridge.
- * This also removes any child buses, and any devices they may
- * contain in a depth-first manner.
- */
-void pci_stop_and_remove_behind_bridge(struct pci_dev *dev)
-{
-        pci_stop_behind_bridge(dev);
-        __pci_remove_behind_bridge(dev);
-}
-
-static void pci_stop_bus_devices(struct pci_bus *bus)
-{
-        struct list_head *l, *n;
-
-        /*
-         * VFs could be removed by pci_stop_and_remove_bus_device() in the
-         *  pci_stop_bus_devices() code path for PF.
-         *  aka, bus->devices get updated in the process.
-         * but VFs are inserted after PFs when SRIOV is enabled for PF,
-         * We can iterate the list backwards to get prev valid PF instead
-         *  of removed VF.
-         */
-        list_for_each_prev_safe(l, n, &bus->devices) {
-                struct pci_dev *dev = pci_dev_b(l);
-                pci_stop_bus_device(dev);
-        }
-}
-
-/**
- * pci_stop_bus_device - stop a PCI device and any children
- * @dev: the device to stop
+ * Remove a PCI device from the device lists, informing the drivers
+ * that the device has been removed.  We also remove any subordinate
+ * buses and children in a depth-first manner.
  *
- * Stop a PCI device (detach the driver, remove from the global list
- * and so on). This also stop any subordinate buses and children in a
- * depth-first manner.
+ * For each device we remove, delete the device structure from the
+ * device lists, remove the /proc entry, and notify userspace
+ * (/sbin/hotplug).
  */
-void pci_stop_bus_device(struct pci_dev *dev)
+void pci_stop_and_remove_bus_device(struct pci_dev *dev)
 {
-        if (dev->subordinate)
-                pci_stop_bus_devices(dev->subordinate);
-
-        pci_stop_dev(dev);
+        pci_stop_bus_device(dev);
+        pci_remove_bus_device(dev);
 }
-
 EXPORT_SYMBOL(pci_stop_and_remove_bus_device);
-EXPORT_SYMBOL(pci_stop_and_remove_behind_bridge);
-EXPORT_SYMBOL_GPL(pci_stop_bus_device);
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index 48ebdb237f3f..0b3037ab8b93 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -167,44 +167,6 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
         return rom;
 }
 
-#if 0
-/**
- * pci_map_rom_copy - map a PCI ROM to kernel space, create a copy
- * @pdev: pointer to pci device struct
- * @size: pointer to receive size of pci window over ROM
- *
- * Return: kernel virtual pointer to image of ROM
- *
- * Map a PCI ROM into kernel space. If ROM is boot video ROM,
- * the shadow BIOS copy will be returned instead of the
- * actual ROM.
- */
-void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size)
-{
-        struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
-        void __iomem *rom;
-
-        rom = pci_map_rom(pdev, size);
-        if (!rom)
-                return NULL;
-
-        if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW |
-                          IORESOURCE_ROM_BIOS_COPY))
-                return rom;
-
-        res->start = (unsigned long)kmalloc(*size, GFP_KERNEL);
-        if (!res->start)
-                return rom;
-
-        res->end = res->start + *size;
-        memcpy_fromio((void*)(unsigned long)res->start, rom, *size);
-        pci_unmap_rom(pdev, rom);
-        res->flags |= IORESOURCE_ROM_COPY;
-
-        return (void __iomem *)(unsigned long)res->start;
-}
-#endif  /*  0  */
-
 /**
  * pci_unmap_rom - unmap the ROM from kernel space
  * @pdev: pointer to pci device struct
@@ -226,27 +188,6 @@ void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
                 pci_disable_rom(pdev);
 }
 
-#if 0
-/**
- * pci_remove_rom - disable the ROM and remove its sysfs attribute
- * @pdev: pointer to pci device struct
- *
- * Remove the rom file in sysfs and disable ROM decoding.
- */
-void pci_remove_rom(struct pci_dev *pdev)
-{
-        struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
-
-        if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
-                sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
-        if (!(res->flags & (IORESOURCE_ROM_ENABLE |
-                            IORESOURCE_ROM_SHADOW |
-                            IORESOURCE_ROM_BIOS_COPY |
-                            IORESOURCE_ROM_COPY)))
-                pci_disable_rom(pdev);
-}
-#endif  /*  0  */
-
 /**
  * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
  * @pdev: pointer to pci device struct
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index 993d4a0a2469..bf969ba58e59 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -41,7 +41,7 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
                         continue;
                 }
                 /* PCI device should connect to a PCIe bridge */
-                if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) {
+                if (pci_pcie_type(pdev) != PCI_EXP_TYPE_PCI_BRIDGE) {
                         /* Busted hardware? */
                         WARN_ON_ONCE(1);
                         return NULL;
@@ -130,16 +130,14 @@ pci_find_next_bus(const struct pci_bus *from)
  * decrement the reference count by calling pci_dev_put().
  * If no device is found, %NULL is returned.
  */
-struct pci_dev * pci_get_slot(struct pci_bus *bus, unsigned int devfn)
+struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn)
 {
-        struct list_head *tmp;
         struct pci_dev *dev;
 
         WARN_ON(in_interrupt());
         down_read(&pci_bus_sem);
 
-        list_for_each(tmp, &bus->devices) {
-                dev = pci_dev_b(tmp);
+        list_for_each_entry(dev, &bus->devices, bus_list) {
                 if (dev->devfn == devfn)
                         goto out;
         }
@@ -245,30 +243,14 @@ struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
                                unsigned int ss_vendor, unsigned int ss_device,
                                struct pci_dev *from)
 {
-        struct pci_dev *pdev;
-        struct pci_device_id *id;
-
-        /*
-         * pci_find_subsys() can be called on the ide_setup() path,
-         * super-early in boot.  But the down_read() will enable local
-         * interrupts, which can cause some machines to crash.  So here we
-         * detect and flag that situation and bail out early.
-         */
-        if (unlikely(no_pci_devices()))
-                return NULL;
-
-        id = kzalloc(sizeof(*id), GFP_KERNEL);
-        if (!id)
-                return NULL;
-        id->vendor = vendor;
-        id->device = device;
-        id->subvendor = ss_vendor;
-        id->subdevice = ss_device;
-
-        pdev = pci_get_dev_by_id(id, from);
-        kfree(id);
-
-        return pdev;
+        struct pci_device_id id = {
+                .vendor = vendor,
+                .device = device,
+                .subvendor = ss_vendor,
+                .subdevice = ss_device,
+        };
+
+        return pci_get_dev_by_id(&id, from);
 }
 
 /**
@@ -307,19 +289,16 @@ pci_get_device(unsigned int vendor, unsigned int device, struct pci_dev *from)
  */
 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
 {
-        struct pci_dev *dev;
-        struct pci_device_id *id;
-
-        id = kzalloc(sizeof(*id), GFP_KERNEL);
-        if (!id)
-                return NULL;
-        id->vendor = id->device = id->subvendor = id->subdevice = PCI_ANY_ID;
-        id->class_mask = PCI_ANY_ID;
-        id->class = class;
-
-        dev = pci_get_dev_by_id(id, from);
-        kfree(id);
-        return dev;
+        struct pci_device_id id = {
+                .vendor = PCI_ANY_ID,
+                .device = PCI_ANY_ID,
+                .subvendor = PCI_ANY_ID,
+                .subdevice = PCI_ANY_ID,
+                .class_mask = PCI_ANY_ID,
+                .class = class,
+        };
+
+        return pci_get_dev_by_id(&id, from);
 }
 
 /**
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index fb506137aaee..1e808ca338f8 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -697,6 +697,38 @@ static resource_size_t calculate_memsize(resource_size_t size,
         return size;
 }
 
+resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
+                                                unsigned long type)
+{
+        return 1;
+}
+
+#define PCI_P2P_DEFAULT_MEM_ALIGN       0x100000        /* 1MiB */
+#define PCI_P2P_DEFAULT_IO_ALIGN        0x1000          /* 4KiB */
+#define PCI_P2P_DEFAULT_IO_ALIGN_1K     0x400           /* 1KiB */
+
+static resource_size_t window_alignment(struct pci_bus *bus,
+                                        unsigned long type)
+{
+        resource_size_t align = 1, arch_align;
+
+        if (type & IORESOURCE_MEM)
+                align = PCI_P2P_DEFAULT_MEM_ALIGN;
+        else if (type & IORESOURCE_IO) {
+                /*
+                 * Per spec, I/O windows are 4K-aligned, but some
+                 * bridges have an extension to support 1K alignment.
+                 */
+                if (bus->self->io_window_1k)
+                        align = PCI_P2P_DEFAULT_IO_ALIGN_1K;
+                else
+                        align = PCI_P2P_DEFAULT_IO_ALIGN;
+        }
+
+        arch_align = pcibios_window_alignment(bus, type);
+        return max(align, arch_align);
+}
+
 /**
  * pbus_size_io() - size the io window of a given bus
  *
@@ -717,17 +749,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
         struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
         unsigned long size = 0, size0 = 0, size1 = 0;
         resource_size_t children_add_size = 0;
-        resource_size_t min_align = 4096, align;
+        resource_size_t min_align, io_align, align;
 
         if (!b_res)
                 return;
 
-        /*
-         * Per spec, I/O windows are 4K-aligned, but some bridges have an
-         * extension to support 1K alignment.
-         */
-        if (bus->self->io_window_1k)
-                min_align = 1024;
+        io_align = min_align = window_alignment(bus, IORESOURCE_IO);
         list_for_each_entry(dev, &bus->devices, bus_list) {
                 int i;
 
@@ -754,8 +781,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
                 }
         }
 
-        if (min_align > 4096)
-                min_align = 4096;
+        if (min_align > io_align)
+                min_align = io_align;
 
         size0 = calculate_iosize(size, min_size, size1,
                         resource_size(b_res), min_align);
@@ -785,6 +812,28 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
         }
 }
 
+static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
+                                                  int max_order)
+{
+        resource_size_t align = 0;
+        resource_size_t min_align = 0;
+        int order;
+
+        for (order = 0; order <= max_order; order++) {
+                resource_size_t align1 = 1;
+
+                align1 <<= (order + 20);
+
+                if (!align)
+                        min_align = align1;
+                else if (ALIGN(align + min_align, min_align) < align1)
+                        min_align = align1 >> 1;
+                align += aligns[order];
+        }
+
+        return min_align;
+}
+
 /**
  * pbus_size_mem() - size the memory window of a given bus
  *
@@ -864,19 +913,9 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                                 children_add_size += get_res_add_size(realloc_head, r);
                 }
         }
-        align = 0;
-        min_align = 0;
-        for (order = 0; order <= max_order; order++) {
-                resource_size_t align1 = 1;
 
-                align1 <<= (order + 20);
-
-                if (!align)
-                        min_align = align1;
-                else if (ALIGN(align + min_align, min_align) < align1)
-                        min_align = align1 >> 1;
-                align += aligns[order];
-        }
+        min_align = calculate_mem_align(aligns, max_order);
+        min_align = max(min_align, window_alignment(bus, b_res->flags & mask));
         size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
         if (children_add_size > add_size)
                 add_size = children_add_size;
diff --git a/drivers/pci/setup-irq.c b/drivers/pci/setup-irq.c
index eb219a1d16f7..9bd6864ec5d3 100644
--- a/drivers/pci/setup-irq.c
+++ b/drivers/pci/setup-irq.c
@@ -17,8 +17,13 @@
 #include <linux/ioport.h>
 #include <linux/cache.h>
 
+void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
+{
+        dev_dbg(&dev->dev, "assigning IRQ %02d\n", irq);
+        pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
+}
 
-static void __init
+static void
 pdev_fixup_irq(struct pci_dev *dev,
                u8 (*swizzle)(struct pci_dev *, u8 *),
                int (*map_irq)(const struct pci_dev *, u8, u8))
@@ -54,7 +59,7 @@ pdev_fixup_irq(struct pci_dev *dev,
         pcibios_update_irq(dev, irq);
 }
 
-void __init
+void
 pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *),
                int (*map_irq)(const struct pci_dev *, u8, u8))
 {
diff --git a/drivers/pci/xen-pcifront.c b/drivers/pci/xen-pcifront.c
index d6cc62cb4cf7..def8d0b5620c 100644
--- a/drivers/pci/xen-pcifront.c
+++ b/drivers/pci/xen-pcifront.c
@@ -982,7 +982,6 @@ static int pcifront_detach_devices(struct pcifront_device *pdev)
         int err = 0;
         int i, num_devs;
         unsigned int domain, bus, slot, func;
-        struct pci_bus *pci_bus;
         struct pci_dev *pci_dev;
         char str[64];
 
@@ -1032,13 +1031,8 @@ static int pcifront_detach_devices(struct pcifront_device *pdev)
                         goto out;
                 }
 
-                pci_bus = pci_find_bus(domain, bus);
-                if (!pci_bus) {
-                        dev_dbg(&pdev->xdev->dev, "Cannot get bus %04x:%02x\n",
-                                domain, bus);
-                        continue;
-                }
-                pci_dev = pci_get_slot(pci_bus, PCI_DEVFN(slot, func));
+                pci_dev = pci_get_domain_bus_and_slot(domain, bus,
+                                PCI_DEVFN(slot, func));
                 if (!pci_dev) {
                         dev_dbg(&pdev->xdev->dev,
                                 "Cannot get PCI device %04x:%02x:%02x.%d\n",