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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2009-11-25 07:06:51 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-12-04 18:56:24 -0500
commitf9f45604edcf87ac86a9d68ca54106c5fb743719 (patch)
tree1983255e2df44203e0ae7ce8d3aa2c1c9c67b548 /drivers/pci
parent694f88ef7ada0d99e304f687ba92e268a594358b (diff)
PCI: portdrv: remove redundant definitions
Remove unnecessary definitions from portdrv.h and use generic definitions instead. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pcie/portdrv.h20
-rw-r--r--drivers/pci/pcie/portdrv_core.c13
2 files changed, 9 insertions, 24 deletions
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h
index cc1f8435ee20..aaeb9d21cba5 100644
--- a/drivers/pci/pcie/portdrv.h
+++ b/drivers/pci/pcie/portdrv.h
@@ -11,24 +11,10 @@
11 11
12#include <linux/compiler.h> 12#include <linux/compiler.h>
13 13
14#if !defined(PCI_CAP_ID_PME) 14#define PCIE_PORT_DEVICE_MAXSERVICES 4
15#define PCI_CAP_ID_PME 1
16#endif
17
18#if !defined(PCI_CAP_ID_EXP)
19#define PCI_CAP_ID_EXP 0x10
20#endif
21
22#define PORT_TYPE_MASK 0xf
23#define PORT_TO_SLOT_MASK 0x100
24#define SLOT_HP_CAPABLE_MASK 0x40
25#define PCIE_CAPABILITIES_REG 0x2
26#define PCIE_SLOT_CAPABILITIES_REG 0x14
27#define PCIE_PORT_DEVICE_MAXSERVICES 4
28#define PCIE_PORT_MSI_VECTOR_MASK 0x1f
29/* 15/*
30 * According to the PCI Express Base Specification 2.0, the indices of the MSI-X 16 * According to the PCI Express Base Specification 2.0, the indices of
31 * table entires used by port services must not exceed 31 17 * the MSI-X table entires used by port services must not exceed 31
32 */ 18 */
33#define PCIE_PORT_MAX_MSIX_ENTRIES 32 19#define PCIE_PORT_MAX_MSIX_ENTRIES 32
34 20
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 9318b96bb255..413262eb95b7 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -109,8 +109,8 @@ static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
109 * used to generate the interrupt message." 109 * used to generate the interrupt message."
110 */ 110 */
111 pos = pci_pcie_cap(dev); 111 pos = pci_pcie_cap(dev);
112 pci_read_config_word(dev, pos + PCIE_CAPABILITIES_REG, &reg16); 112 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
113 entry = (reg16 >> 9) & PCIE_PORT_MSI_VECTOR_MASK; 113 entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
114 if (entry >= nr_entries) 114 if (entry >= nr_entries)
115 goto Error; 115 goto Error;
116 116
@@ -230,12 +230,11 @@ static int get_port_device_capability(struct pci_dev *dev)
230 u32 reg32; 230 u32 reg32;
231 231
232 pos = pci_pcie_cap(dev); 232 pos = pci_pcie_cap(dev);
233 pci_read_config_word(dev, pos + PCIE_CAPABILITIES_REG, &reg16); 233 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
234 /* Hot-Plug Capable */ 234 /* Hot-Plug Capable */
235 if (reg16 & PORT_TO_SLOT_MASK) { 235 if (reg16 & PCI_EXP_FLAGS_SLOT) {
236 pci_read_config_dword(dev, 236 pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
237 pos + PCIE_SLOT_CAPABILITIES_REG, &reg32); 237 if (reg32 & PCI_EXP_SLTCAP_HPC)
238 if (reg32 & SLOT_HP_CAPABLE_MASK)
239 services |= PCIE_PORT_SERVICE_HP; 238 services |= PCIE_PORT_SERVICE_HP;
240 } 239 }
241 /* AER capable */ 240 /* AER capable */