Merge branch 'pci/resource' into next

* pci/resource:
  PCI: Allocate 64-bit BARs above 4G when possible
  PCI: Enforce bus address limits in resource allocation
  PCI: Split out bridge window override of minimum allocation address
  agp/ati: Use PCI_COMMAND instead of hard-coded 4
  agp/intel: Use CPU physical address, not bus address, for ioremap()
  agp/intel: Use pci_bus_address() to get GTTADR bus address
  agp/intel: Use pci_bus_address() to get MMADR bus address
  agp/intel: Support 64-bit GMADR
  agp/intel: Rename gtt_bus_addr to gtt_phys_addr
  drm/i915: Rename gtt_bus_addr to gtt_phys_addr
  agp: Use pci_resource_start() to get CPU physical address for BAR
  agp: Support 64-bit APBASE
  PCI: Add pci_bus_address() to get bus address of a BAR
  PCI: Convert pcibios_resource_to_bus() to take a pci_bus, not a pci_dev
  PCI: Change pci_bus_region addresses to dma_addr_t

7 files changed, 130 insertions, 61 deletions

diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c
index a037d81f21ed..00660cc502c5 100644
--- a/drivers/pci/bus.c
+++ b/drivers/pci/bus.c
@@ -98,41 +98,54 @@ void pci_bus_remove_resources(struct pci_bus *bus)
         }
 }
 
-/**
- * pci_bus_alloc_resource - allocate a resource from a parent bus
- * @bus: PCI bus
- * @res: resource to allocate
- * @size: size of resource to allocate
- * @align: alignment of resource to allocate
- * @min: minimum /proc/iomem address to allocate
- * @type_mask: IORESOURCE_* type flags
- * @alignf: resource alignment function
- * @alignf_data: data argument for resource alignment function
- *
- * Given the PCI bus a device resides on, the size, minimum address,
- * alignment and type, try to find an acceptable resource allocation
- * for a specific device resource.
+static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL};
+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
+static struct pci_bus_region pci_64_bit = {0,
+                                (dma_addr_t) 0xffffffffffffffffULL};
+static struct pci_bus_region pci_high = {(dma_addr_t) 0x100000000ULL,
+                                (dma_addr_t) 0xffffffffffffffffULL};
+#endif
+
+/*
+ * @res contains CPU addresses.  Clip it so the corresponding bus addresses
+ * on @bus are entirely within @region.  This is used to control the bus
+ * addresses of resources we allocate, e.g., we may need a resource that
+ * can be mapped by a 32-bit BAR.
  */
-int
-pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
+static void pci_clip_resource_to_region(struct pci_bus *bus,
+                                        struct resource *res,
+                                        struct pci_bus_region *region)
+{
+        struct pci_bus_region r;
+
+        pcibios_resource_to_bus(bus, &r, res);
+        if (r.start < region->start)
+                r.start = region->start;
+        if (r.end > region->end)
+                r.end = region->end;
+
+        if (r.end < r.start)
+                res->end = res->start - 1;
+        else
+                pcibios_bus_to_resource(bus, res, &r);
+}
+
+static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res,
                 resource_size_t size, resource_size_t align,
                 resource_size_t min, unsigned int type_mask,
                 resource_size_t (*alignf)(void *,
                                           const struct resource *,
                                           resource_size_t,
                                           resource_size_t),
-                void *alignf_data)
+                void *alignf_data,
+                struct pci_bus_region *region)
 {
-        int i, ret = -ENOMEM;
-        struct resource *r;
-        resource_size_t max = -1;
+        int i, ret;
+        struct resource *r, avail;
+        resource_size_t max;
 
         type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
 
-        /* don't allocate too high if the pref mem doesn't support 64bit*/
-        if (!(res->flags & IORESOURCE_MEM_64))
-                max = PCIBIOS_MAX_MEM_32;
-
         pci_bus_for_each_resource(bus, r, i) {
                 if (!r)
                         continue;
@@ -147,15 +160,74 @@ pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
                     !(res->flags & IORESOURCE_PREFETCH))
                         continue;
 
+                avail = *r;
+                pci_clip_resource_to_region(bus, &avail, region);
+                if (!resource_size(&avail))
+                        continue;
+
+                /*
+                 * "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to
+                 * protect badly documented motherboard resources, but if
+                 * this is an already-configured bridge window, its start
+                 * overrides "min".
+                 */
+                if (avail.start)
+                        min = avail.start;
+
+                max = avail.end;
+
                 /* Ok, try it out.. */
-                ret = allocate_resource(r, res, size,
-                                        r->start ? : min,
-                                        max, align,
-                                        alignf, alignf_data);
+                ret = allocate_resource(r, res, size, min, max,
+                                        align, alignf, alignf_data);
                 if (ret == 0)
-                        break;
+                        return 0;
         }
-        return ret;
+        return -ENOMEM;
+}
+
+/**
+ * pci_bus_alloc_resource - allocate a resource from a parent bus
+ * @bus: PCI bus
+ * @res: resource to allocate
+ * @size: size of resource to allocate
+ * @align: alignment of resource to allocate
+ * @min: minimum /proc/iomem address to allocate
+ * @type_mask: IORESOURCE_* type flags
+ * @alignf: resource alignment function
+ * @alignf_data: data argument for resource alignment function
+ *
+ * Given the PCI bus a device resides on, the size, minimum address,
+ * alignment and type, try to find an acceptable resource allocation
+ * for a specific device resource.
+ */
+int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
+                resource_size_t size, resource_size_t align,
+                resource_size_t min, unsigned int type_mask,
+                resource_size_t (*alignf)(void *,
+                                          const struct resource *,
+                                          resource_size_t,
+                                          resource_size_t),
+                void *alignf_data)
+{
+#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
+        int rc;
+
+        if (res->flags & IORESOURCE_MEM_64) {
+                rc = pci_bus_alloc_from_region(bus, res, size, align, min,
+                                               type_mask, alignf, alignf_data,
+                                               &pci_high);
+                if (rc == 0)
+                        return 0;
+
+                return pci_bus_alloc_from_region(bus, res, size, align, min,
+                                                 type_mask, alignf, alignf_data,
+                                                 &pci_64_bit);
+        }
+#endif
+
+        return pci_bus_alloc_from_region(bus, res, size, align, min,
+                                         type_mask, alignf, alignf_data,
+                                         &pci_32_bit);
 }
 
 void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c
index a68dc613a5be..06ace6248c61 100644
--- a/drivers/pci/host-bridge.c
+++ b/drivers/pci/host-bridge.c
@@ -9,22 +9,19 @@
 
 #include "pci.h"
 
-static struct pci_bus *find_pci_root_bus(struct pci_dev *dev)
+static struct pci_bus *find_pci_root_bus(struct pci_bus *bus)
 {
-        struct pci_bus *bus;
-
-        bus = dev->bus;
         while (bus->parent)
                 bus = bus->parent;
 
         return bus;
 }
 
-static struct pci_host_bridge *find_pci_host_bridge(struct pci_dev *dev)
+static struct pci_host_bridge *find_pci_host_bridge(struct pci_bus *bus)
 {
-        struct pci_bus *bus = find_pci_root_bus(dev);
+        struct pci_bus *root_bus = find_pci_root_bus(bus);
 
-        return to_pci_host_bridge(bus->bridge);
+        return to_pci_host_bridge(root_bus->bridge);
 }
 
 void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
@@ -40,10 +37,10 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
         return res1->start <= res2->start && res1->end >= res2->end;
 }
 
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
                              struct resource *res)
 {
-        struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
+        struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
         struct pci_host_bridge_window *window;
         resource_size_t offset = 0;
 
@@ -68,10 +65,10 @@ static bool region_contains(struct pci_bus_region *region1,
         return region1->start <= region2->start && region1->end >= region2->end;
 }
 
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
                              struct pci_bus_region *region)
 {
-        struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
+        struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
         struct pci_host_bridge_window *window;
         resource_size_t offset = 0;
 
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 12ec56c9a913..23cdfac0bdb3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -269,8 +269,8 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 region.end = l + sz;
         }
 
-        pcibios_bus_to_resource(dev, res, &region);
-        pcibios_resource_to_bus(dev, &inverted_region, res);
+        pcibios_bus_to_resource(dev->bus, res, &region);
+        pcibios_resource_to_bus(dev->bus, &inverted_region, res);
 
         /*
          * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is
@@ -364,7 +364,7 @@ static void pci_read_bridge_io(struct pci_bus *child)
                 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
                 region.start = base;
                 region.end = limit + io_granularity - 1;
-                pcibios_bus_to_resource(dev, res, &region);
+                pcibios_bus_to_resource(dev->bus, res, &region);
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
@@ -386,7 +386,7 @@ static void pci_read_bridge_mmio(struct pci_bus *child)
                 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                 region.start = base;
                 region.end = limit + 0xfffff;
-                pcibios_bus_to_resource(dev, res, &region);
+                pcibios_bus_to_resource(dev->bus, res, &region);
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
@@ -436,7 +436,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
                         res->flags |= IORESOURCE_MEM_64;
                 region.start = base;
                 region.end = limit + 0xfffff;
-                pcibios_bus_to_resource(dev, res, &region);
+                pcibios_bus_to_resource(dev->bus, res, &region);
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
@@ -1084,24 +1084,24 @@ int pci_setup_device(struct pci_dev *dev)
                                 region.end = 0x1F7;
                                 res = &dev->resource[0];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                                 region.start = 0x3F6;
                                 region.end = 0x3F6;
                                 res = &dev->resource[1];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                         }
                         if ((progif & 4) == 0) {
                                 region.start = 0x170;
                                 region.end = 0x177;
                                 res = &dev->resource[2];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                                 region.start = 0x376;
                                 region.end = 0x376;
                                 res = &dev->resource[3];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                         }
                 }
                 break;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b3b1b9aa8863..4ad6bf6c107b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -343,7 +343,7 @@ static void quirk_io_region(struct pci_dev *dev, int port,
         /* Convert from PCI bus to resource space */
         bus_region.start = region;
         bus_region.end = region + size - 1;
-        pcibios_bus_to_resource(dev, res, &bus_region);
+        pcibios_bus_to_resource(dev->bus, res, &bus_region);
 
         if (!pci_claim_resource(dev, nr))
                 dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index c5d0a08a8747..5d595724e5f4 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -31,7 +31,7 @@ int pci_enable_rom(struct pci_dev *pdev)
         if (!res->flags)
                 return -1;
 
-        pcibios_resource_to_bus(pdev, &region, res);
+        pcibios_resource_to_bus(pdev->bus, &region, res);
         pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
         rom_addr &= ~PCI_ROM_ADDRESS_MASK;
         rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 2e344a5581ae..138bdd6393be 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -475,7 +475,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
                  &bus->busn_res);
 
         res = bus->resource[0];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_IO) {
                 /*
                  * The IO resource is allocated a range twice as large as it
@@ -489,7 +489,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
         }
 
         res = bus->resource[1];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_IO) {
                 dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
@@ -499,7 +499,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
         }
 
         res = bus->resource[2];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_MEM) {
                 dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
@@ -509,7 +509,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
         }
 
         res = bus->resource[3];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_MEM) {
                 dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
@@ -547,7 +547,7 @@ static void pci_setup_bridge_io(struct pci_bus *bus)
 
         /* Set up the top and bottom of the PCI I/O segment for this bus. */
         res = bus->resource[0];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_IO) {
                 pci_read_config_word(bridge, PCI_IO_BASE, &l);
                 io_base_lo = (region.start >> 8) & io_mask;
@@ -578,7 +578,7 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus)
 
         /* Set up the top and bottom of the PCI Memory segment for this bus. */
         res = bus->resource[1];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_MEM) {
                 l = (region.start >> 16) & 0xfff0;
                 l |= region.end & 0xfff00000;
@@ -604,7 +604,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
         /* Set up PREF base/limit. */
         bu = lu = 0;
         res = bus->resource[2];
-        pcibios_resource_to_bus(bridge, &region, res);
+        pcibios_resource_to_bus(bridge->bus, &region, res);
         if (res->flags & IORESOURCE_PREFETCH) {
                 l = (region.start >> 16) & 0xfff0;
                 l |= region.end & 0xfff00000;
@@ -1424,7 +1424,7 @@ static int iov_resources_unassigned(struct pci_dev *dev, void *data)
                 if (!r->flags)
                         continue;
 
-                pcibios_resource_to_bus(dev, &region, r);
+                pcibios_resource_to_bus(dev->bus, &region, r);
                 if (!region.start) {
                         *unassigned = true;
                         return 1; /* return early from pci_walk_bus() */
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 83c4d3bc47ab..5c060b152ce6 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -52,7 +52,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
         if (res->flags & IORESOURCE_PCI_FIXED)
                 return;
 
-        pcibios_resource_to_bus(dev, &region, res);
+        pcibios_resource_to_bus(dev->bus, &region, res);
 
         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
         if (res->flags & IORESOURCE_IO)